JPS6482832A - System for synchronizing time division multiplex transmission system - Google Patents

System for synchronizing time division multiplex transmission system

Info

Publication number
JPS6482832A
JPS6482832A JP24144287A JP24144287A JPS6482832A JP S6482832 A JPS6482832 A JP S6482832A JP 24144287 A JP24144287 A JP 24144287A JP 24144287 A JP24144287 A JP 24144287A JP S6482832 A JPS6482832 A JP S6482832A
Authority
JP
Japan
Prior art keywords
time division
division multiplexing
signal
frame synchronization
converting device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP24144287A
Other languages
Japanese (ja)
Inventor
Akito Oyamada
Hideo Shimoda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Toshiba Telecommunication System Engineering Corp
Original Assignee
Toshiba Corp
Toshiba Telecommunication System Engineering Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Toshiba Telecommunication System Engineering Corp filed Critical Toshiba Corp
Priority to JP24144287A priority Critical patent/JPS6482832A/en
Publication of JPS6482832A publication Critical patent/JPS6482832A/en
Pending legal-status Critical Current

Links

Landscapes

  • Time-Division Multiplex Systems (AREA)

Abstract

PURPOSE:To prevent the deterioration of a signal vs quantizing noise ratio and to improve the quality of a time division multiplexing signal by obtaining not only a frame synchronization but also a multi-frame synchronization between an terminal station equipment and a multiplexing converting device. CONSTITUTION:A multiplexing converting device 4, when the frame re-combination of a time division multiplexing signal sent from respective terminal station equipments 3 is executed, synchronizes the code rule violation CRV generation timing of a transmission reference clock DS generated from the above-mentioned network synchronizing device, obtains the synchronization, and synchronizes the CRV generation prohibiting timing and obtains a multi-frame synchronization. For this reason, the time division multiplexing signal sent from the multiplexing converting device 4 and the time division multiplexing signal outputted from respective above-mentioned devices 3 become the ones for which the frame synchronization and the multi-frame synchronization are obtained. For this reason, the deterioration of a signal vs quantizing noise ratio (S/Nq) of the time division multiplexing signal due to the frame re-combination at the multiplexing converting device 4 does not occur and thus, a high quality time division multiplexing signal can be sent.
JP24144287A 1987-09-25 1987-09-25 System for synchronizing time division multiplex transmission system Pending JPS6482832A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24144287A JPS6482832A (en) 1987-09-25 1987-09-25 System for synchronizing time division multiplex transmission system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24144287A JPS6482832A (en) 1987-09-25 1987-09-25 System for synchronizing time division multiplex transmission system

Publications (1)

Publication Number Publication Date
JPS6482832A true JPS6482832A (en) 1989-03-28

Family

ID=17074370

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24144287A Pending JPS6482832A (en) 1987-09-25 1987-09-25 System for synchronizing time division multiplex transmission system

Country Status (1)

Country Link
JP (1) JPS6482832A (en)

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