JPS6481264A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS6481264A
JPS6481264A JP62237655A JP23765587A JPS6481264A JP S6481264 A JPS6481264 A JP S6481264A JP 62237655 A JP62237655 A JP 62237655A JP 23765587 A JP23765587 A JP 23765587A JP S6481264 A JPS6481264 A JP S6481264A
Authority
JP
Japan
Prior art keywords
metal bump
recessed part
extended
head
mated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62237655A
Other languages
Japanese (ja)
Inventor
Hajime Sudo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP62237655A priority Critical patent/JPS6481264A/en
Publication of JPS6481264A publication Critical patent/JPS6481264A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H01L2224/1147—Manufacturing methods using a lift-off mask
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/13109—Indium [In] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01022—Titanium [Ti]

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
  • Solid State Image Pick-Up Elements (AREA)

Abstract

PURPOSE:To obtain a highly reliable semiconductor device which has been integrated at high density by a method wherein the head of a first metal bump is shaped to be protruding in a radius direction of the metal bump and a second metal bump to be connected to the metal bump is shaped to have a recessed part to be mated with a protruding part in order to prevent the metal bump from being extended in a lateral direction and in order to prevent the metal bump from being exfoliated from a substrate. CONSTITUTION:Because a part extended in a radius direction of a head region 26 of a first metal bump 27 is coupled in a state that it is mated with a recessed part 32 of a second metal bump 33, they are connected surely. The second metal bump 33 is formed by using a shape memory alloy composed of a Ti-Ni alloy. Accordingly, even if the metal bump 33 is subjected apparently to plastic deformation and the recessed part 32 is extended in a transverse direction when the head 26 of the first metal bump 27 is put in the recessed part 32 of the second metal bump 33, the recessed part can be restored to an original state that the recessed part is not extended if it is heated again at a temperature of 110 deg.C or higher which is a termination temperature of austenite transformation in case of an alloy composed of 50 atomic % each of Ti and Ni. The first metal bump 27 is composed of Al and its hardness is larger than that of the second metal bump 33; accordingly, when the head 26 is mated with the recessed part 32, a force is exerted in a direction which extends the recessed part.
JP62237655A 1987-09-22 1987-09-22 Semiconductor device Pending JPS6481264A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62237655A JPS6481264A (en) 1987-09-22 1987-09-22 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62237655A JPS6481264A (en) 1987-09-22 1987-09-22 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS6481264A true JPS6481264A (en) 1989-03-27

Family

ID=17018542

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62237655A Pending JPS6481264A (en) 1987-09-22 1987-09-22 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS6481264A (en)

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03133137A (en) * 1989-10-19 1991-06-06 Ibiden Co Ltd Bump for electronic component mounting
JPH07297197A (en) * 1994-04-27 1995-11-10 Nec Corp Mounting device and its manufacture
JPH08148495A (en) * 1994-11-25 1996-06-07 Fujitsu Ltd Semiconductor device, manufacture thereof, and adhesion evaluation method of semiconductor device bump
WO1998033217A1 (en) * 1997-01-24 1998-07-30 Rohm Co., Ltd. Semiconductor device and method for manufacturing thereof
US6005941A (en) * 1996-05-24 1999-12-21 Oki Electric Method and apparatus for providing optional service functions in a private branch exchange
US6583514B2 (en) 2000-10-04 2003-06-24 Nec Corporation Semiconductor device with a binary alloy bonding layer
EP1365449A2 (en) * 2002-05-17 2003-11-26 Texas Instruments Incorporated Metallic strain-absorbing layer for improved fatigue resistance of solder-attached devices
US7129586B2 (en) 2003-06-27 2006-10-31 Denso Corporation Flip chip packaging structure and related packaging method
JP2016034130A (en) * 2014-07-30 2016-03-10 太陽誘電株式会社 Acoustic wave device and manufacturing method of the same
CN109979833A (en) * 2019-03-10 2019-07-05 复旦大学 A kind of quick room temperature micro convex point bonding method based on nested structure and annealing

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03133137A (en) * 1989-10-19 1991-06-06 Ibiden Co Ltd Bump for electronic component mounting
JPH07297197A (en) * 1994-04-27 1995-11-10 Nec Corp Mounting device and its manufacture
JPH08148495A (en) * 1994-11-25 1996-06-07 Fujitsu Ltd Semiconductor device, manufacture thereof, and adhesion evaluation method of semiconductor device bump
US6005941A (en) * 1996-05-24 1999-12-21 Oki Electric Method and apparatus for providing optional service functions in a private branch exchange
EP0890989A4 (en) * 1997-01-24 2006-11-02 Rohm Co Ltd Semiconductor device and method for manufacturing thereof
WO1998033217A1 (en) * 1997-01-24 1998-07-30 Rohm Co., Ltd. Semiconductor device and method for manufacturing thereof
US6583514B2 (en) 2000-10-04 2003-06-24 Nec Corporation Semiconductor device with a binary alloy bonding layer
EP1365449A2 (en) * 2002-05-17 2003-11-26 Texas Instruments Incorporated Metallic strain-absorbing layer for improved fatigue resistance of solder-attached devices
US7095121B2 (en) 2002-05-17 2006-08-22 Texas Instrument Incorporated Metallic strain-absorbing layer for improved fatigue resistance of solder-attached devices
US7012018B2 (en) 2002-05-17 2006-03-14 Texas Instruments Incorporated Metallic strain-absorbing layer for improved fatigue resistance of solder-attached devices
US7129586B2 (en) 2003-06-27 2006-10-31 Denso Corporation Flip chip packaging structure and related packaging method
JP2016034130A (en) * 2014-07-30 2016-03-10 太陽誘電株式会社 Acoustic wave device and manufacturing method of the same
CN109979833A (en) * 2019-03-10 2019-07-05 复旦大学 A kind of quick room temperature micro convex point bonding method based on nested structure and annealing

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