JPS647772A - Solid-state image pickup device - Google Patents
Solid-state image pickup deviceInfo
- Publication number
- JPS647772A JPS647772A JP62161258A JP16125887A JPS647772A JP S647772 A JPS647772 A JP S647772A JP 62161258 A JP62161258 A JP 62161258A JP 16125887 A JP16125887 A JP 16125887A JP S647772 A JPS647772 A JP S647772A
- Authority
- JP
- Japan
- Prior art keywords
- output
- selector
- inputted
- counter
- signals
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Transforming Light Signals Into Electric Signals (AREA)
Abstract
PURPOSE:To make all output signals coincide with system delay and to reduce the circuit scale by frequency-dividing, counting, and decoding a main clock, and providing a selector that selects a delay circuit on a signal. CONSTITUTION:When a horizontal synchronizing signal is inputted to a controller 6, a frequency divider 1 and a counter 4 are released of their resetting, and the frequency divider 1 starts operating. The divider 1 frequency-divides a main clock, and its outputs is delayed in the delay circuit 2, then inputted to the selector 3. In the selector 3, based on a selection signal, such a delayed output as synchronized with the system delay is selected and outputted to the counter 4. An output from the counter 4 is inputted to a decoder 5 where it is decoded to output a horizontal blanking signal and voltage signals phiV1-phiV4; these whole signals are outputted in a state synchronizing with the system delay. In such a way, an image pickup device in which all the signals are synchronous with each other can be obtained without increasing the circuit scale.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62161258A JPS647772A (en) | 1987-06-30 | 1987-06-30 | Solid-state image pickup device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62161258A JPS647772A (en) | 1987-06-30 | 1987-06-30 | Solid-state image pickup device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS647772A true JPS647772A (en) | 1989-01-11 |
Family
ID=15731674
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62161258A Pending JPS647772A (en) | 1987-06-30 | 1987-06-30 | Solid-state image pickup device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS647772A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1991016789A1 (en) * | 1990-04-19 | 1991-10-31 | Matsushita Electric Industrial Co., Ltd. | Device for picking up image and for processing digital signal |
US5371540A (en) * | 1990-04-19 | 1994-12-06 | Matsushita Electric Industrial Co. | Digital-signal-processing camera |
-
1987
- 1987-06-30 JP JP62161258A patent/JPS647772A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1991016789A1 (en) * | 1990-04-19 | 1991-10-31 | Matsushita Electric Industrial Co., Ltd. | Device for picking up image and for processing digital signal |
EP0481086A1 (en) * | 1990-04-19 | 1992-04-22 | Matsushita Electric Industrial Co., Ltd. | Device for picking up image and for processing digital signal |
US5371540A (en) * | 1990-04-19 | 1994-12-06 | Matsushita Electric Industrial Co. | Digital-signal-processing camera |
EP0481086B1 (en) * | 1990-04-19 | 1996-10-09 | Matsushita Electric Industrial Co., Ltd. | Device for picking up image and for processing digital signal |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS5720052A (en) | Input data synchronizing circuit | |
JPH02143688A (en) | Hetero-video-format discriminator | |
JPS5498523A (en) | Synchronizer between reproduced video signal from video disc and other video signals | |
JPH0552703B2 (en) | ||
JPS647772A (en) | Solid-state image pickup device | |
ES8700821A1 (en) | Sychronizing the operation of a computing means with a reference frequency signal. | |
JPS5686582A (en) | Quantizing system at reception side for video information transmitter | |
ES8501593A1 (en) | Synchronization input for television receiver on-screen alphanumeric display | |
JPS55125780A (en) | Time axis correction unit | |
JPS54159818A (en) | Delay circuit | |
KR840002746Y1 (en) | Television receiver | |
JPS6489679A (en) | Pll circuit for television synchronizing signal | |
JPS55159675A (en) | Vertical synchronizing circuit | |
JPS5441014A (en) | Clock signal generator circuit | |
JPS54153518A (en) | Corrector for time axis error | |
JPS5471929A (en) | Video signal level display method | |
JPS54104728A (en) | Vertical synchronizing unit | |
JPS6430376A (en) | Channel selection display circuit for television | |
JPS52144221A (en) | Ghost delection circuit system | |
JPS6455986A (en) | Video signal sampling device | |
JPH04227164A (en) | Vertical synchronizing signal separation circuit | |
JPS54133307A (en) | Recorder of video signal | |
JPS5545236A (en) | Multiplex broadcast receiving unit | |
JPS56111323A (en) | Synchronizing circuit | |
JPS5717269A (en) | Display device for information television at home |