JPS6477241A - Phase matching circuit - Google Patents

Phase matching circuit

Info

Publication number
JPS6477241A
JPS6477241A JP62232483A JP23248387A JPS6477241A JP S6477241 A JPS6477241 A JP S6477241A JP 62232483 A JP62232483 A JP 62232483A JP 23248387 A JP23248387 A JP 23248387A JP S6477241 A JPS6477241 A JP S6477241A
Authority
JP
Japan
Prior art keywords
clock
phase
data
output buffer
phase matching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62232483A
Other languages
Japanese (ja)
Other versions
JPH084259B2 (en
Inventor
Mitsuki Taniguchi
Nobuhiro Fujimoto
Tomohiro Ishihara
Takaaki Wakizaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP62232483A priority Critical patent/JPH084259B2/en
Publication of JPS6477241A publication Critical patent/JPS6477241A/en
Publication of JPH084259B2 publication Critical patent/JPH084259B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0008—Synchronisation information channels, e.g. clock distribution lines
    • H04L7/0012—Synchronisation information channels, e.g. clock distribution lines by comparing receiver clock with transmitter clock

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

PURPOSE:To automatically perform phase matching by outputting data as it is in case of a second clock having the same phase as a first clock but outputting data after phase shift in case of the second clock having a phase opposite to that of the first clock. CONSTITUTION:An input buffer 31 into which a first data D1 synchronized with a first clock CK1 is taken is provided on the input side, and an output buffer 32 from which second data D2 synchronized with a second clock CK2 is sent is provided on the output side. The first clock CK1 and the second clock CK2 are compared and discriminated by a phase discriminating part 33, and first data is transferred to the output buffer 32 as it is if the clock CK2 has the same phase as the clock CK1, but first data D1 has the phase shifted and is transferred to the output buffer 32 if the clock CK2 has a phase opposite to that of the clock CK1. This control is performed by a phase control part 34. Thus, phase matching is performed in an inexpensive and small-scale constitution by complete automatic processing.
JP62232483A 1987-09-18 1987-09-18 Phase matching circuit Expired - Lifetime JPH084259B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62232483A JPH084259B2 (en) 1987-09-18 1987-09-18 Phase matching circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62232483A JPH084259B2 (en) 1987-09-18 1987-09-18 Phase matching circuit

Publications (2)

Publication Number Publication Date
JPS6477241A true JPS6477241A (en) 1989-03-23
JPH084259B2 JPH084259B2 (en) 1996-01-17

Family

ID=16940016

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62232483A Expired - Lifetime JPH084259B2 (en) 1987-09-18 1987-09-18 Phase matching circuit

Country Status (1)

Country Link
JP (1) JPH084259B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5056120A (en) * 1988-07-18 1991-10-08 Fujitsu Limited Phase adjusting circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5056120A (en) * 1988-07-18 1991-10-08 Fujitsu Limited Phase adjusting circuit

Also Published As

Publication number Publication date
JPH084259B2 (en) 1996-01-17

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