JPS6458531A - Preparation of multilayer printed wiring board - Google Patents
Preparation of multilayer printed wiring boardInfo
- Publication number
- JPS6458531A JPS6458531A JP21675387A JP21675387A JPS6458531A JP S6458531 A JPS6458531 A JP S6458531A JP 21675387 A JP21675387 A JP 21675387A JP 21675387 A JP21675387 A JP 21675387A JP S6458531 A JPS6458531 A JP S6458531A
- Authority
- JP
- Japan
- Prior art keywords
- wiring board
- printed wiring
- multilayer printed
- curing
- multilayer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
PURPOSE:To obtain a multilayer printed wiring board having no resin crack, by setting the cooling speed in the cooling process, which is taken after the heat-curing in a multilayer bonding process in preparing the multilayer printed wiring board using a radical reaction curing type resin, to a specific value range. CONSTITUTION:A radical reaction curing type resin is dissolved in a solvent to impregnate a base material such as glass cloth and the solvent is subsequently removed by drying to prepare a prepreg. A necessary number of the prepregs are held between copper foils and pressed under heating to prepare a copper clad laminate plate for an inner layer. Circuit processing is applied to said laminate plate and a necessary number of the processed laminate plates are superposed through adhesive prepregs to be pressed under heating and holes are further provided to the superposed one and through-hole plating is applied thereto and circuit processing is applied to the outermost layer to obtain a multilayer printed wiring board. Multilayer bonding is usually performed under such a condition that a temp. rising speed is 2-10 deg.C/min, curing temp. is 160-250 deg.C and a curing time is 15-240min. A cooling speed after curing is 0.1-2 deg.C/min. When the cooling speed is faster than 2 deg.C/min, a resin crack is easily generated in the multilayer printed wiring board and, when slower than 0.1 deg.C/min, a manufacturing time becomes long and production efficiency becomes inferior.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP21675387A JPS6458531A (en) | 1987-08-31 | 1987-08-31 | Preparation of multilayer printed wiring board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP21675387A JPS6458531A (en) | 1987-08-31 | 1987-08-31 | Preparation of multilayer printed wiring board |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6458531A true JPS6458531A (en) | 1989-03-06 |
Family
ID=16693383
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP21675387A Pending JPS6458531A (en) | 1987-08-31 | 1987-08-31 | Preparation of multilayer printed wiring board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6458531A (en) |
-
1987
- 1987-08-31 JP JP21675387A patent/JPS6458531A/en active Pending
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