JPS6455871A - Manufacture of self-alignment type gate electrode - Google Patents

Manufacture of self-alignment type gate electrode

Info

Publication number
JPS6455871A
JPS6455871A JP21261587A JP21261587A JPS6455871A JP S6455871 A JPS6455871 A JP S6455871A JP 21261587 A JP21261587 A JP 21261587A JP 21261587 A JP21261587 A JP 21261587A JP S6455871 A JPS6455871 A JP S6455871A
Authority
JP
Japan
Prior art keywords
resist pattern
etching
thereafter
insulating film
self
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP21261587A
Other languages
Japanese (ja)
Inventor
Hideki Hayashi
Shinichi Shikada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Electric Industries Ltd
Original Assignee
Sumitomo Electric Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Electric Industries Ltd filed Critical Sumitomo Electric Industries Ltd
Priority to JP21261587A priority Critical patent/JPS6455871A/en
Publication of JPS6455871A publication Critical patent/JPS6455871A/en
Pending legal-status Critical Current

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  • Junction Field-Effect Transistors (AREA)

Abstract

PURPOSE:To keep gate leaking current and gate capacitance low, by implanting ions with a resist pattern as a mask, forming a high concentration impurity region, side-etching the resist pattern so as to form a narrow part, and thereafter depositing an insulating film on a semiconductor substrate by a low temperature depositing method. CONSTITUTION:A resist pattern 34 is used as a mask, and Si<+> ions are implanted into a semiconductor substrate 30. An n<+> GaAs region, i. e., a high impurity region 36, is formed on both sides of the resist pattern 34 in a self- aligning mode. Thereafter, the resist pattern 34 undergoes side etching by O2 RIE etching or O2 plasma etching. Thus a narrowed resist pattern 34A is formed. An insulating layer 38 is further deposited at low temperature on the substrate 30 including the resist pattern 34A. For example, ECR-CVD is used, and an Si3N4 film is formed. The resist pattern 34A is lifted off, and the insulating film on the resist pattern 34A is removed. An opening 40 is provided in the insulating film 38. Thereafter, the substrate is annealed in an AsH3 atmosphere, and Cr is evaporated. The evaporated Cr film is etched, and a gate electrode 42 made of Cr is formed in the opening 40.
JP21261587A 1987-08-26 1987-08-26 Manufacture of self-alignment type gate electrode Pending JPS6455871A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21261587A JPS6455871A (en) 1987-08-26 1987-08-26 Manufacture of self-alignment type gate electrode

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21261587A JPS6455871A (en) 1987-08-26 1987-08-26 Manufacture of self-alignment type gate electrode

Publications (1)

Publication Number Publication Date
JPS6455871A true JPS6455871A (en) 1989-03-02

Family

ID=16625613

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21261587A Pending JPS6455871A (en) 1987-08-26 1987-08-26 Manufacture of self-alignment type gate electrode

Country Status (1)

Country Link
JP (1) JPS6455871A (en)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57133636A (en) * 1981-02-13 1982-08-18 Nippon Telegr & Teleph Corp <Ntt> Film forming device utilizing plasma at low temperature
JPS5933837A (en) * 1982-08-19 1984-02-23 Nippon Telegr & Teleph Corp <Ntt> Formation of insulating film onto surface of semiconductor device
JPS59229876A (en) * 1983-06-13 1984-12-24 Toshiba Corp Manufacture of schottky gate type field effect transistor
JPS6190471A (en) * 1984-10-11 1986-05-08 Nec Corp Manufacture of semiconductor device
JPS61176162A (en) * 1985-01-31 1986-08-07 Fujitsu Ltd Field-effect semiconductor device and manufacture thereof
JPS6284566A (en) * 1985-10-08 1987-04-18 Sharp Corp Field-effect transistor and manufacture thereof

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57133636A (en) * 1981-02-13 1982-08-18 Nippon Telegr & Teleph Corp <Ntt> Film forming device utilizing plasma at low temperature
JPS5933837A (en) * 1982-08-19 1984-02-23 Nippon Telegr & Teleph Corp <Ntt> Formation of insulating film onto surface of semiconductor device
JPS59229876A (en) * 1983-06-13 1984-12-24 Toshiba Corp Manufacture of schottky gate type field effect transistor
JPS6190471A (en) * 1984-10-11 1986-05-08 Nec Corp Manufacture of semiconductor device
JPS61176162A (en) * 1985-01-31 1986-08-07 Fujitsu Ltd Field-effect semiconductor device and manufacture thereof
JPS6284566A (en) * 1985-10-08 1987-04-18 Sharp Corp Field-effect transistor and manufacture thereof

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