JPS6455865A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To decrease fluctuation in element characteristics and the formation of a short channel, by depositing side walls of first and second insulating films twice separately, implanting phosphorus ions so that a film is not formed on the side wall that is covered with the first insulating film, and implanting arsenic ions before and after the formation of the side walls. CONSTITUTION:With a gate electrode 3 as a mask, arsenic ions (or antimony ions) are implanted in a semiconductor silicon substrate 1. Thus an n<-> type arsenic impurity region 11 is formed. Then, a first CVD SiO2 insulating film 15 is deposited on the entire surface by a chemical vapor growth method. With the gate electrode 3 and the first insulating film 15 on the side surface of the gate electrode as masks, phosphorus ions are implanted from the upper part, and an n<-> type phosphorus impurity region 22, which is deeper than said n<-> type region 11, is formed. Then, a second CVD SiO2 insulating film 16 is deposited on the entire surface. The first and second insulating films are vertically etched away. The first and second insulating films are made to remain only on the side surface of the gate electrode. Then, with the gate electrode 3 and the first and second insulating films on the side surface of the gate electrode as masks, arsenic ions (or antimony ions) are implanted. An n<-> source region 20 and a drain region 20, which are deeper that said n<-> type region, are formed.