JPS6455794A - Semiconductor memory - Google Patents
Semiconductor memoryInfo
- Publication number
- JPS6455794A JPS6455794A JP62213391A JP21339187A JPS6455794A JP S6455794 A JPS6455794 A JP S6455794A JP 62213391 A JP62213391 A JP 62213391A JP 21339187 A JP21339187 A JP 21339187A JP S6455794 A JPS6455794 A JP S6455794A
- Authority
- JP
- Japan
- Prior art keywords
- port
- memory
- pipeline
- cycle
- rise
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Static Random-Access Memory (AREA)
- Dram (AREA)
Abstract
PURPOSE:To realize a multi-access memory by using a pipeline and assigning alternately a cycle time, for which the high speed is executed by the pipeline operation, to first and second ports. CONSTITUTION:For the pipeline memory, a row address latch 7 and a column address latch 8 are provided among a row address decoder 5, a column address decoder 6 and a memory cell array 9. A cycle C1 to start from the rise of a clock CLK1 is assigned to a first port and a cycle C2 to start from the rise of a clock CLK2 is assigned to a second port. This is controlled by a port switching signal SEL. Thus, an image memory can be realized in which the access of the writing and reading to a random address from the first port and the reading to the continuous address can be executed from the second port, for a memory 9.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62213391A JPS6455794A (en) | 1987-08-26 | 1987-08-26 | Semiconductor memory |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62213391A JPS6455794A (en) | 1987-08-26 | 1987-08-26 | Semiconductor memory |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6455794A true JPS6455794A (en) | 1989-03-02 |
Family
ID=16638425
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62213391A Pending JPS6455794A (en) | 1987-08-26 | 1987-08-26 | Semiconductor memory |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6455794A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002190197A (en) * | 2000-12-20 | 2002-07-05 | Fujitsu Ltd | Semiconductor storage device |
JP2002245776A (en) * | 2001-02-14 | 2002-08-30 | Fujitsu Ltd | Semiconductor memory |
JP2005085344A (en) * | 2003-09-08 | 2005-03-31 | Hitachi Ulsi Systems Co Ltd | Semiconductor memory device and semiconductor integrated circuit |
JP2011159377A (en) * | 2010-01-29 | 2011-08-18 | Hynix Semiconductor Inc | Data output circuit of semiconductor memory and control method of the same |
US8547776B2 (en) | 2000-12-20 | 2013-10-01 | Fujitsu Semiconductor Limited | Multi-port memory based on DRAM core |
-
1987
- 1987-08-26 JP JP62213391A patent/JPS6455794A/en active Pending
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002190197A (en) * | 2000-12-20 | 2002-07-05 | Fujitsu Ltd | Semiconductor storage device |
US8547776B2 (en) | 2000-12-20 | 2013-10-01 | Fujitsu Semiconductor Limited | Multi-port memory based on DRAM core |
US8687456B2 (en) | 2000-12-20 | 2014-04-01 | Fujitsu Semiconductor Limited | Multi-port memory based on DRAM core |
US8717842B2 (en) | 2000-12-20 | 2014-05-06 | Fujitsu Semiconductor Limited | Multi-port memory based on DRAM core |
JP2002245776A (en) * | 2001-02-14 | 2002-08-30 | Fujitsu Ltd | Semiconductor memory |
JP2005085344A (en) * | 2003-09-08 | 2005-03-31 | Hitachi Ulsi Systems Co Ltd | Semiconductor memory device and semiconductor integrated circuit |
JP2011159377A (en) * | 2010-01-29 | 2011-08-18 | Hynix Semiconductor Inc | Data output circuit of semiconductor memory and control method of the same |
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