JPS6452033U - - Google Patents
Info
- Publication number
- JPS6452033U JPS6452033U JP14544987U JP14544987U JPS6452033U JP S6452033 U JPS6452033 U JP S6452033U JP 14544987 U JP14544987 U JP 14544987U JP 14544987 U JP14544987 U JP 14544987U JP S6452033 U JPS6452033 U JP S6452033U
- Authority
- JP
- Japan
- Prior art keywords
- connector
- board
- logic board
- logic
- information processing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000010365 information processing Effects 0.000 claims description 4
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Mounting Of Printed Circuit Boards And The Like (AREA)
Description
第1図は本考案による情報処理装置に用いられ
るロジツク基板の一実施例を示す要部斜視図、第
2図イ,ロは各々第1図に示すロジツク基板の作
用を示す側面図、第3図は本考案一実施例におけ
るロジツク基板の積層状態を示す構成図、第4図
は従来の情報処理装置におけるロジツク基板の積
層状態を示す概略斜視図である。
10……ロジツク基板、11……ロジツク基板
本体、20……コネクタ基板、30……外部イン
ターフエース用コネクタ、40……可変形コネク
タ、50……筐体。
FIG. 1 is a perspective view of essential parts showing one embodiment of a logic board used in an information processing device according to the present invention, FIGS. 2A and 2B are side views showing the function of the logic board shown in FIG. FIG. 4 is a configuration diagram showing a stacked state of logic boards in an embodiment of the present invention, and FIG. 4 is a schematic perspective view showing a stacked state of logic boards in a conventional information processing device. 10... Logic board, 11... Logic board main body, 20... Connector board, 30... External interface connector, 40... Variable connector, 50... Housing.
Claims (1)
ク基板と外部機器とを接続する外部インターフエ
ース用コネクタとを備えた情報処理装置において
、前記筐体内に設けられるロジツク基板本体と、
前記筐体外に設けられるコネクタ基板と、このコ
ネクタ基板上に取り付けられる外部インターフエ
ース用コネクタと、前記コネクタ基板と前記ロジ
ツク基板本体とを接続する可変形コネクタとを備
えたことを特徴とする情報処理装置。 An information processing device comprising a logic board attached to a casing and an external interface connector for connecting the logic board to an external device, a logic board main body provided within the casing;
Information processing comprising: a connector board provided outside the housing; an external interface connector mounted on the connector board; and a variable connector that connects the connector board and the logic board main body. Device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14544987U JPS6452033U (en) | 1987-09-25 | 1987-09-25 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14544987U JPS6452033U (en) | 1987-09-25 | 1987-09-25 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6452033U true JPS6452033U (en) | 1989-03-30 |
Family
ID=31414049
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14544987U Pending JPS6452033U (en) | 1987-09-25 | 1987-09-25 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6452033U (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05241684A (en) * | 1991-12-18 | 1993-09-21 | Internatl Business Mach Corp <Ibm> | Computer system provided with flexible substrate |
JP2011081725A (en) * | 2009-10-09 | 2011-04-21 | Fujitsu Ltd | Electronic device |
-
1987
- 1987-09-25 JP JP14544987U patent/JPS6452033U/ja active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05241684A (en) * | 1991-12-18 | 1993-09-21 | Internatl Business Mach Corp <Ibm> | Computer system provided with flexible substrate |
JP2011081725A (en) * | 2009-10-09 | 2011-04-21 | Fujitsu Ltd | Electronic device |
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