JPS6441939A - Testing system for logical device - Google Patents

Testing system for logical device

Info

Publication number
JPS6441939A
JPS6441939A JP62197892A JP19789287A JPS6441939A JP S6441939 A JPS6441939 A JP S6441939A JP 62197892 A JP62197892 A JP 62197892A JP 19789287 A JP19789287 A JP 19789287A JP S6441939 A JPS6441939 A JP S6441939A
Authority
JP
Japan
Prior art keywords
data
block
testing
memory
output data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62197892A
Other languages
Japanese (ja)
Inventor
Shoichi Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP62197892A priority Critical patent/JPS6441939A/en
Publication of JPS6441939A publication Critical patent/JPS6441939A/en
Pending legal-status Critical Current

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  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

PURPOSE:To simplify a testing by supplying the data for testing in a history memory through a switching means to a prescribed logical block and storing the output directly as the data for inspection or to the history memory as the output data for the inspection through a rear step logical block. CONSTITUTION:In a logical device 1 composed of plural logical blocks 21-2n and a history mechanism 3, the output data and the data for testing for the machine cycle of at least a special block of the blocks 21-2n are stored in a history memory 4 of the mechanism 3, and by a switching means 5 provided at the front step of a prescribed block 2i, the data from a front step block 2i-1 and the data for testing from the memory 4 are switched and supplied. At the time of testing, the data for testing are supplied to a block 2i by the means 5, the output data are stored into the memory 4 as the output data for inspection or the output data are stored through the prescribed number of the rear step logical blocks 2i+1 into the memory 4 as the output data for inspection of the block 2i and the block 2i+1.
JP62197892A 1987-08-07 1987-08-07 Testing system for logical device Pending JPS6441939A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62197892A JPS6441939A (en) 1987-08-07 1987-08-07 Testing system for logical device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62197892A JPS6441939A (en) 1987-08-07 1987-08-07 Testing system for logical device

Publications (1)

Publication Number Publication Date
JPS6441939A true JPS6441939A (en) 1989-02-14

Family

ID=16382026

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62197892A Pending JPS6441939A (en) 1987-08-07 1987-08-07 Testing system for logical device

Country Status (1)

Country Link
JP (1) JPS6441939A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5552216A (en) * 1992-10-07 1996-09-03 Sekisui Chemical Co., Ltd. Electrically conductive composition

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5552216A (en) * 1992-10-07 1996-09-03 Sekisui Chemical Co., Ltd. Electrically conductive composition

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