JPS6441524A - A/d converter - Google Patents

Abstract

PURPOSE:To attain the conversion with high accuracy by constituting the titled A/D converter by a voltage division circuits generating 2<m-2> sets of reference voltages offset sequentially at an equal interval, a differential amplifier group generating a difference voltage between each reference voltage and an input voltage, a multi-input A/D converter and an additional circuit so as to use the inexpensive multi-input A/D converter. CONSTITUTION:A voltage divider 1 generates 2<m-n> (where m, n are positive integers, m>n) sets of reference voltages offset sequentially at an equal interval (in this case, let m be 10 and n be 8). The voltage divider 1 divides the reference voltage Vref into four voltages and offsets them by 1/4 each. The voltages are reference voltages of differential amplifiers 6-9 (amplification factor 4), and the amplifiers 6-9 generate a differential voltage from an input voltage Vi. The four outputs of the amplifiers 6-9 are given to an 8-bit 4-input A/D converter 3, were they are A/D-converted and the result is given to a processor type additional circuit 4 as 8-bit data. The circuit 4 receives only the digital signal from the amplifier, e.g., 7 and adds the bit information specific to the differential amplifier 7 to the most significant bit location of the digital value. Thus, 10-bit A/D conversion is to be implemented.