JPS6437666A - Digital signal processor - Google Patents
Digital signal processorInfo
- Publication number
- JPS6437666A JPS6437666A JP62194894A JP19489487A JPS6437666A JP S6437666 A JPS6437666 A JP S6437666A JP 62194894 A JP62194894 A JP 62194894A JP 19489487 A JP19489487 A JP 19489487A JP S6437666 A JPS6437666 A JP S6437666A
- Authority
- JP
- Japan
- Prior art keywords
- data
- circuit
- address
- ram
- setting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Complex Calculations (AREA)
Abstract
PURPOSE:To eliminate the setting of an address point every sampling period by reading out data from a data RAM and a constant RAM under increment/ decrement control. CONSTITUTION:The titled device is constituted of a pair of digital processing circuits 9, 10, a data I/O circuit 12 connected to data BUSes 1, 2, an interface circuit 13 connected to the BUSes 1, 2, and a control circuit 14 for controlling the operation of the circuits 9, 10, 12, 13. Left channel sampling data outputted from the circuit 12 are stored in the RAM 15 and constant data such as the factor of a digital filter obtained from the circuit 13 are stored in the RAM 10. The address pointer 18 is provided with a register capable of specifying the address of the RAM 15, adding '+1' or '-1' to the address controlled and held by signals INC 1, DEC 1 outputted from the circuit 14 and setting up an optional value and a circuit for comparing the set value with the address data and has a function for turning the device to '0' when the address data exceed the set value, and when the value goes to less than '0', setting up the address data to the set value.
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62194894A JPS6437666A (en) | 1987-08-04 | 1987-08-04 | Digital signal processor |
KR1019880008911A KR0134042B1 (en) | 1987-07-17 | 1988-07-16 | Apparatus & method for processing digital signal |
EP88111551A EP0299537B1 (en) | 1987-07-17 | 1988-07-18 | Apparatus and Method for processing digital signal |
DE3853025T DE3853025T2 (en) | 1987-07-17 | 1988-07-18 | Arrangement and method for digital signal processing. |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62194894A JPS6437666A (en) | 1987-08-04 | 1987-08-04 | Digital signal processor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6437666A true JPS6437666A (en) | 1989-02-08 |
Family
ID=16332097
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62194894A Pending JPS6437666A (en) | 1987-07-17 | 1987-08-04 | Digital signal processor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6437666A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0895953A (en) * | 1994-09-21 | 1996-04-12 | Nec Corp | Correlative arithmetic processor |
-
1987
- 1987-08-04 JP JP62194894A patent/JPS6437666A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0895953A (en) * | 1994-09-21 | 1996-04-12 | Nec Corp | Correlative arithmetic processor |
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