JPS6437392U - - Google Patents
Info
- Publication number
- JPS6437392U JPS6437392U JP1987132701U JP13270187U JPS6437392U JP S6437392 U JPS6437392 U JP S6437392U JP 1987132701 U JP1987132701 U JP 1987132701U JP 13270187 U JP13270187 U JP 13270187U JP S6437392 U JPS6437392 U JP S6437392U
- Authority
- JP
- Japan
- Prior art keywords
- inverter device
- cpu
- signal
- selection command
- terminal block
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
Landscapes
- Power Conversion In General (AREA)
Description
第１図及び第２図はこの考案の一実施例を示し
、第１図はインバータ装置のブロツク図、第２図
はＣＰＵのフロー図であり、第３図は従来のイン
バータ装置のブロツク図である。
１はコンバータ部、２はコンデンサ、３はイン
バータ部、４はＣＰＵ、５は運転指令器、６，７
，８は各々外部信号出力用の増幅器、抵抗、絶縁
素子、９は端子台である。なお、図中、同一符号
は同一、又は相当部分を示す。
Fig. 1 and Fig. 2 show an embodiment of this invention, Fig. 1 is a block diagram of an inverter device, Fig. 2 is a flow diagram of a CPU, and Fig. 3 is a block diagram of a conventional inverter device. be. 1 is a converter section, 2 is a capacitor, 3 is an inverter section, 4 is a CPU, 5 is an operation command device, 6, 7
, 8 are amplifiers, resistors, and insulation elements for outputting external signals, and 9 is a terminal block. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.
Claims (1)
が可能なインバータ装置において、上記インバー
タ装置の運転状態を示す信号を複数個作成する機
能を備えたＣＰＵと、上記ＣＰＵに出力する信号
の選択指令をする機能とを備え、上記ＣＰＵで作
成された複数個の信号の中から、選択指令を受け
た信号を選び出すとともに、この信号を端子台を
介してインバータ装置外部に出力することを特徴
としたインバータ装置。 In an inverter device capable of obtaining alternating current power of variable voltage and variable frequency, a CPU is provided with a function of creating a plurality of signals indicating the operating status of the inverter device, and a selection command is given to the signal to be output to the CPU. An inverter device characterized in that it selects a signal that has received a selection command from among a plurality of signals created by the CPU, and outputs this signal to the outside of the inverter device via a terminal block. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987132701U JPS6437392U (en) | 1987-08-31 | 1987-08-31 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987132701U JPS6437392U (en) | 1987-08-31 | 1987-08-31 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6437392U true JPS6437392U (en) | 1989-03-07 |
Family
ID=31389907
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987132701U Pending JPS6437392U (en) | 1987-08-31 | 1987-08-31 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6437392U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011509848A (en) * | 2008-01-16 | 2011-03-31 | ソシエテ・ビック | Writing instrument with eraser protected by sleeve |
-
1987
- 1987-08-31 JP JP1987132701U patent/JPS6437392U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011509848A (en) * | 2008-01-16 | 2011-03-31 | ソシエテ・ビック | Writing instrument with eraser protected by sleeve |