JPS6431442A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS6431442A JPS6431442A JP18820187A JP18820187A JPS6431442A JP S6431442 A JPS6431442 A JP S6431442A JP 18820187 A JP18820187 A JP 18820187A JP 18820187 A JP18820187 A JP 18820187A JP S6431442 A JPS6431442 A JP S6431442A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- width
- silicon
- active region
- polycrystalline silicon
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
PURPOSE:To miniaturize an element without increasing the width of a polycrystalline silicon at a hole by forming the width of a polycrystalline silicon layer for bringing into contact with a silicide layer formed on an active region on a silicon substrate surrounded by an insulator at a value equal to or less than the width of the silicide layer. CONSTITUTION:The four sides of the active region 101 of a semiconductor substrate 100 is surrounded by an insulating film 102, such as a silicon oxide film, and a silicon nitride film, and a silicide layer 103 is formed on the opening 104 of the active region. Then, when the polycrystalline silicon is etched, the silicon substrate of the active region of an element for obtaining the etching selection ratio of 5:1 is not etched between a polycrystalline silicon layer 105 and the layer 103, it is not necessary to increase the width of the silicon layer, and the width of the silicon layer can be formed at a value less than the width of the layer 103 when the active region of the element is brought into contact with the layer 105 through the opening 104. Accordingly, the element can be miniaturized without increasing the width of the polycrystalline silicon.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18820187A JPS6431442A (en) | 1987-07-28 | 1987-07-28 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18820187A JPS6431442A (en) | 1987-07-28 | 1987-07-28 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6431442A true JPS6431442A (en) | 1989-02-01 |
Family
ID=16219544
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP18820187A Pending JPS6431442A (en) | 1987-07-28 | 1987-07-28 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6431442A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5707770A (en) * | 1994-11-08 | 1998-01-13 | Canon Kabushiki Kaisha | Toner for developing electrostatic images, two component type developer, developing method, image forming method, heat fixing method, and process for producing toner |
-
1987
- 1987-07-28 JP JP18820187A patent/JPS6431442A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5707770A (en) * | 1994-11-08 | 1998-01-13 | Canon Kabushiki Kaisha | Toner for developing electrostatic images, two component type developer, developing method, image forming method, heat fixing method, and process for producing toner |
US5824442A (en) * | 1994-11-08 | 1998-10-20 | Canon Kabushiki Kaisha | Developing method, image forming method, and heat fixing method, with toner |
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