JPS642419A - Pll circuit - Google Patents

Pll circuit

Info

Publication number
JPS642419A
JPS642419A JP62158516A JP15851687A JPS642419A JP S642419 A JPS642419 A JP S642419A JP 62158516 A JP62158516 A JP 62158516A JP 15851687 A JP15851687 A JP 15851687A JP S642419 A JPS642419 A JP S642419A
Authority
JP
Japan
Prior art keywords
frequency
period
output
period data
limit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62158516A
Other languages
Japanese (ja)
Other versions
JPH012419A (en
JP2638810B2 (en
Inventor
Shinichi Fukuda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP62158516A priority Critical patent/JP2638810B2/en
Publication of JPH012419A publication Critical patent/JPH012419A/en
Publication of JPS642419A publication Critical patent/JPS642419A/en
Application granted granted Critical
Publication of JP2638810B2 publication Critical patent/JP2638810B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

PURPOSE: To prevent the frequency of a PLL output from being disordered by providing a decision means which compares frequency information based upon an output signal with one border frequency and decides whether or not the frequency information is within the border and a frequency forcible setting means which sets the frequency of the output signal to a specific reference frequency forcibly according to the output of the decision means.
CONSTITUTION: A period decision circuit 36 compares periods corresponding to specific upper-limit and lower-limit frequencies with output clock period data to decide whether or not the period data is within a period range corresponding to a specific frequency range. Further, a period data forcible setting circuit 37 is interposed and connected between a latch circuit 24 and an adder 23, and sets output clock period data forcibly to period data as a specific reference according to the output of the period decision circuit 36 and sends it to the adder 23. Then when the period data varies beyond the range between the specific upper-limit frequency fa and lower-limit frequency fb, the data is set to a reference frequency fc nearly in the center of the frequency range forcibly. Consequently, a large frequency shift is suppressed effectively.
COPYRIGHT: (C)1989,JPO&Japio
JP62158516A 1987-06-25 1987-06-25 PLL circuit Expired - Lifetime JP2638810B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62158516A JP2638810B2 (en) 1987-06-25 1987-06-25 PLL circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62158516A JP2638810B2 (en) 1987-06-25 1987-06-25 PLL circuit

Publications (3)

Publication Number Publication Date
JPH012419A JPH012419A (en) 1989-01-06
JPS642419A true JPS642419A (en) 1989-01-06
JP2638810B2 JP2638810B2 (en) 1997-08-06

Family

ID=15673448

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62158516A Expired - Lifetime JP2638810B2 (en) 1987-06-25 1987-06-25 PLL circuit

Country Status (1)

Country Link
JP (1) JP2638810B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05110423A (en) * 1991-10-15 1993-04-30 Nec Kyushu Ltd Digital phase control circuit
JPH07162300A (en) * 1993-12-08 1995-06-23 Nec Corp Pll oscillator

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52120661A (en) * 1976-04-02 1977-10-11 Nec Corp Automatic frequency control unit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52120661A (en) * 1976-04-02 1977-10-11 Nec Corp Automatic frequency control unit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05110423A (en) * 1991-10-15 1993-04-30 Nec Kyushu Ltd Digital phase control circuit
JPH07162300A (en) * 1993-12-08 1995-06-23 Nec Corp Pll oscillator

Also Published As

Publication number Publication date
JP2638810B2 (en) 1997-08-06

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