JPS6415820A - Integrated circuit - Google Patents
Integrated circuitInfo
- Publication number
- JPS6415820A JPS6415820A JP62170920A JP17092087A JPS6415820A JP S6415820 A JPS6415820 A JP S6415820A JP 62170920 A JP62170920 A JP 62170920A JP 17092087 A JP17092087 A JP 17092087A JP S6415820 A JPS6415820 A JP S6415820A
- Authority
- JP
- Japan
- Prior art keywords
- high frequency
- clock
- reference signal
- integrated circuit
- constitution
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Semiconductor Integrated Circuits (AREA)
Abstract
PURPOSE:To suppress the electromagnetic interference by producing a high frequency clock in an integrated circuit IC based on a reference signal of a low frequency applied from outside. CONSTITUTION:A reference signal of a low frequency supplied from outside and a reference signal of a high frequency produced by a divider 5 undergo the phase synchronization in an IC 1 via a PLL containing a phase comparator 2, an LPF 3, a VCO 4, etc. Thus an internal clock of a high frequency is produced and used by a logic circuit part 6, an A/D converter 7, a D/A converter 8, etc., in the IC 1. Then a clock line and an earth line which form a loop serve as antennas to reduce the high frequency electromagnetic radiation in such a constitution where no external clock of a high frequency is used. As a result, the electromagnetic interference is suppressed for a VTR, a microcomputer, etc.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62170920A JPS6415820A (en) | 1987-07-10 | 1987-07-10 | Integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62170920A JPS6415820A (en) | 1987-07-10 | 1987-07-10 | Integrated circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6415820A true JPS6415820A (en) | 1989-01-19 |
Family
ID=15913803
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62170920A Pending JPS6415820A (en) | 1987-07-10 | 1987-07-10 | Integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6415820A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04139964A (en) * | 1990-10-01 | 1992-05-13 | Sega Enterp Ltd | Synchronizing system for plural devices |
US5565816A (en) * | 1995-08-18 | 1996-10-15 | International Business Machines Corporation | Clock distribution network |
JPH0954629A (en) * | 1995-08-16 | 1997-02-25 | Nec Corp | Microcomputer |
EP0779659A2 (en) | 1995-12-15 | 1997-06-18 | Nec Corporation | Semiconductor integrated circuit |
US5774015A (en) * | 1994-12-15 | 1998-06-30 | Nec Corporation | Compact semiconductor integrated circuit capable of reducing electromagnetic emission |
-
1987
- 1987-07-10 JP JP62170920A patent/JPS6415820A/en active Pending
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04139964A (en) * | 1990-10-01 | 1992-05-13 | Sega Enterp Ltd | Synchronizing system for plural devices |
US5774015A (en) * | 1994-12-15 | 1998-06-30 | Nec Corporation | Compact semiconductor integrated circuit capable of reducing electromagnetic emission |
JPH0954629A (en) * | 1995-08-16 | 1997-02-25 | Nec Corp | Microcomputer |
US5565816A (en) * | 1995-08-18 | 1996-10-15 | International Business Machines Corporation | Clock distribution network |
EP0779659A2 (en) | 1995-12-15 | 1997-06-18 | Nec Corporation | Semiconductor integrated circuit |
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