JPS6414944A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS6414944A
JPS6414944A JP17158387A JP17158387A JPS6414944A JP S6414944 A JPS6414944 A JP S6414944A JP 17158387 A JP17158387 A JP 17158387A JP 17158387 A JP17158387 A JP 17158387A JP S6414944 A JPS6414944 A JP S6414944A
Authority
JP
Japan
Prior art keywords
electrode plate
heat sink
plate
bonded
hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17158387A
Other languages
Japanese (ja)
Inventor
Junichi Yoshioka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP17158387A priority Critical patent/JPS6414944A/en
Publication of JPS6414944A publication Critical patent/JPS6414944A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

PURPOSE:To keep insulation between an electrode plate and a heat sink excellently, by providing a positioning hole in the electrode plate, which is bonded to the insulating plate on the heat sink beforehand, and providing a projection, which is coupled into said hole, in the heat sink. CONSTITUTION:An electrode plate 1 and a semiconductor chip 4 are bonded to an insulating plate 1 on a heat sink 2. A projection 12 is coupled into a hole 11. Thus the electrode plate 3 is positioned at the specified bonding position with respect to the insulating plate 3. After the electrode plate 3 is bent upward, the plate and a semiconductor chip 4 are connected with a wire 5. The semiconductor chip 4 and the like in a case 6 are packaged with silicon gel 7 and epoxy resin 8. Since the positioning hole 11 is provided in the electrode plate 3, which is bonded to the insulating plate 1 on the heat sink 2 and the projection 12, which is coupled into the hole, is provided; the bonding position is determined as specified when the electrode plate is bonded to the insulating plate, and the insulation between the electrode plate and the heat sink is kept excellently.
JP17158387A 1987-07-08 1987-07-08 Manufacture of semiconductor device Pending JPS6414944A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17158387A JPS6414944A (en) 1987-07-08 1987-07-08 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17158387A JPS6414944A (en) 1987-07-08 1987-07-08 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS6414944A true JPS6414944A (en) 1989-01-19

Family

ID=15925844

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17158387A Pending JPS6414944A (en) 1987-07-08 1987-07-08 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS6414944A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0465084A2 (en) * 1990-06-26 1992-01-08 Harris Semiconductor Patents, Inc. Heat sink and multi mount pad lead frame package and method for electrically isolating semiconductor die(s)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0465084A2 (en) * 1990-06-26 1992-01-08 Harris Semiconductor Patents, Inc. Heat sink and multi mount pad lead frame package and method for electrically isolating semiconductor die(s)
EP0465084A3 (en) * 1990-06-26 1993-02-10 Harris Semiconductor Patents, Inc. Heat sink and multi mount pad lead frame package and method for electrically isolating semiconductor die(s)

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