JPS6412542A - Parallel tester - Google Patents

Abstract

PURPOSE:To accomplish high-accuracy positioning by a method wherein abutting is made between test chip signal terminals on a semiconductor wafer and parallel chip test wafer signal terminals by detecting the quantity of infrared rays that have been transmitted. CONSTITUTION:Synchronism is established between an infrared source 7, an infrared lens 8, and an infrared detector 9, and the optical axis is allowed to swing from left to right for scanning, when infrared rays are transmitted through the sector between the right-hand end of an alignment mark 5 of an evaluation wafer 4 and the left-hand end of an alignment mark 2 of a judgment wafer 1. The infrared rays land on the infrared detector 9 for the determination of the position of the right-hand end of the alignment mark 5 and the left-hand end of the alignment mark 2. As the result, the distance d1 between the right- hand end of the mark 5 and the left-hand end of the mark 2 may be accurately determined. Similarly, the distance d2 between the right-hand end of the mark 2 and the right-hand end of a mark 6 may be obtained. Optical axis scanning is repeated and the evaluation wafer 4 is trimmed right and left until the distance d1 is equal to the distance 2. This method ensures an accurate positioning, which may be accomplished with ease.