JPS639310A - Receiver - Google Patents

Receiver

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Publication number
JPS639310A
JPS639310A JP15361686A JP15361686A JPS639310A JP S639310 A JPS639310 A JP S639310A JP 15361686 A JP15361686 A JP 15361686A JP 15361686 A JP15361686 A JP 15361686A JP S639310 A JPS639310 A JP S639310A
Authority
JP
Japan
Prior art keywords
controller
signal
circuit
control signal
channel selection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15361686A
Other languages
Japanese (ja)
Other versions
JPH0423962B2 (en
Inventor
Yukihiro Kawamoto
川本 幸広
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP15361686A priority Critical patent/JPS639310A/en
Publication of JPS639310A publication Critical patent/JPS639310A/en
Publication of JPH0423962B2 publication Critical patent/JPH0423962B2/ja
Granted legal-status Critical Current

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  • Channel Selection Circuits, Automatic Tuning Circuits (AREA)

Abstract

PURPOSE:To surely control the gain control operation by providing a controller outputting a muting control signal in response to the automatic channel selection, and controlling the detecting sensitivity of carrier detecting means based on the muting control signal supplied from the controller. CONSTITUTION:With the muting control signal S3 from the controller 10 at an L level, that is, with the titled receiver in the tuning state, since a switching transistor (TR) 31 is turned off, a TR 25 amplifies an intermediate frequency signal by an amplification factor decided by an emitter resistor 32. with the muting control signal S3 from the controller 10 at an H level, that is, the receiver in the channel selection state, since the switching TR 31 is turned on, the emitter of the TR 25 is connected to ground, then the emitter current is increased. Thus, the amplification factor of the TR 25 is increased thereby increasing the detection sensitivity. Further, the operation stop by the automatic channel selection and the gain control operation by a gain control means are ensured with high accuracy.

Description

【発明の詳細な説明】 (イ)産業上の利用分野 本発明は中間周波信号に含まれるキャリア分のレベルを
検出するキャリア検出手段を具備し、このキャリア検出
手段からの狭帯域の検出信号に基づき自動選局動作を停
止せしめるようにした受信装置に関するものである。
DETAILED DESCRIPTION OF THE INVENTION (A) Industrial Application Field The present invention comprises a carrier detection means for detecting the level of a carrier included in an intermediate frequency signal, and detects a narrow band detection signal from the carrier detection means. This invention relates to a receiving device that stops an automatic channel selection operation based on the following information.

(ロ) 従来の技術 従来、中間周波信号に含まれるキャリア分のレベルを検
出し、このレベルが所定レベル以上となったとき、自動
選局動作を停止せしめるようにした受信装置は公知であ
る(例えば、実開昭56−26436号公報参照)。
(B) Prior Art Conventionally, there is a known receiving device that detects the level of a carrier included in an intermediate frequency signal and stops automatic channel selection when this level exceeds a predetermined level. For example, see Japanese Utility Model Application Publication No. 56-26436).

此種受信装置について第3図を参照して説明する。This type of receiving device will be explained with reference to FIG.

第3図(ζおいて、(1)はアンテナ、(2)は高周波
増幅回路、−(3)は混合回路、(4)は局部発振回路
となるPLL回1で、mffE制御発振回t+1 (V
 CO) (51c、このV CO(51の発振出力を
1/N分周するプログラマブル分局器(6)と、このプ
ログラマブル分周器(61の分周出力と基準発振器(7
)の発振出力の位相を比較する位…比・咬回路(8)と
、この位相比較回路(8)からの位相差信号を直流電圧
に変換するローノマスフィルタ(L P F ) (9
+とより構成されている。U■は操作部01)の操作に
応答して例えばプログラマブル分周器(6)の分周比N
を変更するコントローラ、叩は中間周波増幅回路、印は
中間周波増幅回路■の出力に含まれるキャリア分を検出
するキャリア検出回路、圓は検波回路である。
In Figure 3 (ζ), (1) is the antenna, (2) is the high frequency amplifier circuit, - (3) is the mixing circuit, (4) is the local oscillation circuit, PLL circuit 1, mffE control oscillation circuit t+1 ( V
CO) (51c, a programmable divider (6) that divides the oscillation output of this VCO (51) by 1/N, and a programmable divider (6) that divides the frequency output of this programmable frequency divider (61) and a reference oscillator (7).
) for comparing the phases of the oscillation outputs of the phase comparison circuit (8) and the lonomass filter (L P F ) (9) for converting the phase difference signal from the phase comparison circuit (8) into a DC voltage.
It is composed of +. For example, U■ changes the frequency division ratio N of the programmable frequency divider (6) in response to the operation of the operation unit 01).
The controller that changes the , the mark is the intermediate frequency amplification circuit, the mark is the carrier detection circuit that detects the carrier contained in the output of the intermediate frequency amplification circuit (■), and the circle is the detection circuit.

次に、動作について説明する。Next, the operation will be explained.

自動選局するために操作部Ql)の自動選局釦(図示せ
ず)を操作すると、自動選局動作開始信号(α0)はこ
れに基ついてプログラマ八分周器(6)の分局比Nを例
えば局間周波数ステップで順次可変する。
When the automatic tuning button (not shown) on the operation unit Ql is operated for automatic tuning, the automatic tuning operation start signal (α0) is set based on the automatic tuning operation start signal (α0) to be set at the division ratio N of the programmer 8 divider (6). is sequentially varied, for example, in inter-station frequency steps.

斯る自動選局動作が進み、受信機が成る放送周波数に同
調され、且つ所定レベル以上の中間周波信号成分(キャ
リア成分)が存在すると、キャリア検出回路αJにて該
キャリア成分が検出され、コントローラα0)への信号
(S2)がHレベルとなるため、コントローラα■はこ
れに基づき前述したプログラマブル分周器(6)の分周
比可変動作を停止し、以って自動選局動作が停止する。
When such automatic channel selection operation progresses and the receiver is tuned to the broadcast frequency and an intermediate frequency signal component (carrier component) of a predetermined level or higher is present, the carrier component is detected by the carrier detection circuit αJ, and the controller Since the signal (S2) to α0) becomes H level, the controller α stops the frequency division ratio variable operation of the programmable frequency divider (6) mentioned above based on this, and therefore the automatic channel selection operation stops. do.

ところで、受信装置では、一般に混変調妨害を改善する
ために高周波増幅段や中間周波増幅段の利得を入力信号
の大きさに応じて自動的に制御する自動利得制御回路を
備えている。
By the way, in order to improve cross-modulation interference, a receiving device is generally equipped with an automatic gain control circuit that automatically controls the gain of a high frequency amplification stage or an intermediate frequency amplification stage according to the magnitude of an input signal.

(ハ)発明が解決しようとする問題点 上記従来の技術では、混変調妨害を改善するために自動
利得制御回路にて例えば高周波増幅段の利得を制御する
ようにしているため、混変調妨害発生時、希望放送周波
数信号成分のレベルが低減され、希望放送周波数に自動
同調することが出来ないという問題を発生する惧れがあ
る。
(C) Problems to be Solved by the Invention In the above conventional technology, in order to improve cross-modulation interference, an automatic gain control circuit controls the gain of, for example, a high-frequency amplification stage, so cross-modulation interference occurs. At this time, the level of the desired broadcast frequency signal component may be reduced, causing a problem that automatic tuning to the desired broadcast frequency may not be possible.

に)問題点を解決するための手段 上記の問題点に&み、本発明は中間周波信号1こ含まれ
るキャリア分のレベルを検出するキャリア検出手段を具
備し、該キャリア検出手段からの狭帯域の検出信号に基
づき自動選局動作を停止せしめるようにした受信装置で
あって、入力信号レベルに応じて高周波増幅段若しくは
中間周波増幅段の利得を制御する利得制御手段と、前記
キャリア検出手段の出力に応答して前記利得制御手段の
動作を制御する制御信号を出力する腓骨制御手段と、自
動選局動作に応答して少なくともミューティング制両信
号を出力するコントローラとを備え、このコントローラ
からのミューティング制御信号に基づき前記キャリア検
出手段の検出感度を制御するようにした。
B) Means for Solving the Problems In consideration of the above problems, the present invention comprises a carrier detection means for detecting the level of a carrier included in one intermediate frequency signal, and a narrowband signal from the carrier detection means. A receiving device configured to stop an automatic channel selection operation based on a detection signal of the carrier detection device, the receiver comprising: gain control means for controlling the gain of a high frequency amplification stage or an intermediate frequency amplification stage according to an input signal level; a fibula control means for outputting a control signal for controlling the operation of the gain control means in response to the output; and a controller for outputting at least a muting control signal in response to the automatic channel selection operation; The detection sensitivity of the carrier detection means is controlled based on the muting control signal.

G利作用 上記の構成において、自動選局動作時には、コントロー
ラからのミューティング制御信号1こ基づきキャリア検
出手段の検出感度を例えば高くし、自動選局動作停止の
精度を向上させると共に例えば利得制御手段を不動作状
態となし、自動選局動作停止時には、コントローラから
のミューティング制御信号ζこ基づきキャリア検出手段
の検出感度を低くすると共1こ利得制御手段を能動状態
となす。
G utilization In the above configuration, during the automatic tuning operation, the detection sensitivity of the carrier detection means is increased based on one muting control signal from the controller, and the accuracy of stopping the automatic tuning operation is improved, and, for example, the gain control means When the automatic channel selection operation is stopped, the detection sensitivity of the carrier detection means is lowered based on the muting control signal ζ from the controller, and the gain control means is activated.

(へ) 実施例 第1図は本発明の一実施例を示す図である。尚、第1図
において第3図と同一部分には同一符号を付すと共にそ
の説明を省略する。
(f) Embodiment FIG. 1 is a diagram showing an embodiment of the present invention. In FIG. 1, the same parts as in FIG. 3 are designated by the same reference numerals, and their explanations will be omitted.

第1図において、α■はキャリア検出回路(13)の出
力に応答して自動利得制御回路(AGC回路) (16
)の動作を制御するAGC制御回路である。
In Fig. 1, α■ is an automatic gain control circuit (AGC circuit) (16) in response to the output of the carrier detection circuit (13).
) is an AGC control circuit that controls the operation of the

次に、動作について説明する。Next, the operation will be explained.

自動選局するために操作部Uの自動選局釦(図示せず)
を操作すると、自動選局動作開始信号(Sl)がコント
ローラααに供給され、コントローラα0はこれに基づ
いてプログラマブル分周器(6)の分局比Nを例えば局
間周波数ステップで順次可変する。
Automatic tuning button (not shown) on operation unit U for automatic tuning
When operated, an automatic channel selection operation start signal (Sl) is supplied to the controller αα, and based on this, the controller α0 sequentially varies the division ratio N of the programmable frequency divider (6), for example, in inter-station frequency steps.

斯る自動選局動作が進み、受信機が成る放送周波数に同
調され、且つ所定レベル以上の中間周波信号成分(キャ
リア成分)が存在すると、キャリア検出回路t131に
て該キャリア成分が検出され、コントローラα0)への
信号(S2)のレヘルカ所定レベル以上となるため、コ
ントローラ(10)はこれに基づき前述したプログラマ
ブル分周器(6)の分周比可変動作を停止し、以って自
動選局動作が停止する。
When such automatic channel selection operation progresses and the receiver is tuned to the broadcast frequency and there is an intermediate frequency signal component (carrier component) of a predetermined level or higher, the carrier component is detected by the carrier detection circuit t131 and the controller Since the signal (S2) to α0) becomes equal to or higher than the predetermined level, the controller (10) stops the frequency division ratio variable operation of the programmable frequency divider (6) described above based on this, and automatically selects a channel. Operation stops.

また、本発明では自動選局動作開始信号(Sl)の発生
からキャリア検出回路(13)の検出信号が所定レベル
以上となるまでの間、即ち選局動作の間コントローラα
0)から発生されろミューティング制御信号(S3)を
利用してキャリア検出回路側の検出感度を高くし、自動
選局動作の停止精度を向上させると共にAGC回路αe
の動作切換を確実に達成するようにしている。
Furthermore, in the present invention, the controller α
Using the muting control signal (S3) generated from 0), the detection sensitivity of the carrier detection circuit side is increased, and the accuracy of stopping the automatic tuning operation is improved, and the AGC circuit αe
This ensures that operation switching is achieved.

斯る動作について第2図を参照して更に詳細に説明する
This operation will be explained in more detail with reference to FIG.

第2図において、αηは高周波増幅用のFET、丁 α引よF EA(17)のドレイン側に接続された同調
回路で、PLL回路(4)のLPF(91出力が供給さ
れる可変茶屋ダイオードα■を備えている。■はAGC
回路回路槽成するFETで、FETQ′rIの出力を増
幅する増幅素子として作用する。Cυは検波用のトラン
ジスタ、@は平滑回路、乃は平滑回路■の電圧により制
御される高周波入力制御用トランジスタ、(財)は中間
周波フィルタとなるセラミックフィルタ、内はキャリア
検出回路(2)を構成するトランジスタで、中間周波信
号を増幅する増幅素子として作用する。■は同じくキャ
リア検出回路αJを構成するトランジスタで、狭帯域特
性を有する共振子(イ)によって定まる帯域の信号を増
幅する増幅素子として作用する。のは検波用のトランジ
スタ、のは平滑回路、(31りは平滑回路(29)の電
圧により制御されるトランジスタ、01)はコントロー
ラ00)からのミューティング制御信号(S3)により
オン・オフ制御されるスイッチングトランジスタである
In Figure 2, αη is a high-frequency amplification FET, a tuning circuit connected to the drain side of FEA (17), and a variable Chaya diode to which the LPF (91 output is supplied) of the PLL circuit (4). Equipped with α■.■ is AGC
This FET constitutes a circuit cell and acts as an amplifying element that amplifies the output of FET Q'rI. Cυ is a transistor for detection, @ is a smoothing circuit, ナ is a high-frequency input control transistor controlled by the voltage of the smoothing circuit ■, ア is a ceramic filter that becomes an intermediate frequency filter, and inside is a carrier detection circuit (2). The constituent transistors act as amplifying elements that amplify intermediate frequency signals. A transistor (2) also constitutes the carrier detection circuit αJ, and acts as an amplification element that amplifies the signal in the band determined by the resonator (A) having narrow band characteristics. 1 is a transistor for detection, 1 is a smoothing circuit, (31 is a transistor controlled by the voltage of the smoothing circuit (29), 01 is a transistor controlled by the muting control signal (S3) from the controller 00). This is a switching transistor.

斯る回路において、コントローラQO)からのミューテ
ィング制御信号(S3)がLレベルのとき、即ち受信装
置が同調状態にあるときには、スイッチングトランジス
タ(9)はオフとなっているため、トランジスタ囚はエ
ミッタ抵抗■によって定まる増幅度にて中間周波信号を
増幅する。斯る増幅出力は、トランジスタ困にて共振子
方によって定まる帯域特性で更に増幅された後、トラン
ジスタ(支)で検波され、平滑回路(支)で平滑される
In such a circuit, when the muting control signal (S3) from the controller (QO) is at L level, that is, when the receiving device is in the tuned state, the switching transistor (9) is off, so the transistor prisoner is connected to the emitter. The intermediate frequency signal is amplified with the amplification degree determined by the resistor ■. The amplified output is further amplified by the transistor according to the band characteristics determined by the resonator, then detected by the transistor (support), and smoothed by the smoothing circuit (support).

このとき、受信装置は同調状態にあるため、上記平滑回
路ので平滑された直流電圧はトランジスタ■のカットオ
フ電圧以上であり、トランジスタ■はオンしている。
At this time, since the receiving device is in a tuned state, the DC voltage smoothed by the smoothing circuit is higher than the cutoff voltage of transistor (2), and transistor (2) is turned on.

従って、FET■のソースは抵抗国及びコンデンサ(至
)よりなる並列回路を介して接地され、所定の増幅度で
高周波入力信号を増幅する。斯る増幅出力はトランジス
タの)にて検波された後、平滑回路にで平滑されろ。斯
る平滑出力に応じて、即ち平滑出力が大のとき(高周波
入力信号が大レベルのとき)、トランジスタのを導通せ
しめ、高周波入力信号の一部を側路する。
Therefore, the source of FET (2) is grounded through a parallel circuit consisting of a resistor and a capacitor (total), and a high frequency input signal is amplified with a predetermined amplification degree. After the amplified output is detected by the transistor, it is smoothed by a smoothing circuit. Depending on the smoothed output, that is, when the smoothed output is large (when the high frequency input signal is at a high level), the transistor is made conductive and a part of the high frequency input signal is bypassed.

また、コントローラαOからのミューティング制御信号
(S3)がHレベルのとき、即ち受信装置が選局状態に
あるときには、スイッチングトランジスタc31)がオ
ンとなっているため、トランジスタ囚のエミッタが接地
され、エミッタ電流が増大する。
Further, when the muting control signal (S3) from the controller αO is at H level, that is, when the receiving device is in the tuning state, the switching transistor c31) is on, so the emitter of the transistor is grounded. Emitter current increases.

従って、トランジスタ囚の増幅度が増大し、以って検出
感度が高くなる。
Therefore, the degree of amplification of the transistor increases, thereby increasing the detection sensitivity.

このとき、受信装置は選局動作状態にあるため、平滑回
路囚の平滑出力は小さく、トランジスタ(30)のカッ
トオフ電圧以下となり、トランジスタ■はオフとなって
いる。従って、AGC回路(10は不動作状態に設定さ
れる。尚、実施例では、AGC回路αeはRF回路(2
)の利得のみを制御する場合について説明したが、IF
回路のみや両方の回路の利 得を制御するようにしても
よい。
At this time, since the receiving device is in the tuning operation state, the smoothed output of the smoothing circuit is small and is below the cutoff voltage of the transistor (30), and the transistor (3) is turned off. Therefore, the AGC circuit (10) is set to a non-operating state. In the embodiment, the AGC circuit αe is set to the RF circuit (2).
), we have explained the case where only the gain of IF
The gain of only the circuit or both circuits may be controlled.

(ト)発明の効果 本発明に依れば、中間周波信号に含まれるキャリア分の
レベルを検出するキャリア検出手段を具備し、該キャリ
ア検出手段からの狭帯域の検出信号に基づき自動選局動
作を停止せしめるようにした受信装置であって、入力信
号レベルに応じて増幅段の利得を制御する利得制御手段
と、前記キャリア検出手段の出力に応答して前記利得制
御手段の動作を制御するための制御信号を出力する制御
手段と、自動選局動作に応答して少なくともミューティ
ング制御信号を出力するコントローラとを備え、このコ
ントローラからのミューティング制御信号に基づき前記
キャリア検出手段の検出感度を制御するようにしたので
、自動選局動作停止及び利得制御手段による利得制御動
作を確実に、然も精度よく達成することが出来る。
(g) Effects of the Invention According to the present invention, a carrier detection means for detecting the level of a carrier included in an intermediate frequency signal is provided, and automatic channel selection is performed based on a narrowband detection signal from the carrier detection means. a receiving device configured to stop the carrier detection means, the receiver comprising: gain control means for controlling the gain of the amplification stage according to the input signal level; and control of the operation of the gain control means in response to the output of the carrier detection means. and a controller that outputs at least a muting control signal in response to the automatic channel selection operation, and controls the detection sensitivity of the carrier detection means based on the muting control signal from the controller. As a result, the automatic channel selection operation can be stopped and the gain control operation performed by the gain control means can be achieved reliably and accurately.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を示す図、第2図はその要部
を示す図、第3図は従来例を示す図である。 (2)・・・高周波増幅回路、00)・・・コントロー
ラ、(13)−・・キャリア検出回路、(15)・・・
AGC制御回路、06)・・・自動利得制御回路。 ′ 出願人 三洋電機株式会社
FIG. 1 is a diagram showing an embodiment of the present invention, FIG. 2 is a diagram showing the main part thereof, and FIG. 3 is a diagram showing a conventional example. (2)...High frequency amplifier circuit, 00)...Controller, (13)-...Carrier detection circuit, (15)...
AGC control circuit, 06)... automatic gain control circuit. ′ Applicant Sanyo Electric Co., Ltd.

Claims (1)

【特許請求の範囲】[Claims] (1)中間周波信号に含まれるキャリア分のレベルを検
出するキャリア検出手段を具備し、該キャリア検出手段
からの狭帯域の検出信号に基づき自動選局動作を停止せ
しめるようにした受信装置であつて、入力信号レベルに
応じて高周波増幅段若しくは中間周波増幅段の利得を制
御する利得制御手段と、前記キャリア検出手段の出力に
応答して前記利得制御手段の動作を制御するための制御
信号を出力する制御手段と、自動選局動作に応答して少
なくともミューティング制御信号を出力するコントロー
ラとを備え、このコントローラからのミューティング制
御信号に基づき前記キャリア検出手段の検出感度を制御
するようにしたことを特徴とする受信装置。
(1) A receiving device comprising carrier detection means for detecting the level of a carrier included in an intermediate frequency signal, and configured to stop automatic tuning operation based on a narrowband detection signal from the carrier detection means. gain control means for controlling the gain of the high frequency amplification stage or the intermediate frequency amplification stage according to the input signal level; and a control signal for controlling the operation of the gain control means in response to the output of the carrier detection means. and a controller that outputs at least a muting control signal in response to the automatic channel selection operation, and the detection sensitivity of the carrier detection means is controlled based on the muting control signal from the controller. A receiving device characterized by:
JP15361686A 1986-06-30 1986-06-30 Receiver Granted JPS639310A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15361686A JPS639310A (en) 1986-06-30 1986-06-30 Receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15361686A JPS639310A (en) 1986-06-30 1986-06-30 Receiver

Publications (2)

Publication Number Publication Date
JPS639310A true JPS639310A (en) 1988-01-16
JPH0423962B2 JPH0423962B2 (en) 1992-04-23

Family

ID=15566383

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15361686A Granted JPS639310A (en) 1986-06-30 1986-06-30 Receiver

Country Status (1)

Country Link
JP (1) JPS639310A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5916156A (en) * 1982-07-19 1984-01-27 Matsushita Electric Ind Co Ltd Optical memory medium
JPH0492461U (en) * 1990-12-27 1992-08-12

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56140235U (en) * 1980-03-19 1981-10-23
JPS6032832U (en) * 1983-08-09 1985-03-06 パイオニア株式会社 Receiver automatic channel selection device

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6032832B2 (en) * 1978-07-26 1985-07-30 シチズン時計株式会社 electronic clock

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56140235U (en) * 1980-03-19 1981-10-23
JPS6032832U (en) * 1983-08-09 1985-03-06 パイオニア株式会社 Receiver automatic channel selection device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5916156A (en) * 1982-07-19 1984-01-27 Matsushita Electric Ind Co Ltd Optical memory medium
JPH0492461U (en) * 1990-12-27 1992-08-12

Also Published As

Publication number Publication date
JPH0423962B2 (en) 1992-04-23

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