JPS6384629U - - Google Patents

Info

Publication number
JPS6384629U
JPS6384629U JP17885286U JP17885286U JPS6384629U JP S6384629 U JPS6384629 U JP S6384629U JP 17885286 U JP17885286 U JP 17885286U JP 17885286 U JP17885286 U JP 17885286U JP S6384629 U JPS6384629 U JP S6384629U
Authority
JP
Japan
Prior art keywords
power supply
memory
capacitor
main power
battery
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17885286U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP17885286U priority Critical patent/JPS6384629U/ja
Publication of JPS6384629U publication Critical patent/JPS6384629U/ja
Pending legal-status Critical Current

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  • Power Sources (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案におけるメモリバツクアツプ回
路の一実施例を示す回路図である。 図中、11は電池、15はメモリ、P,Nは電
源供給端子、Vは主電源、C1は第1コンデンサ
、C2は第2コンデンサである。
FIG. 1 is a circuit diagram showing an embodiment of a memory backup circuit according to the present invention. In the figure, 11 is a battery, 15 is a memory, P and N are power supply terminals, V is a main power supply, C1 is a first capacitor, and C2 is a second capacitor.

Claims (1)

【実用新案登録請求の範囲】 1 メモリと、 メモリの電源供給端子間に接続され、商用電源
を直流化してなる主電源と、 メモリの電源供給端子間に主電源と並列に接続
されたバツクアツプ用の電池と、 前記電池と並列に接続され、電池交換時にメモ
リをバツクアツプする大容量の第1コンデンサと
からなるメモリバツクアツプ回路において、 前記主電源と前記電源供給端子との間に、前記
第1コンデンサに対して小容量の第2コンデンサ
を前記主電源と並列に接続したことを特徴とする
メモリバツクアツプ回路。 2 前記バツクアツプ用の電池には主電源からの
電流の流入を防止するダイオードが直列に接続さ
れていることを特徴とする実用新案登録請求の範
囲第1項記載のメモリバツクアツプ回路。
[Scope of Claim for Utility Model Registration] 1. A memory, a main power supply made by converting a commercial power supply into direct current that is connected between the memory's power supply terminals, and a backup power supply that is connected in parallel with the main power supply between the memory's power supply terminals. and a large-capacity first capacitor that is connected in parallel with the battery and backs up the memory when replacing the battery, wherein the first capacitor is connected between the main power source and the power supply terminal. A memory backup circuit characterized in that a second capacitor having a smaller capacity than the capacitor is connected in parallel with the main power supply. 2. The memory backup circuit according to claim 1, wherein the backup battery has a diode connected in series to prevent current from flowing from the main power source.
JP17885286U 1986-11-20 1986-11-20 Pending JPS6384629U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17885286U JPS6384629U (en) 1986-11-20 1986-11-20

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17885286U JPS6384629U (en) 1986-11-20 1986-11-20

Publications (1)

Publication Number Publication Date
JPS6384629U true JPS6384629U (en) 1988-06-03

Family

ID=31121372

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17885286U Pending JPS6384629U (en) 1986-11-20 1986-11-20

Country Status (1)

Country Link
JP (1) JPS6384629U (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57142149A (en) * 1981-02-25 1982-09-02 Sharp Kk Circuit for protecting electronic device with solar battery
JPS6125051B2 (en) * 1980-07-01 1986-06-13 Matsushita Electric Ind Co Ltd

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6125051B2 (en) * 1980-07-01 1986-06-13 Matsushita Electric Ind Co Ltd
JPS57142149A (en) * 1981-02-25 1982-09-02 Sharp Kk Circuit for protecting electronic device with solar battery

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