JPS6373947U - - Google Patents
Info
- Publication number
- JPS6373947U JPS6373947U JP1986168766U JP16876686U JPS6373947U JP S6373947 U JPS6373947 U JP S6373947U JP 1986168766 U JP1986168766 U JP 1986168766U JP 16876686 U JP16876686 U JP 16876686U JP S6373947 U JPS6373947 U JP S6373947U
- Authority
- JP
- Japan
- Prior art keywords
- lead
- electronic component
- forming device
- presses
- bending
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000005452 bending Methods 0.000 claims description 2
- 238000007493 shaping process Methods 0.000 claims 1
- 238000000465 moulding Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Landscapes
- Wire Processing (AREA)
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
Description
第1図及び第2図は本考案に係る成形装置の一
実施例を示す正面図、第3図は他の実施例を示す
正面図、第4図はトランジスタの全体斜視図、第
5図乃至第8図はリード曲げ装置の正面図、第9
図はトランジスタの正面図、第10図はトランジ
スタの側面図である。 6……トランジスタ〔電子部品〕、11……受
け部材、11a……凹部、12,15……押え部
材、13,14……リード成形装置。
実施例を示す正面図、第3図は他の実施例を示す
正面図、第4図はトランジスタの全体斜視図、第
5図乃至第8図はリード曲げ装置の正面図、第9
図はトランジスタの正面図、第10図はトランジ
スタの側面図である。 6……トランジスタ〔電子部品〕、11……受
け部材、11a……凹部、12,15……押え部
材、13,14……リード成形装置。
Claims (1)
- 樹脂外装された電子部品の外装部から導出され
たリードを折曲成形する装置において、上記リー
ドを嵌入させる凹部が形成された受け部材と、上
記リードを所定の厚さに押圧する押え部材とを含
むことを特徴とするリード成形装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1986168766U JPS6373947U (ja) | 1986-10-31 | 1986-10-31 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1986168766U JPS6373947U (ja) | 1986-10-31 | 1986-10-31 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6373947U true JPS6373947U (ja) | 1988-05-17 |
Family
ID=31101948
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1986168766U Pending JPS6373947U (ja) | 1986-10-31 | 1986-10-31 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6373947U (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0541156U (ja) * | 1991-11-06 | 1993-06-01 | ローム株式会社 | 発光ダイオードにおけるリードの曲げ加工装置 |
-
1986
- 1986-10-31 JP JP1986168766U patent/JPS6373947U/ja active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0541156U (ja) * | 1991-11-06 | 1993-06-01 | ローム株式会社 | 発光ダイオードにおけるリードの曲げ加工装置 |
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