JPS6361149U - - Google Patents
Info
- Publication number
- JPS6361149U JPS6361149U JP1986155892U JP15589286U JPS6361149U JP S6361149 U JPS6361149 U JP S6361149U JP 1986155892 U JP1986155892 U JP 1986155892U JP 15589286 U JP15589286 U JP 15589286U JP S6361149 U JPS6361149 U JP S6361149U
- Authority
- JP
- Japan
- Prior art keywords
- metal piece
- piece
- external leads
- semiconductor device
- external
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 5
- 239000002184 metal Substances 0.000 claims 3
- 238000007789 sealing Methods 0.000 claims 1
- 230000005855 radiation Effects 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
- H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49175—Parallel arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
第1図は本考案に係る半導体装置のチツプ封止
前の状態を示す平面図、第2図および第3図は同
じく半導体装置のチツプ封止後の状態を示す側面
図と背面図、第4図はその完成品を示す斜視図、
第5図および第6図は従来の半導体装置の樹脂封
止前の状態を示す平面図と側面図、第7図はその
完成品を示す斜視図である。 1……リードフレーム、2〜5……外部リード
、6〜9……内部電極、31〜35……延在部、
36……連結片、37……放熱片。
前の状態を示す平面図、第2図および第3図は同
じく半導体装置のチツプ封止後の状態を示す側面
図と背面図、第4図はその完成品を示す斜視図、
第5図および第6図は従来の半導体装置の樹脂封
止前の状態を示す平面図と側面図、第7図はその
完成品を示す斜視図である。 1……リードフレーム、2〜5……外部リード
、6〜9……内部電極、31〜35……延在部、
36……連結片、37……放熱片。
Claims (1)
- 一側方に突出する複数の外部リードおよびこれ
ら外部リードに各々接続する内部電極を有する金
属片と、この金属片の裏側に半導体チツプ封止用
のパツケージを介して取り付けられた放熱片とを
備え、前記金属片の内部電極に前記外部リードと
反対側に突出する延在部を分断可能に設け、これ
ら延在部は連結片によつて接続されていることを
特徴とする半導体装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1986155892U JPS6361149U (ja) | 1986-10-09 | 1986-10-09 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1986155892U JPS6361149U (ja) | 1986-10-09 | 1986-10-09 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6361149U true JPS6361149U (ja) | 1988-04-22 |
Family
ID=31077005
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1986155892U Pending JPS6361149U (ja) | 1986-10-09 | 1986-10-09 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6361149U (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2015029143A (ja) * | 2008-08-29 | 2015-02-12 | セミコンダクター・コンポーネンツ・インダストリーズ・リミテッド・ライアビリティ・カンパニー | 樹脂封止型半導体装置とその製造方法、リードフレーム |
US9905497B2 (en) | 2008-08-29 | 2018-02-27 | Semiconductor Components Industries, Llc | Resin sealing type semiconductor device and method of manufacturing the same, and lead frame |
-
1986
- 1986-10-09 JP JP1986155892U patent/JPS6361149U/ja active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2015029143A (ja) * | 2008-08-29 | 2015-02-12 | セミコンダクター・コンポーネンツ・インダストリーズ・リミテッド・ライアビリティ・カンパニー | 樹脂封止型半導体装置とその製造方法、リードフレーム |
US9905497B2 (en) | 2008-08-29 | 2018-02-27 | Semiconductor Components Industries, Llc | Resin sealing type semiconductor device and method of manufacturing the same, and lead frame |