JPS6346673B2 - - Google Patents
Info
- Publication number
- JPS6346673B2 JPS6346673B2 JP54148361A JP14836179A JPS6346673B2 JP S6346673 B2 JPS6346673 B2 JP S6346673B2 JP 54148361 A JP54148361 A JP 54148361A JP 14836179 A JP14836179 A JP 14836179A JP S6346673 B2 JPS6346673 B2 JP S6346673B2
- Authority
- JP
- Japan
- Prior art keywords
- gate
- thyristor
- current
- gto
- series
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000003990 capacitor Substances 0.000 claims description 11
- 238000004804 winding Methods 0.000 claims description 4
- 230000003287 optical effect Effects 0.000 description 6
- 239000013307 optical fiber Substances 0.000 description 6
- 238000010586 diagram Methods 0.000 description 3
- 238000009413 insulation Methods 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 101001074035 Homo sapiens Zinc finger protein GLI2 Proteins 0.000 description 2
- 102100035558 Zinc finger protein GLI2 Human genes 0.000 description 2
- 230000000903 blocking effect Effects 0.000 description 2
- 238000007599 discharging Methods 0.000 description 2
- 238000010304 firing Methods 0.000 description 2
- 230000007704 transition Effects 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000006378 damage Effects 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000010355 oscillation Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
- H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
- H02M1/092—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices the control signals being transmitted optically
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Power Conversion In General (AREA)
- Thyristor Switches And Gates (AREA)
Description
【発明の詳細な説明】
本発明は、ゲートターンオフ（GTO）サイリ
スタを高電圧スイツチ素子として使用する高電圧
装置において、GTOサイリスタをオン・オフ制
御するための制御装置に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a control device for controlling on/off of a gate turn-off (GTO) thyristor in a high voltage device using the GTO thyristor as a high voltage switch element.
第１図はGTOサイリスタを確実に動作させる
のに必要なゲート電流Igとゲート電圧VGの波形を
示す。 Figure 1 shows the waveforms of the gate current I g and gate voltage V G required to operate the GTO thyristor reliably.
同図において、GTOサイリスタのカソードに
対してゲートが正電位にされるON側は、サイリ
スタを阻止から導通状態に移行させるに要するゲ
ート電流であり、サイリスタを直列に多数個設け
る場合には点弧電流Igpをカタログ値の５倍乃至
10倍にしなければ各サイリスタの同時オンが難し
くなる。また、点弧時間tpoはサイリスタの確実
な点弧に必要な時間であり、略10〜20μsecであ
る。さらに、サイリスタの導通時間tcpod中もゲー
ト電流Igpを流し続ける必要がある。これは負荷
条件によつては電流の振動等のため負荷電流がサ
イリスタの保持電流以下に減少したときにもサイ
リスタを導通状態に保持させることによる。 In the same figure, the ON side, where the gate is at a positive potential with respect to the cathode of the GTO thyristor, is the gate current required to transition the thyristor from blocking to conduction. The current I gp is 5 times the catalog value or
Unless it is multiplied by 10, it will be difficult to turn on each thyristor at the same time. Further, the firing time t po is the time required for reliable firing of the thyristor, and is approximately 10 to 20 μsec. Furthermore, it is necessary to keep the gate current I gp flowing during the conduction time t cpod of the thyristor. This is because the thyristor is maintained in a conductive state even when the load current decreases below the holding current of the thyristor due to current oscillations depending on the load conditions.
次に、サイリスタのゲートが負電位にされる
OFF側は、サイリスタを導通状態から阻止状態
に移行させるに要するゲート電流であり、電流
Igrpを瞬時流してターンオフさせる。そして、タ
ーンオフ後には逆バイアス電圧VGRを印加してお
く。ここで、電流Igrpはサイリスタに流れていた
電流の1/3〜1/5を必要とし、その通流幅は約
10μsec程度になる。また、逆バイアス電圧VGRは
２ボルト以上にしてdv／dt等による再点弧を防
止する。 Then the gate of the thyristor is brought to a negative potential
The OFF side is the gate current required to transition the thyristor from the conducting state to the blocking state, and the current
Turn off by instantly applying I grp . After turn-off, a reverse bias voltage V GR is applied. Here, the current I grp requires 1/3 to 1/5 of the current flowing through the thyristor, and the current width is approximately
It will be about 10μsec. Further, the reverse bias voltage V GR is set to 2 volts or more to prevent re-ignition due to dv/dt, etc.
このように、GTOサイリスタはそのオン・オ
フ制御に比較的大きなゲート電力を必要とし、
GTOサイリスタを多数個直列接続して高耐圧に
する場合にその電源トランスに問題があつた。す
なわち、電源トランスの耐圧とこれが原因する分
圧への悪影響等である。また、GTOサイリスタ
はゲート電流でオン・オフ制御するため、ゲート
回路の信頼性が電圧分担を一様にする上で重要で
あつて部品点数の少ないGTOサイリスタ用ゲー
ト回路が望まれる。 In this way, the GTO thyristor requires relatively large gate power for its on/off control,
When connecting multiple GTO thyristors in series to achieve high voltage resistance, there was a problem with the power transformer. That is, there is an adverse effect on the withstand voltage of the power transformer and the resulting voltage division. Furthermore, since the GTO thyristor is controlled on and off by the gate current, the reliability of the gate circuit is important in ensuring uniform voltage distribution, and a gate circuit for the GTO thyristor with a small number of parts is desired.
こうした問題はGTOサイリスタの直列接続に
限らず、高電圧設備に高電圧スイツチ素子として
使用される場合に生じる。 These problems occur not only when GTO thyristors are connected in series, but also when they are used as high-voltage switch elements in high-voltage equipment.
本発明は、構成を簡単化したゲート回路によつ
てGTOサイリスタに充分な電力及び充分な速度
のゲート電流を供給でき、さらにゲート回路に高
い絶縁性を持つて確実にゲート電力を送電できる
ようにした制御装置を提供することを目的とす
る。 The present invention is capable of supplying sufficient power and gate current at a sufficient speed to the GTO thyristor using a gate circuit with a simplified configuration, and furthermore, the gate circuit has high insulation properties so that gate power can be reliably transmitted. The purpose of this invention is to provide a control device with
第２図は本発明の一実施例を示し、３段直列接
続した高電圧GTOサイリスタ装置に適用した場
合である。直列接続されたGTOサイリスタ１1，
１2，１3にはそのアノード・カソード間に電圧分
圧器２1，２2，２3を夫々具え、ゲート・カソー
ド間にゲート過電圧抑制用素子３1，３2，３3を
夫々具える。電圧分圧器２1，２2，２3には２1に
代表して示すように、カツト用ダイオードＤ１、
コンデンサＣ１、放電抵抗Ｒ１、分圧抵抗Ｒ２を
具える。 FIG. 2 shows an embodiment of the present invention, which is applied to a high voltage GTO thyristor device connected in three stages in series. GTO thyristor 1 1 connected in series,
1 2 and 1 3 are provided with voltage dividers 2 1 , 2 2 , and 2 3 between their anodes and cathodes, respectively, and gate overvoltage suppressing elements 3 1 , 3 2 , and 3 3 are provided between their gates and cathodes, respectively. . The voltage dividers 2 1 , 2 2 , and 2 3 are equipped with cutting diodes D1 and 2 1 , respectively, as shown in 2 1 .
It includes a capacitor C1, a discharge resistor R1, and a voltage dividing resistor R2.
GTOサイリスタ１1〜１3の夫々のゲート回路
４1，４2，４3には高周波電源５の電路損失を小
さくした高周波送電線５1，５2に直列接続された
GTトランス６1，６2，６3から連続的に電力供給
される。ゲート回路４1，４2，４3は、４1に代表
して示すように、CTトランスの２次巻線から取
出される高周波電流（例えば5KHz〜10KHz）を
ダイオードＤ２，Ｄ３で半波整流してコンデンサ
Ｃ２，Ｃ３に正、負の直流電圧を得る。そして、
コンデンサＣ２，Ｃ３とGTOサイリスタのゲー
トとの間に電流制限抵抗Ｒ３，Ｒ４とスイツチト
ランジスタTR１，TR２の直列回路を夫々設け、
該トランジスタTR１，TR２のベース電流制御
には光フアイバー７1，７2から光入力が与えられ
るフオトサイリスタTHP１，THP２によつて行
なわれる。 The respective gate circuits 4 1 , 4 2 , 4 3 of the GTO thyristors 1 1 to 1 3 are connected in series to high frequency power transmission lines 5 1 , 5 2 that reduce the circuit loss of the high frequency power source 5 .
Power is continuously supplied from GT transformers 6 1 , 6 2 , and 6 3 . Gate circuits 4 1 , 4 2 , 4 3 , as shown in 4 1 , half-wave rectify the high frequency current (e.g. 5KHz to 10KHz) extracted from the secondary winding of the CT transformer using diodes D2 and D3. Then, positive and negative DC voltages are obtained at capacitors C2 and C3. and,
A series circuit of current limiting resistors R3, R4 and switch transistors TR1, TR2 is provided between the capacitors C2, C3 and the gate of the GTO thyristor, respectively.
Base current control of the transistors TR1 and TR2 is performed by photothyristors THP1 and THP2 to which optical inputs are applied from optical fibers 7 1 and 7 2 .
光フアイバー７1，７2及びゲート回路４2，４3
用の光フアイバー７3，７4，７5，７6はオン・オ
フ制御指令部８からのオン指令とオフ指令に相当
する光入力が与えられる。オン・オフ制御指令部
８はオン指令用スイツチ回路SWONの閉路で発光
ダイオードＤ４，Ｄ５，Ｄ６から光フアイバー７
１，７3，７5に光入力を同時に与え、オフ指令用
スイツチ回路SWOFFの閉路で発光ダイオードＤ
７，Ｄ８，Ｄ９から光フアイバー７2，７4，７6
に光入力を与える。 Optical fibers 7 1 , 7 2 and gate circuits 4 2 , 4 3
The optical fibers 7 3 , 7 4 , 7 5 , and 7 6 are given optical inputs corresponding to on commands and off commands from the on/off control command section 8 . The on/off control command unit 8 connects the light emitting diodes D4, D5, D6 to the optical fiber 7 by closing the on command switch circuit SW ON .
1 , 73 , and 75 at the same time, and the light emitting diode D is turned off when the off command switch circuit SW OFF is closed.
7, D8, D9 to optical fibers 7 2 , 7 4 , 7 6
give optical input to.
第２図の動作を説明すると、GTOサイリスタ
１1，１2，１3の同時オンにはスイツチ回路SWON
からのオン指令によつてトランジスタTR１側が
オンし、コンデンサＣ２の放電によつて初期ゲー
ト電流Igp（第１図参照）に必要な電流供給をし、
保持電流はCTトランス６1〜６3から補充する。
GTOサイリスタ１1，１2，１3の同時オフにはス
イツチ回路SWOFFからのオフ指令によつてトラン
ジスタTR２側がオンし、コンデンサＣ３の放電
によつてオフゲート電流Igrpを供給し、バイアス
電圧VGRはコンデンサＣ３の電圧でなされる。 To explain the operation in Figure 2, to turn on GTO thyristors 1 1 , 1 2 , and 1 3 simultaneously, a switch circuit SW ON is used.
The transistor TR1 side is turned on by the ON command from the transistor TR1, and the current required for the initial gate current I gp (see Figure 1) is supplied by discharging the capacitor C2.
The holding current is supplemented from CT transformers 6 1 to 6 3 .
To turn off the GTO thyristors 1 1 , 1 2 , and 1 3 simultaneously, the transistor TR2 side is turned on by the off command from the switch circuit SW OFF , and the off-gate current I grp is supplied by discharging the capacitor C3, and the bias voltage V GR is performed by the voltage of capacitor C3.
従つて、ゲート回路の電源は高周波電流を直列
接続したCTトランスから夫々取出してオン用電
源とオフ用電源を得るため、その構成が簡単にな
るし各電源に関連性があり、一部の電源故障がほ
とんどなくなることから多数個直列接続した
GTOサイリスタでの電圧分担が定常的及び過渡
的にもくずれる恐れがない。また、ゲート回路は
整流用ダイオードとコンデンサと光スイツチ素子
でオン・オフ回路を構成するという簡単化を図る
ことができ、絶縁性に優れかつ信頼性の高い回路
にできると共に並列冗長構成も容易になる。な
お、光スイツチ素子はゲート電流の小さい場合に
はトランジスタTR１，TR２自体をフオトトラ
ンジスタ、フオトサイリスタに代替できるし、ま
た補助スイツチ素子を持つ場合にはトランジスタ
TR１，TR２の代りに一般のサイリスタ、GTO
サイリスタを使用できる。さらに、オン・オフ制
御指令部８との絶縁は光方式に限らず電磁方式、
音波方式等に代替可能である。 Therefore, the power supply for the gate circuit is obtained by taking out the high-frequency current from the CT transformer connected in series to obtain the on power supply and the off power supply, so the configuration is simple and each power supply is related, so some power supplies Multiple units are connected in series to minimize failures.
There is no risk that the voltage sharing in the GTO thyristor will break down either steadily or transiently. In addition, the gate circuit can be simplified by configuring an on/off circuit with a rectifier diode, a capacitor, and an optical switch element, making it possible to create a circuit with excellent insulation and high reliability, and also to easily create a parallel redundant configuration. Become. Note that when the gate current of the optical switch element is small, the transistors TR1 and TR2 themselves can be replaced with phototransistors or photothyristors, and when an auxiliary switch element is included, the transistors TR1 and TR2 can be replaced with phototransistors or photothyristors.
General thyristor, GTO instead of TR1, TR2
Thyristors can be used. Furthermore, the insulation with the on/off control command section 8 is not limited to the optical method, but also the electromagnetic method.
It can be replaced by a sound wave method, etc.
次に、制御装置の電源は高周波電源として常時
発振させておくため、従来のオン・オフ電源に比
べて動作的に安定するし、高周波電源５の並列冗
長構成も容易になる。このことは、電源３の故障
によりコンデンサＣ２，Ｃ３の充電電圧が不足の
状態でGTOサイリスタをオン・オフ制御すると
その破壊が起き、特にGTOサイリスタではオフ
時のゲート電流が少ないと確実に破壊することか
ら、電源５を並列冗長構成できない従来の場合に
は主回路電源（GTOサイリスタの電源）を高速
度開放する機能を持たせる必要があるのに対して
本発明では該機能を具える必要性がなくなる。 Next, since the power supply of the control device is constantly oscillated as a high-frequency power supply, it is operationally more stable than a conventional on/off power supply, and the parallel redundant configuration of the high-frequency power supply 5 is facilitated. This means that if the GTO thyristor is controlled on and off when the charging voltage of capacitors C2 and C3 is insufficient due to a failure in power supply 3, its destruction will occur.In particular, in the case of a GTO thyristor, if the gate current is small when it is off, it will definitely be destroyed. Therefore, in the conventional case where the power supply 5 cannot be configured in a parallel redundant configuration, it is necessary to have a function to open the main circuit power supply (GTO thyristor power supply) at high speed, but in the present invention, it is necessary to have this function. disappears.
第３図は本発明の他の実施例を示し、ブリツジ
接続したGTOサイリスタ９1，９2，９3，９4を持
つ高電圧サイリスタ装置に適用した場合である。
第３図において、１０1，１０2，１０3，１０4は
GTOサイリスタ９1〜９4の夫々のゲート回路で
あり、第２図のそれと同等の構成にされ、オン・
オフ制御指令部１１から絶縁出力されるオン指令
CON1，CON2及びオフ指令COFF1，COFF2によつてサ
イリスタ９1，９4と９2，９3とを交互にオン・オ
フ制御する。１２1，１２2，１２3，１２4はゲー
ト回路１０1〜１０4に夫々高周波電流を供給する
CTトランスであつて、その１次巻線には高周波
電源１３に直列接続されて絶縁が取られた高周波
電流を変流する。１４はオン・オフ制御される
GTOサイリスタ９1〜９4によつて位相制御され
た交流電流が供給される負荷である。 FIG. 3 shows another embodiment of the present invention, which is applied to a high voltage thyristor device having bridge-connected GTO thyristors 9 1 , 9 2 , 9 3 , 9 4 .
In Figure 3, 10 1 , 10 2 , 10 3 , 10 4 are
This is the gate circuit for each of the GTO thyristors 91 to 94 , and has the same configuration as that in Figure 2, and is turned on and off.
ON command output insulated from the OFF control command unit 11
The thyristors 9 1 , 9 4 and 9 2 , 9 3 are controlled to be turned on and off alternately by C ON1 , C ON2 and off commands C OFF1 , C OFF2 . 12 1 , 12 2 , 12 3 , 12 4 supply high frequency current to gate circuits 10 1 to 10 4 respectively.
It is a CT transformer, and its primary winding is connected in series to a high frequency power source 13 to transform an insulated high frequency current. 14 is controlled on/off
This is a load to which alternating current whose phase is controlled by GTO thyristors 9 1 to 9 4 is supplied.
本実施例に示すように、GTOサイリスタをブ
リツジ接続した高電圧装置の如く、オン・オフ制
御位相の異なる場合にもゲート回路電源を直列接
続した構成にしさらに並列冗長構成にできるなど
信頼性の高いものにできる。なお、GTOサイリ
スタ９1〜９4は複数のGTOサイリスタを直列接
続又は並列接続して構成する場合にも同様のゲー
ト回路電源及びゲート回路にして構成できること
は勿論である。 As shown in this example, even in cases where the on/off control phases are different, such as in a high-voltage device with bridge-connected GTO thyristors, the gate circuit power supplies can be connected in series, and a parallel redundant configuration can be configured, resulting in high reliability. It can be made into something. It goes without saying that the GTO thyristors 9 1 to 9 4 can also be configured by using the same gate circuit power supply and gate circuit even when a plurality of GTO thyristors are connected in series or connected in parallel.
以上のとおり、本発明による制御装置は、高電
圧装置のスイツチ素子に使用されるGTOサイリ
スタのオン・オフ制御に比較的簡単な構成でしか
も高信頼性を持たせることができる。特に、ゲー
ト回路では夫々コンデンサを有してGTOサイリ
スタに特有の電流波形を得ることができるし、高
周波電源からダイオードに至る回路の電源入力系
に一部故障がある場合にもサイリスタをオン又は
オフするに必要なゲート電流を確保して信頼性向
上に効果がある。また、オン・オフ制御信号は直
列的にオン又はオフ制御信号を発生する構成のオ
ン・オフ制御指令を得るため、一部の制御信号が
欠落することなく、一部のサイリスタのオン又は
オフ失敗による事故発生を防ぐことができる。 As described above, the control device according to the present invention can perform on/off control of a GTO thyristor used as a switch element of a high voltage device with a relatively simple configuration and high reliability. In particular, each gate circuit has a capacitor to obtain a current waveform specific to the GTO thyristor, and even if there is a partial failure in the power input system of the circuit from the high frequency power supply to the diode, the thyristor can be turned on or off. This is effective in improving reliability by ensuring the gate current necessary for In addition, since the on/off control signal is configured to generate on/off control signals in series, it is possible to prevent some control signals from being lost and some thyristors to fail to turn on or off. It is possible to prevent accidents caused by
第１図はGTOサイリスタのオン・オフ制御を
説明するためのゲート電流波形、第２図は本発明
の一実施例を示す制御装置構成図、第３図は本発
明の他の実施例を示すブロツク構成図である。
１1，１2，１3，９1，９2，９3……GTOサイリ
スタ、４1，４2，４3，１０1，１０2，１０3，１
０4……ゲート回路、５，１３……高周波電源、
６1，６2，６3，１２1，１２2，１２3，１２4……
CTトランス、７1〜７6……光フアイバー、８，
１１……オン・オフ制御指令部。
Fig. 1 is a gate current waveform for explaining on/off control of the GTO thyristor, Fig. 2 is a configuration diagram of a control device showing one embodiment of the present invention, and Fig. 3 is a diagram showing another embodiment of the present invention. FIG. 3 is a block configuration diagram. 1 1 , 1 2 , 1 3 , 9 1 , 9 2 , 9 3 ...GTO thyristor, 4 1 , 4 2 , 4 3 , 10 1 , 10 2 , 10 3 , 1
0 4 ...Gate circuit, 5,13...High frequency power supply,
6 1 , 6 2 , 6 3 , 12 1 , 12 2 , 12 3 , 12 4 ...
CT transformer, 7 1 to 7 6 ... optical fiber, 8,
11...On/off control command unit.
Claims (1)
ーンオフサイリスタを使用した装置において、高
周波電力を発生する高周波電源と、この高周波電
源に１次巻線が直列接続された複数のCTトラン
スと、これら複数のCTトランスの２次巻線出力
を整流した正負極性出力で夫々充電される一対の
コンデンサとこれらコンデンサの充電端子と前記
サイリスタのゲート間に設けられたスイツチング
素子とを該サイリスタ毎に設けた複数のゲート回
路と、前記各サイリスタのオン又はオフ指令信号
によつて直列的に発生するオン又はオフ制御信号
を絶縁して前記各ゲート回路の一方のスイツチン
グ素子にオン信号を与えるオン・オフ制御指令部
とを備えたことを特徴とするゲートターンオフサ
イリスタの制御装置。1. A device that uses multiple gate turn-off thyristors as high-voltage switching elements includes a high-frequency power source that generates high-frequency power, multiple CT transformers whose primary windings are connected in series to this high-frequency power source, and these multiple CT transformers. A plurality of gates provided for each thyristor, including a pair of capacitors each charged with positive and negative polarity outputs obtained by rectifying the secondary winding output of the transformer, and a switching element provided between the charging terminals of these capacitors and the gate of the thyristor. an on/off control command unit that insulates the on/off control signals generated in series by the on/off command signals of the respective thyristors and supplies the on/off signal to one switching element of each of the gate circuits; A control device for a gate turn-off thyristor, comprising:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14836179A JPS5671471A (en) | 1979-11-15 | 1979-11-15 | Control device of gate turn-off thyristor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14836179A JPS5671471A (en) | 1979-11-15 | 1979-11-15 | Control device of gate turn-off thyristor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5671471A JPS5671471A (en) | 1981-06-15 |
| JPS6346673B2 true JPS6346673B2 (en) | 1988-09-16 |
Family
ID=15451034
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14836179A Granted JPS5671471A (en) | 1979-11-15 | 1979-11-15 | Control device of gate turn-off thyristor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5671471A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103151905A (en) * | 2013-02-05 | 2013-06-12 | 九江九整整流器有限公司 | Multiple thyristor synchronous optical pulse trigger circuit |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01190024A (en) * | 1988-01-25 | 1989-07-31 | Mitsubishi Electric Corp | Trigger circuit for control rectifier element |
| DE4040164A1 (en) * | 1990-12-15 | 1992-06-17 | Schwerionenforsch Gmbh | Electronic HV switch with opto-coupler switch path control - has opto-coupler operating voltage obtained from winding wound around loop current core |
-
1979
- 1979-11-15 JP JP14836179A patent/JPS5671471A/en active Granted
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103151905A (en) * | 2013-02-05 | 2013-06-12 | 九江九整整流器有限公司 | Multiple thyristor synchronous optical pulse trigger circuit |
| CN103151905B (en) * | 2013-02-05 | 2017-10-03 | 九江赛晶科技股份有限公司 | A kind of many IGCT synchronizable optical pulsed triggering circuits |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5671471A (en) | 1981-06-15 |
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