JPS6335147U - - Google Patents
Info
- Publication number
- JPS6335147U JPS6335147U JP12682686U JP12682686U JPS6335147U JP S6335147 U JPS6335147 U JP S6335147U JP 12682686 U JP12682686 U JP 12682686U JP 12682686 U JP12682686 U JP 12682686U JP S6335147 U JPS6335147 U JP S6335147U
- Authority
- JP
- Japan
- Prior art keywords
- address signal
- access port
- parallel
- selection means
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Image Input (AREA)
Description
第１図は本考案の一実施例を示す構成ブロツク
図、第２図は第１図の装置の動作説明図、第３図
は従来装置の構成図である。
７……選択回路、８……メモリ回路、９……ア
クセス制御回路、１２……Ｓ／Ｐ変換回路。
FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is an explanatory diagram of the operation of the device shown in FIG. 1, and FIG. 3 is a diagram showing the configuration of a conventional device. 7... Selection circuit, 8... Memory circuit, 9... Access control circuit, 12... S/P conversion circuit.
Claims (1)
ートとを有する２ポートメモリにおいて、 前記シリアルアクセスポートから入力されるア
ドレス信号を受信してパラレルアドレス信号に変
換するＳ／Ｐ変換手段と、 このＳ／Ｐ変換手段で出力されるアドレス信号
と、前記パラレルアクセスポートから出力される
アドレス信号とを選択する選択手段と、 この選択手段で選択されたアドレス信号に対応
するデータの読出し／書込み動作の終了を検出し
、この終了を前記選択手段が選択したアドレス信
号の出力された側に知らせるアクセス制御手段 とを設けたことを特徴とする２ポートメモリ。[Claims for Utility Model Registration] In a two-port memory having a parallel access port and a serial access port, S/P conversion means receives an address signal input from the serial access port and converts it into a parallel address signal; selection means for selecting an address signal output from the S/P conversion means and an address signal output from the parallel access port; read/write operations for data corresponding to the address signal selected by the selection means; and access control means for detecting the end of the address signal and notifying the end to the side to which the address signal selected by the selection means has been output.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12682686U JPS6335147U (en) | 1986-08-20 | 1986-08-20 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12682686U JPS6335147U (en) | 1986-08-20 | 1986-08-20 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6335147U true JPS6335147U (en) | 1988-03-07 |
Family
ID=31021002
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12682686U Pending JPS6335147U (en) | 1986-08-20 | 1986-08-20 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6335147U (en) |
-
1986
- 1986-08-20 JP JP12682686U patent/JPS6335147U/ja active Pending
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