JPS6329957A - Sealing type of semiconductor device - Google Patents

Sealing type of semiconductor device

Info

Publication number
JPS6329957A
JPS6329957A JP17314786A JP17314786A JPS6329957A JP S6329957 A JPS6329957 A JP S6329957A JP 17314786 A JP17314786 A JP 17314786A JP 17314786 A JP17314786 A JP 17314786A JP S6329957 A JPS6329957 A JP S6329957A
Authority
JP
Japan
Prior art keywords
rubber
package base
sealing
base material
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17314786A
Other languages
Japanese (ja)
Inventor
Seiichi Iwamatsu
誠一 岩松
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP17314786A priority Critical patent/JPS6329957A/en
Publication of JPS6329957A publication Critical patent/JPS6329957A/en
Pending legal-status Critical Current

Links

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To enable sealing having high airtightness, and to obtain an IC integrated circuit having excellent temperature resistance and water resistance by hermetically sealing a package base material and a cover by a rubber- packing. CONSTITUTION:A lead-frame 1 is formed to a package base material 2, an IC chip 3 is assembled to one part of the lead-frame 1 together with leads 4, and a trench is shaped to the surface of the package base material 2. A rubber-packing 5 consisting of a Teflon-rubber is fitted into the trench, and a cover (a cap) 6 is pushed in and formed so as to be hermetically sealed with the rubber-packing 5 on a side surface thereof. Accordingly, sealing having high airtightness is enabled, thus acquiring an IC having excellent temperature resistance and water resistance.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体装置の封止形態に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to a sealing form of a semiconductor device.

〔従来の技術〕[Conventional technology]

従来、半導体装置の封止形態は第2図に示す如き形態を
とるのが通例であつ之。すなわち、銅合金等から成るリ
ード・フレーム11がセラミックあるいはプラスチック
あるいは金属等から成るパッケージ基体12に形成され
、該リード・7レーム11の一部にイメージ・センサー
等の集積回路(IC)チップ13がリード線14と共に
組立て配線され、前記パッケージ基材12の表面に例え
ばエポキシ樹脂等から成る接着剤15により、ガラスあ
るいはプラスチックあるいはセラミックあるいは金属等
から成るフタ(キャップ)16が封着されて成る。
Conventionally, the sealing form of a semiconductor device has generally been as shown in FIG. That is, a lead frame 11 made of copper alloy or the like is formed on a package base 12 made of ceramic, plastic, metal, etc., and an integrated circuit (IC) chip 13 such as an image sensor is mounted on a part of the lead frame 11. It is assembled and wired together with lead wires 14, and a lid (cap) 16 made of glass, plastic, ceramic, metal, etc. is sealed to the surface of the package base material 12 with an adhesive 15 made of, for example, epoxy resin.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

しかし、上記従来技術によると、通常接着剤による封着
時には高温(200℃〜500℃)での封着を行なうた
め、接着剤に空気抜は穴が生じたり、接着剤そのものに
気泡が発生し、耐温性が劣るという問題点があった。
However, according to the above-mentioned conventional technology, when sealing with adhesives, sealing is usually performed at high temperatures (200°C to 500°C), so air venting in the adhesive may create holes or bubbles may occur in the adhesive itself. However, there was a problem that the temperature resistance was poor.

本発明は、かかる従来技術の問題点をなくし、気密性の
良好な半導体装置の封止形態を提供する事を目的とする
It is an object of the present invention to eliminate the problems of the prior art and to provide a sealed form of a semiconductor device with good airtightness.

〔問題点を解決するための手段〕[Means for solving problems]

上記間珈点を解決する之めに、本発明は、パッケージ基
材とフタ(キャップ)とをゴム・バンキングにより気密
封止する手段をとる44を基本とする。
In order to solve the above-mentioned problems, the present invention is based on a method 44 in which the package base material and the lid (cap) are hermetically sealed by rubber banking.

〔実施例〕〔Example〕

以下、実施例により本発明を詳述する。 Hereinafter, the present invention will be explained in detail with reference to Examples.

第1図は本発明の一実施例を示すバンキング封止ICの
断面図である。すなわち、リード・フレーム1がパッケ
ージ基材2に形成され、該リードフレーム1の一部に、
ICチップ3がリード線4と共に組立てられ、前記パッ
ケージ基材2の表面には、溝が形成されると共に、配溝
にテフロン・ゴムかう1fflるゴム・バンキング5が
はめ込まれ、フタ(キャップ)6がその側面に於てゴム
・バンキング5と気密封止されるべく押し込まれて形成
されて成る。
FIG. 1 is a sectional view of a banking-sealed IC showing one embodiment of the present invention. That is, a lead frame 1 is formed on a package base material 2, and a part of the lead frame 1 includes:
The IC chip 3 is assembled together with the lead wires 4, a groove is formed on the surface of the package base material 2, a rubber banking 5 made of Teflon rubber is fitted into the groove, and a lid (cap) 6 is fitted. is formed by being pressed into its side surface to be hermetically sealed with the rubber banking 5.

〔発明の効果〕〔Effect of the invention〕

本発明の如く、ゴム・バンキング封止ICでは、気密性
の高い封止が可能となる効果があυ、耐温性、耐水性に
すぐれたICが提供できる効果がある。
As in the present invention, the rubber banking sealed IC has the effect of enabling highly airtight sealing and providing an IC with excellent temperature resistance and water resistance.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を示すバンキング封止ICの
断面図、第2図は従来技術による接着封止ICの断面図
である。 1.11・・・・・・リード・フレーム2、12・・・
・・・パッケージ基材 5.13・・・・・r cチップ 4.14・・・・・・リード線 5、・・・・・・・・・・・・ゴム・バンキング15、
・・・・・・・・・接着剤 6.16・・・・・・フタ(キャップ)0以上
FIG. 1 is a sectional view of a banking-sealed IC according to an embodiment of the present invention, and FIG. 2 is a sectional view of an adhesive-sealed IC according to the prior art. 1.11... Lead frame 2, 12...
...Package base material 5.13...Rc chip 4.14...Lead wire 5,...Rubber banking 15,
・・・・・・Adhesive 6.16・・・・・・Lid (cap) 0 or more

Claims (1)

【特許請求の範囲】[Claims]  リード・フレームが形成されたパッケージ基体には、
半導体装置が組立てられ、旦つ前記パッケージ基体には
フタ(キャップ)がゴム・パッキングを介して封止され
て成る事を特徴とする半導体装置の封止形態。
The package base on which the lead frame is formed has a
1. A method of sealing a semiconductor device, characterized in that, after the semiconductor device is assembled, a lid (cap) is sealed to the package base via a rubber packing.
JP17314786A 1986-07-23 1986-07-23 Sealing type of semiconductor device Pending JPS6329957A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17314786A JPS6329957A (en) 1986-07-23 1986-07-23 Sealing type of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17314786A JPS6329957A (en) 1986-07-23 1986-07-23 Sealing type of semiconductor device

Publications (1)

Publication Number Publication Date
JPS6329957A true JPS6329957A (en) 1988-02-08

Family

ID=15954975

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17314786A Pending JPS6329957A (en) 1986-07-23 1986-07-23 Sealing type of semiconductor device

Country Status (1)

Country Link
JP (1) JPS6329957A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102254878A (en) * 2010-05-19 2011-11-23 三菱电机株式会社 Semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102254878A (en) * 2010-05-19 2011-11-23 三菱电机株式会社 Semiconductor device
JP2011243798A (en) * 2010-05-19 2011-12-01 Mitsubishi Electric Corp Semiconductor device

Similar Documents

Publication Publication Date Title
US10151612B2 (en) Flow sensor package
KR100559062B1 (en) Semiconductor device and its manufacturing method
US6849915B1 (en) Light sensitive semiconductor package and fabrication method thereof
JPS598358Y2 (en) Semiconductor element package
JPH04234152A (en) Low-cost erasable programmable read-only memory device and manufacture
US3740920A (en) Method for packaging hybrid circuits
JP4326609B2 (en) Method for manufacturing a semiconductor device
JPS6329957A (en) Sealing type of semiconductor device
NL7504380A (en) CERAMIC PACKAGE WITHOUT CONNECTION PIPES, INTEGRATED FOR AN INTEGRATED CHAIN.
JPS62104145A (en) Semiconductor device
KR970053693A (en) How to package a weak device with the corrector closed with a rim
JPS57112055A (en) Integrated circuit package
JPS6223097Y2 (en)
JPH03105950A (en) Package of semiconductor integrated circuit
KR100373699B1 (en) Method of making an air tight cavity in an assembly package for semi-conductor device
JPS5837694B2 (en) semiconductor equipment
GB1329810A (en) Semiconductor device packaging
JPS6345842A (en) Plastic package
JPS6226847A (en) Hermetic seal semiconductor device
JPH01100955A (en) Chip sealing package
JPS61281540A (en) Sealing jig for semiconductor device
JPH01130547A (en) Manufacture of semiconductor device
JPS6086973A (en) Solid-state image pickup device
JPH02114552A (en) Semiconductor device
JP2740161B2 (en) Integrated circuit mounting structure