JPS63283150A - Integrated circuit - Google Patents

Integrated circuit

Info

Publication number
JPS63283150A
JPS63283150A JP62118408A JP11840887A JPS63283150A JP S63283150 A JPS63283150 A JP S63283150A JP 62118408 A JP62118408 A JP 62118408A JP 11840887 A JP11840887 A JP 11840887A JP S63283150 A JPS63283150 A JP S63283150A
Authority
JP
Japan
Prior art keywords
terminal
function
circuit
logic level
functions
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62118408A
Other languages
Japanese (ja)
Inventor
Yasunori Ouchi
大内　康憲
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62118408A priority Critical patent/JPS63283150A/en
Publication of JPS63283150A publication Critical patent/JPS63283150A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05553—Shape in top view being rectangular
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49113—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires

Landscapes

  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

PURPOSE:To dispense with a function selecting terminal specifically provided by a method wherein a function selecting terminal is connected with a power supply terminal of a circuit. CONSTITUTION:A function selecting signal terminal 2 for switching the function in a circuit is pulled up to a power source VDD through the intermediary of a pull-up resistor 4. A lead frame 3 for a GND terminal is connected with a GND terminal 1 for the power source through a bonding wire 11. As the terminal 2 is in an open state, the signal of the terminal attains logic level [1], and therefore the function selected through logic [1] can be realizied. And, when the terminal 2 is connected with the lead frame 3 through the intermediary with a bonding wire 12, the signal 2 becomes logic level [0], and then the function is selected which is different from that selected when logic level is [1]. By these processes, a specified terminal is not needed to be provided for selecting the function in a circuit. Therefore, different kinds of integrated circuits with plural functions different from each other can be mass-produced.

Description

【発明の詳細な説明】 ［産業上の利用分野］ 本発明は、複数の機能を有する集積回路に関し、特にそ
の機能の選択を行うための端子を有する集積回路に関す
る。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an integrated circuit having multiple functions, and more particularly to an integrated circuit having terminals for selecting the functions.

［従来の技術］ 従来、はとんどの部分の機能が同じで一部の機能のみを
変更した集積回路が必要なとき、回路に特定の機能選択
端子を設けて外部からコントロールすることにより所望
の機能を得るか、あるいは全く別の品種として一部の機
能を変更した製品を製造していた。[Prior Art] Conventionally, when an integrated circuit with the same functions in most parts but with only some functions changed, the desired function can be selected by providing a specific function selection terminal in the circuit and controlling it from the outside. They were manufacturing products with certain functions or with some functions changed as completely different varieties.

［解決すべき問題点］ しかしながら、以上の方法では特定の機能選択端子が必
要であり、あるいは機能毎に別の品種を製造するため少
量多品種の生産になり大量生産によるコストメリットを
活かせないという欠点があった。[Problems to be solved] However, the above methods require specific function selection terminals, or manufacture different products for each function, resulting in production of a wide variety of products in small quantities, making it impossible to take advantage of the cost benefits of mass production. There were drawbacks.

［問題点の解決手段］ 本発明は、従来技術の問題点を解決するために複数の機
能を有する集積回路において、機能数に対応させて設け
られ、電源端子と接続することにより集積回路の機能を
選択する機能選択信号端子を具備して構成されるもので
ある。[Means for Solving the Problems] In order to solve the problems of the prior art, the present invention provides an integrated circuit having multiple functions, which is provided in correspondence with the number of functions, and connected to a power supply terminal, thereby changing the functions of the integrated circuit. The device is equipped with a function selection signal terminal for selecting the function.

本発明によれば以上のように集積回路を構成したので各
技術的手段は次のように作用する。According to the present invention, since the integrated circuit is configured as described above, each technical means operates as follows.

機能選択信号端子は回路の電源端子と接続することによ
り回路の機能を選択するように働くので、従来のように
特定の機能選択端子を設ける必要はない。よって、従来
技術の問題点を解決できるのである。Since the function selection signal terminal works to select the function of the circuit by being connected to the power supply terminal of the circuit, there is no need to provide a specific function selection terminal as in the conventional case. Therefore, the problems of the prior art can be solved.

［実施例］ 以下、本発明の一実施例について図面を参照して詳細に
説明する。[Example] Hereinafter, an example of the present invention will be described in detail with reference to the drawings.

第１図は本実施例による半導体集積回路の構成を示す図
である。同図において、１は回路の電源用ＧＮＤ　（ア
ース）端子、２は回路内の機能を切替えるための機能選
択信号端子であり、プルアップ抵抗（比較的高抵抗）４
を介して電源（ＶＯＯ）にプルアップされる。３はＧＮ
Ｄ端子用リードフレームであり、通常ＧＮＤｉ子１とポ
ンディングワイヤ１１で接続される。FIG. 1 is a diagram showing the configuration of a semiconductor integrated circuit according to this embodiment. In the figure, 1 is a GND (earth) terminal for the power supply of the circuit, 2 is a function selection signal terminal for switching functions in the circuit, and 4 is a pull-up resistor (relatively high resistance).
It is pulled up to the power supply (VOO) via. 3 is GN
This is a lead frame for the D terminal, and is normally connected to the GN Di element 1 with a bonding wire 11.

以上の構成により、機能選択信号端子２はオーブン状態
であるため、機能選択信号端子２の信号は論理レベル「
１」になる。従って、論理レベル「ｌ」で選択される機
能が実現可能となる。With the above configuration, the function selection signal terminal 2 is in the oven state, so the signal at the function selection signal terminal 2 is at the logic level "
1”. Therefore, the function selected at logic level "1" can be realized.

次に、上記とは別の機能を実現する場合について説明す
る。Next, a case will be described in which a function different from the above is realized.

この場合には、先ず機能選択信号端子２をＧ　Ｎ　Ｄ　
ＤＱ子用リードフレーム３にポンディングワイヤ１２で
接続する（図中点線で示す）。すると、機能選択信号端
子２の信号は論理レベル「０」となり、上述（論理レベ
ル「１」のとき）とは異なる機能を選択する。In this case, first, connect the function selection signal terminal 2 to GND.
It is connected to the DQ child lead frame 3 with a bonding wire 12 (indicated by a dotted line in the figure). Then, the signal at the function selection signal terminal 2 becomes logic level "0", and a different function from that described above (when the logic level is "1") is selected.

このように本実施例によれば、回路の機能選択を行うに
あって、従来のように特別の端子を設ける必要はない。As described above, according to this embodiment, there is no need to provide a special terminal as in the conventional case when selecting the function of the circuit.

また、異なる機能の２つの品種を製造する場合、チップ
の製造段階では２種類の機能を集積した１つのチップと
して同時に製造でき、組立て段階で機能の異なる２種類
の製品として分離できるため、少なくともチップ製造段
階では２種類の異なるチップとして別々に投入する必要
はなくなり、コストメリットが期待できる。In addition, when manufacturing two types of products with different functions, at the chip manufacturing stage, the two types of functions can be integrated into one chip, which can be manufactured at the same time, and at the assembly stage, they can be separated into two types of products with different functions. At the manufacturing stage, there is no need to separately introduce two different types of chips, which can be expected to bring cost benefits.

尚、本実施例では単に機能選択信号端子２により回路内
の２つの機能を選択するようにしたが、これに限らず電
源端子に隣接する複数の機能選択信号端子を同様にワイ
ヤポンディング接続することによって多数の機能選択が
可能となる。Note that in this embodiment, two functions in the circuit are selected simply by the function selection signal terminal 2, but the present invention is not limited to this, and a plurality of function selection signal terminals adjacent to the power supply terminal may be similarly connected by wire bonding. This makes it possible to select a large number of functions.

［発明の効果］ 以上詳細に説明したように本発明によれば、機能選択信
号端子を回路の電源端子と接続することにより回路の機
能を選択するようにしたので、機能を選択するための特
別の機能選択端子を設ける必要はない。従って、複数の
異なる機能を有する異なった集積回路を大量生産するこ
とができ、かつ、チップ製造段階では一つの品種として
一括生産できることから大量生産によるコスト低減を図
れる。[Effects of the Invention] As described in detail above, according to the present invention, the function of the circuit is selected by connecting the function selection signal terminal to the power supply terminal of the circuit. There is no need to provide a function selection terminal. Therefore, different integrated circuits having a plurality of different functions can be mass-produced, and since they can be produced all at once as one product at the chip manufacturing stage, costs can be reduced through mass production.

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本発明の一実施例による集積回路の構成を示す
図である。 １：ＧＮＤ端子 ２：機能選択信号端子FIG. 1 is a diagram showing the configuration of an integrated circuit according to an embodiment of the present invention. 1: GND terminal 2: Function selection signal terminal

Claims (1)

【特許請求の範囲】[Claims] 複数の機能を有する集積回路において、機能数に対応さ
せて設けられ、電源端子と接続することにより集積回路
の機能を選択する機能選択信号端子を具備して構成され
ることを特徴とする集積回路。An integrated circuit having a plurality of functions, characterized in that it is configured with function selection signal terminals that are provided corresponding to the number of functions and that select a function of the integrated circuit by connecting to a power supply terminal. .
JP62118408A 1987-05-15 1987-05-15 Integrated circuit Pending JPS63283150A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62118408A JPS63283150A (en) 1987-05-15 1987-05-15 Integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62118408A JPS63283150A (en) 1987-05-15 1987-05-15 Integrated circuit

Publications (1)

Publication Number Publication Date
JPS63283150A true JPS63283150A (en) 1988-11-21

Family

ID=14735906

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62118408A Pending JPS63283150A (en) 1987-05-15 1987-05-15 Integrated circuit

Country Status (1)

Country Link
JP (1) JPS63283150A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0435046A (en) * 1990-05-31 1992-02-05 Toshiba Corp Semiconductor integrated circuit
JP2000216342A (en) * 1999-01-21 2000-08-04 Mitsubishi Electric Corp Integrated circuit chip and processing method for unused pad
EP1132963A1 (en) * 2000-03-08 2001-09-12 Matsushita Electric Industrial Co., Ltd. Semiconductor integrated circuit
JP2011040719A (en) * 2009-07-13 2011-02-24 Rohm Co Ltd Semiconductor device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0435046A (en) * 1990-05-31 1992-02-05 Toshiba Corp Semiconductor integrated circuit
JP2000216342A (en) * 1999-01-21 2000-08-04 Mitsubishi Electric Corp Integrated circuit chip and processing method for unused pad
EP1132963A1 (en) * 2000-03-08 2001-09-12 Matsushita Electric Industrial Co., Ltd. Semiconductor integrated circuit
US6603219B2 (en) 2000-03-08 2003-08-05 Matsushita Electric Industrial Co., Ltd. Semiconductor integrated circuit
JP2011040719A (en) * 2009-07-13 2011-02-24 Rohm Co Ltd Semiconductor device

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