JPS63268376A - Video signal processing circuit - Google Patents
Video signal processing circuitInfo
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- JPS63268376A JPS63268376A JP62101913A JP10191387A JPS63268376A JP S63268376 A JPS63268376 A JP S63268376A JP 62101913 A JP62101913 A JP 62101913A JP 10191387 A JP10191387 A JP 10191387A JP S63268376 A JPS63268376 A JP S63268376A
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- 238000001514 detection method Methods 0.000 claims abstract description 7
- 238000000926 separation method Methods 0.000 abstract description 10
- 101000860173 Myxococcus xanthus C-factor Proteins 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 20
- 230000000694 effects Effects 0.000 description 4
- 238000006243 chemical reaction Methods 0.000 description 3
- 238000000034 method Methods 0.000 description 2
- 238000005070 sampling Methods 0.000 description 2
- 230000006835 compression Effects 0.000 description 1
- 238000007906 compression Methods 0.000 description 1
- 229940028444 muse Drugs 0.000 description 1
- GMVPRGQOIOIIMI-DWKJAMRDSA-N prostaglandin E1 Chemical compound CCCCC[C@H](O)\C=C\[C@H]1[C@H](O)CC(=O)[C@@H]1CCCCCCC(O)=O GMVPRGQOIOIIMI-DWKJAMRDSA-N 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
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Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はテレビ信号処理回路に係り、更に詳しくは、そ
の中に含まれる高域強調回路に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a television signal processing circuit, and more particularly to a high frequency emphasis circuit included therein.
テレビジ１ンの高画質化への動きが高まりてきている。 There is a growing movement towards higher picture quality on television.
３０年以上も前に定められたＮｒｓｃ方式は、カラー信
号の兄事な多重処理によって現在のテレビジ薗ンの繁栄
をもたらしたが、受信機の性能が向上し、大型化が進む
につれて、欠点も目立つようになりてきた。そこで、近
年急速に発達した信号処理技術と半導体デバイスによっ
て、これらの欠点をカバーしようとする研究や、更に一
歩進めた高画質化を図ろうとする試みが各所で行なわれ
ている。゛高画質化の手法は大別して、現行ＮＴＳＣ方
式はそのままとし、主として受信側の信号処理によって
行なうＩ Ｄ Ｔ Ｖ （Ｉｍｐｒｏｖｅｄ’１’Ｖ）
と、現行Ｎ’ｌ’ＳＣ方式との両立性を保ちながら、信
号形式の修正や、新たな信号を付加するＨ Ｄ Ｔ Ｖ
（Ｅｘｔｅｎｄｅｄ Ｄｅｆｉｎｉｔｉｏｎ Ｔ Ｖ
）がある。これらのＩＤ’ｌ’ＶやＩｉＤ’ｌ’Ｖは
、静止画モードと動画モードで同一の高域強調回路を用
いている。以下に従来例として関連文献をあげる。The Nrsc system, which was established more than 30 years ago, brought about the prosperity of today's television channels through the multi-processing of color signals, but as receivers have improved in performance and become larger, they have also had drawbacks. It's starting to stand out. Therefore, with the help of signal processing technology and semiconductor devices that have rapidly developed in recent years, research is being carried out in various places to try to overcome these shortcomings and to take the image quality one step further.゛The methods for improving image quality can be broadly divided into IDT V (Improved'1'V), which leaves the current NTSC system unchanged and is mainly performed by signal processing on the receiving side.
and HDTV, which modifies the signal format and adds new signals while maintaining compatibility with the current N'l'SC system.
(Extended Definition TV
). These ID'l'V and IiD'l'V use the same high-frequency emphasis circuit in still image mode and moving image mode. Related documents are listed below as conventional examples.
（１）「完全両立性を有するＥＩＤＴＶ信号方式」テレ
ビジ１ン学会誌Ｖｏｔ ３９． ＮＩＬ １０＋２）
ｌ’−ＦｔＤ’Ｉ’Ｙ、ＩＤＴＶにおける信号処理」
テレビジ四ン学会誌ｖｏ’１．４０ 、随５〔発明が解
決しようとする問題点〕
一般に静止画モードの場合、フレーム間ＹＣ分離やフレ
ーム間走査線補間や高域輝度信号の再生により広帯域と
なり、動画モードの場合ライン間ＹＣ分離やライン間走
査線補間により狭帯域となる。(1) “Completely Compatible EIDTV Signal System” Journal of the Television Television Society Vot 39. NIL 10+2)
l'-FtD'I'Y, signal processing in IDTV"
Journal of the Television Network Society vo'1.40, Part 5 [Problems to be solved by the invention] In general, in still image mode, a wide band is achieved by interframe YC separation, interframe scanning line interpolation, and high-frequency luminance signal reproduction. In the case of video mode, a narrow band is obtained due to line-to-line YC separation and line-to-line scanning line interpolation.
よって静止画モードと動画モードの映像信号の周波数特
性を模式的に示すとそれぞれ第２図と第３図のようにな
る。横軸は水平または垂直周波数を、縦軸は利得を示す
。従来は静止画モードと動画モードの両方に対して第４
図に示す周波数特性を持つ高域強調回路を適用し【いる
。そのため高域強調回路通過後の映像信号の周波数特性
は、静止画モードの場合第５図となり動画モードの場合
第６図となる。第６図より動画モード時には高域強調効
果が小さく、さらにおい返し雑音などの不用成分を強調
してしまうことがわかる。Therefore, the frequency characteristics of video signals in still image mode and moving image mode are schematically shown in FIGS. 2 and 3, respectively. The horizontal axis indicates horizontal or vertical frequency, and the vertical axis indicates gain. Previously, the fourth mode was used for both still image mode and video mode.
A high-frequency emphasis circuit with the frequency characteristics shown in the figure is applied. Therefore, the frequency characteristics of the video signal after passing through the high-frequency emphasis circuit are as shown in FIG. 5 in the still image mode and as shown in FIG. 6 in the moving image mode. From FIG. 6, it can be seen that in the moving image mode, the high frequency enhancement effect is small, and unnecessary components such as feedback noise are further emphasized.
以上まとめると従来技術は動画モードの画質について十
分な配慮がされておらず、静止画モードでは高解像度で
あるが動画モードではＮＴＳＣと同程度またはそれ以下
の画質しか得られないという問題があった。In summary, the conventional technology did not give sufficient consideration to the image quality in the video mode, and while the still image mode had high resolution, the video mode had the problem that the image quality was only comparable to or lower than NTSC. .
本発明の目的は、静止画モードの画質を高解像度に保ち
つつ、動画モードの画質を向上させることにある。An object of the present invention is to improve the image quality in the moving image mode while maintaining the image quality in the still image mode at high resolution.
上記目的は、動画モード用の高域強調回路と静止画モー
ド用の高域強調回路を設け、動き量に応じて上記２つの
回路の出力を重み加算することにより達成される。The above object is achieved by providing a high frequency enhancement circuit for the moving image mode and a high frequency enhancement circuit for the still image mode, and weighting and adding the outputs of the two circuits according to the amount of motion.
第７図に本発明の高域強調回路の基本構成図を示す。第
７図中、１７は動き量の入力端子を、１８は映像信号の
入力端子を、１９は第８図の周波数特性をもつ広帯域高
域強調回路を、２０は第９図の周波数特性をもつ狭帯域
高域強調回路を、２１はスイッチ回路を、２２は映像信
号の出力端子を示す。スイッチ回路２１は動き量が小さ
いときすなわち静止画のときに広帯域高域強調回路１９
の出力を選択し、動き量が太きいときすなわち動画のと
きに狭帯域高域強調回路２０の出力を選択する。よって
本発明の高域強調回路通過後の映像信号の周波数特性は
、静止画の場合第１０図となり動画の場合第１１図とな
る。第１０図と第１１図より１本発明は静止画モード、
動画そ−ドとも不用成分抑圧効果と高域強調効果を有す
ることがわかる。FIG. 7 shows a basic configuration diagram of the high frequency emphasizing circuit of the present invention. In Fig. 7, 17 is a motion amount input terminal, 18 is a video signal input terminal, 19 is a wideband high frequency emphasizing circuit with the frequency characteristics shown in Fig. 8, and 20 is a frequency characteristic shown in Fig. 9. 21 represents a narrow band high frequency emphasizing circuit, 21 represents a switch circuit, and 22 represents an output terminal for a video signal. The switch circuit 21 switches the wideband high frequency emphasis circuit 19 when the amount of movement is small, that is, when the image is a still image.
The output of the narrow band high frequency enhancement circuit 20 is selected when the amount of motion is large, that is, when it is a moving image. Therefore, the frequency characteristics of the video signal after passing through the high frequency enhancement circuit of the present invention are as shown in FIG. 10 for a still image and as shown in FIG. 11 for a moving image. From FIG. 10 and FIG. 11, the present invention has a still image mode,
It can be seen that both videos have an unnecessary component suppression effect and a high frequency enhancement effect.
本発明の一実施例を第１図により説明する。第１図はＥ
Ｄ’ｌ’Ｖデコーダに本発明を適用したものである。第
１図中、１は映像信号入力端子を％２はＡＤ変換器を、
３は動き検出回路を、４はＹＣＹＩ分離回路Ｃ輝度信号
、色信号分離回路）を、５は遅延回路を、６はＹＨ復調
回路を−１７はＣ復調回路を、８は加算回路を、９は動
き検出回路を、１０は走査線補間回路を、１１は広帯域
高域強調回路を、１２は狭帯域高域強調回路を、１５は
重み付き加算回路を、１４はＹＣ／ＲＧＢ変換回路を、
１５はＤＡ変換器を、１６はＲＧＢ信号出力端子を示す
。ＥＤＴＩ信号は入力端子１を経てＡＤ変換器２により
デジタル信号に変換される。動き検出回路３は入力信号
の２フレ一ム間差、１フレーム間差をとることにより動
き量を検出し、ＹＣＹＨ分離回路４に入力する。ＹＣＹ
Ｈ分離回路４は動き量をもとにフレーム間演算、フィー
ルド間演算、ライン間演算１周波数分離などを切り換え
て、Ｙ信号とＣ信号とＹＨ倍信号分離し出力する。An embodiment of the present invention will be explained with reference to FIG. Figure 1 shows E
The present invention is applied to a D'l'V decoder. In Figure 1, 1 is the video signal input terminal, %2 is the AD converter,
3 is a motion detection circuit, 4 is a YCYI separation circuit (C luminance signal, chrominance signal separation circuit), 5 is a delay circuit, 6 is a YH demodulation circuit, 17 is a C demodulation circuit, 8 is an addition circuit, 9 10 is a motion detection circuit, 10 is a scanning line interpolation circuit, 11 is a wideband high frequency emphasizing circuit, 12 is a narrow band high frequency emphasizing circuit, 15 is a weighted addition circuit, 14 is a YC/RGB conversion circuit,
15 indicates a DA converter, and 16 indicates an RGB signal output terminal. The EDTI signal passes through an input terminal 1 and is converted into a digital signal by an AD converter 2. The motion detection circuit 3 detects the amount of motion by taking the difference between two frames and the difference between one frame of the input signal, and inputs the amount to the YCYH separation circuit 4. YCY
The H separation circuit 4 switches between interframe calculation, interfield calculation, interline calculation 1 frequency separation, etc. based on the amount of motion, and separates and outputs the Y signal, C signal, and YH times signal.
Ｙ、促調回路６はＹＢを低周波から高周波に周波数シフ
トし、Ｃ復調回路７はＣをベースバンドに復調する。加
算回路８はＹとＹＨを加算し広帯域のＹを出力する。動
き検出回路９はＹの２フレ一ム間差、１フレーム間差な
どをとることにより動き量を検出し、走査線補間回路１
０と重み付き加算回路１３に入力する。走査線補間回路
１０は動き量をもとにフレーム間補間とライン間補間を
切り換えて走査線を補間する。広帯域高域強調回路１１
と狭帯域高域強調回路１２はそれぞれＹをコンハンスす
る。重み付き加算回路１３は動き量に応じて、広帯域高
域強調回路１１と狭帯域高域強調口％１２の出力に重み
を掛けて加算する。Ｙ Ｃ／ＲＧＢ変換回路１４はＹ信
号と２つのＣ信号をＲＧＢ信号（赤緑青３原色信号）に
変換する。ＲＧＢはＤＡ変換器１５によりアナログ信号
に変換され。A Y and modulation circuit 6 frequency-shifts YB from a low frequency to a high frequency, and a C demodulation circuit 7 demodulates C to baseband. Adder circuit 8 adds Y and YH and outputs wideband Y. The motion detection circuit 9 detects the amount of motion by taking the difference between two Y frames, the difference between one frame, etc., and the scanning line interpolation circuit 1
0 and is input to the weighted addition circuit 13. The scanning line interpolation circuit 10 interpolates scanning lines by switching between interframe interpolation and interline interpolation based on the amount of motion. Wideband high frequency emphasis circuit 11
and the narrow band high frequency emphasizing circuit 12 respectively enhance Y. The weighted addition circuit 13 weights and adds the outputs of the wideband high frequency emphasizing circuit 11 and the narrow band high frequency emphasizing port 12 according to the amount of motion. The Y C/RGB conversion circuit 14 converts the Y signal and the two C signals into RGB signals (red, green, and blue three primary color signals). RGB is converted into an analog signal by the DA converter 15.
出力端子１６より出力される。遅延回路５はタイミング
合せに用いられる。It is output from the output terminal 16. Delay circuit 5 is used for timing adjustment.
次に本発明の中心部分である広帯域高域強調回路１１と
狭帯域高域強調回路１２と重み付き加算回路１５につい
て詳細に説明する。第１２図と第１３図にそれぞれ静止
画モードと動画モードの周波数特性の例を示す。第１２
図と第１５図において縦軸は垂直周波数、横軸は水平周
波数を示し。Next, the broadband high frequency emphasizing circuit 11, the narrow band high frequency emphasizing circuit 12, and the weighted addition circuit 15, which are the central parts of the present invention, will be explained in detail. FIGS. 12 and 13 show examples of frequency characteristics in still image mode and moving image mode, respectively. 12th
In the figure and FIG. 15, the vertical axis indicates vertical frequency, and the horizontal axis indicates horizontal frequency.
四角の内側は利得がたとえばα１以上であることを示す
。動画モードの水平周波数帯域がＮＴＳＣの２倍のａ４
ＭＨｚとなるのは走査線補間により倍速変換されるため
であり、静止画モードの水平周波数帯域が１２．４ＭＨ
ｚとなるのはＹＨ再再生ためである。The inside of the square indicates that the gain is, for example, α1 or more. A4 with twice the horizontal frequency band of NTSC in video mode
MHz because it is converted to double speed by scanning line interpolation, and the horizontal frequency band in still image mode is 12.4 MHz.
The reason why it becomes z is because YH is replayed.
第１４図に広帯域高域強調回路１１の一例を、第１５図
に狭帯域高域強調回路１２の一例を示す。FIG. 14 shows an example of the wideband high frequency emphasizing circuit 11, and FIG. 15 shows an example of the narrow band high frequency emphasizing circuit 12.
第１４図、第１５図中２３は入力端子を、２４は１ライ
ン遅延回路を、２５は乗算回路を、２６は加算回路を、
２７は１ドツト遅延回路を、２８は出力端子を示す。In FIGS. 14 and 15, 23 is an input terminal, 24 is a 1-line delay circuit, 25 is a multiplication circuit, 26 is an addition circuit,
27 represents a one-dot delay circuit, and 28 represents an output terminal.
第１図のＥＤＴ’ｌ／デコーダのサンプリングクロック
を４ ｔＢｃ（１４，４Ｍ Ｈｚ）とすると、１ドツト
遅延回路のクロックは倍速変換により８ ｆｓＧ（２重
８ＭＨｚ）となる。よって第１４図と第１５図の高域強
調回路の水平周波数特性は、それぞれ第１６図と第１７
図のようになる。また第１４図と第１５図の高域強調回
路の垂直周波数特性は、それぞれ第１８図と第１９図と
なる。第１６図、第１７図。If the sampling clock of the EDT'l/decoder in FIG. 1 is 4 tBc (14.4 MHz), the clock of the one-dot delay circuit becomes 8 fsG (double 8 MHz) by double speed conversion. Therefore, the horizontal frequency characteristics of the high-frequency emphasis circuits shown in Figs. 14 and 15 are as shown in Figs. 16 and 17, respectively.
It will look like the figure. Further, the vertical frequency characteristics of the high-frequency emphasis circuits shown in FIGS. 14 and 15 are shown in FIGS. 18 and 19, respectively. Figures 16 and 17.
第１８図、第１９図より、第１４図と第１５図の高域強
調回路はそれぞれ静止画モードと動画モードに適した高
域強調回路であることがわかる。It can be seen from FIGS. 18 and 19 that the high-frequency emphasis circuits of FIGS. 14 and 15 are suitable for the still image mode and the moving image mode, respectively.
第２０図に重み付き加算回路１３の一例を示す。FIG. 20 shows an example of the weighted addition circuit 13.
第２０図中、２９は広帯域（静止画用）高域強調回路１
１からの入力端子を、３０は狭帯域（動画用）高域強調
回路１２からの入力端子を、３１は減算回路を、３２は
可変乗算回路を、３３は動き量入力端子を、５４は加算
回路を、３５は出力端子を示す。In Fig. 20, 29 is wideband (for still images) high-frequency emphasis circuit 1
1, 30 is the input terminal from the narrow band (for video) high frequency emphasis circuit 12, 31 is the subtraction circuit, 32 is the variable multiplication circuit, 33 is the motion amount input terminal, and 54 is the addition terminal. 35 indicates an output terminal.
可変乗算回路３２は動き量に応じて、定数α（０≦α≦
１）を掛ける。よって入力端子２９からの入力をＳとし
入力端子３０からの入力なＭとすると出力端子３５から
は（１−α）Ｓ＋αＭが出力される。The variable multiplication circuit 32 adjusts the constant α (0≦α≦
Multiply by 1). Therefore, if the input from the input terminal 29 is S and the input from the input terminal 30 is M, then (1-α)S+αM is output from the output terminal 35.
なお１重み付き加算回路１３は第７図で説明したように
スイッチ回路２１で置き換えることも可能である。第１
図の本発明の実施例によれば、静止画モードと動画モー
ドの両モードに対して最適な高域強調と不用成分抑圧が
可能なため、ＥＤＴＶのさらなる高画質化をはかること
ができる。Note that the 1-weighted addition circuit 13 can be replaced with the switch circuit 21 as explained in FIG. 1st
According to the embodiment of the present invention shown in the figure, it is possible to optimally emphasize high frequencies and suppress unnecessary components in both the still image mode and the moving image mode, so that it is possible to further improve the image quality of EDTV.
本発明の別の実施例を第２１図により説明する。Another embodiment of the present invention will be described with reference to FIG.
第２１図はＩ ＤＴＶデコーダに本発明を適用したもの
である。第２１図中％ １〜１６は第１図で同一番号を
つげた回路または端子と同じものを、５６はＹＣ分離回
路を示す。基本動作はＹヨを再生しないこと以外は第１
図の実施例と同じである。FIG. 21 shows the present invention applied to an IDTV decoder. In FIG. 21, %1 to 16 indicate the same circuits or terminals with the same numbers in FIG. 1, and 56 indicates a YC separation circuit. The basic movement is the first except that it does not play Y-yo.
This is the same as the embodiment shown in the figure.
本発明の中心部分のなかで第１図の実施例と構成のこと
なる広帯域高域強調回路１１について説明する。第２２
図と第２３図にそれぞれＩＤＴＶの静止画モードと動画
モードの周波数特性を示す。A broadband high-frequency emphasizing circuit 11, which is a central part of the present invention and has a different configuration from the embodiment shown in FIG. 1, will be described. 22nd
FIG. 23 shows the frequency characteristics of IDTV in still image mode and moving image mode, respectively.
ＩＤＴＶではＹＢがないため水平周波数帯域は動画モー
ド、静止画モードともａ ４ Ｍ Ｈｚとなる。Since IDTV does not have YB, the horizontal frequency band is a 4 MHz in both video mode and still image mode.
第２４図に広帯域高域強調回路１１の一例を示す。FIG. 24 shows an example of the wideband high frequency emphasizing circuit 11.
第２４図中、２５から２８は第１４図と第１５図で同一
番号をつけた回路または端子と同じものを示す。In FIG. 24, 25 to 28 indicate the same circuits or terminals with the same numbers in FIGS. 14 and 15.
第２４図の広帯域高域強調回路の水平周波数特性は第１
７図となり、垂直周波数特性は第１８図となる。第２１
図の実施例によれば、静止画モードと動画モードの両モ
ードに対して最適な高域強調と不用成分抑圧が可能なた
め、ＩＤＴＶのさらなる 高画質化をはかることができ
る。The horizontal frequency characteristic of the broadband high frequency emphasizing circuit shown in Fig. 24 is
7, and the vertical frequency characteristic is shown in FIG. 18. 21st
According to the embodiment shown in the figure, it is possible to optimally emphasize high frequencies and suppress unnecessary components in both the still image mode and the moving image mode, so that it is possible to further improve the image quality of IDTV.
本発明は、ＩＤＴＶやＥＤ ＴＶ以外でも静止画モード
と動画モードで帯域中の異なるテレビ信号受信機に適用
することができる。たとえばＮＨＫが開発したＨ Ｄ
Ｔ Ｖ （Ｈｌｇｈ Ｄｅｆｉｎｉｔｉｏｎ Ｔ Ｖ
）の帯域圧縮方式Ｍ Ｕ Ｓ Ｅ （Ｍｕｌｔｉｐｌｅ
５ｕｂ−ｎ７ｑｕｉ日ｔ Ｓａｍｐｌｉｎｇ Ｅｎｏ
ｏｄｉｎｇ ）のデコーダに本発明を適用すれば、動画
モードでも高い鮮鋭度かえられ静止画モードと動画モー
ドの画質差が小さくなり、ＨＤＴ”／の高画質化をはか
ることができる。The present invention can be applied to television signal receivers other than IDTV and ED TV that operate in different bands in still image mode and moving image mode. For example, the HD developed by NHK
T V (High Definition T V
) band compression method MUSE (Multiple
5ub-n7qui date Sampling Eno
If the present invention is applied to a decoder for HDT''/, high sharpness can be achieved even in moving image mode, the difference in image quality between still image mode and moving image mode will be reduced, and high image quality for HDT''/ can be achieved.
本発明によれば、静止画モードと動画モードの両モード
で最適の高域強調と不用成分抑圧が可能になるので、高
画質化をはかることができる。According to the present invention, it is possible to optimally emphasize high frequencies and suppress unnecessary components in both the still image mode and the moving image mode, so that high image quality can be achieved.
第１図は本発明の一実施例を示すブロック図。
第２図は静止画モードの映像信号の周波ａ％性図。
第３図は動画モードの映像信号の周波数特性図。
第４図は従来の高域強調回路の周波数特性図、第５図、
第６図はそれぞれ高域強調回路通過後の周波数特性図、
第７図は本発明の中心部としての高域強調回路の構成を
示すブロック図、第８図は広帯域強調回路の周波数特性
図、第９図は狭帯域強調回路の周波数特性図、第１０図
、第１１図はそれぞれ本発明にかかる高域強調回路通過
後の周波数特性図、第１２図、第１５図はそれぞれ静止
画モードと動画モードの周波数特性図、第１４図。
第１５図はそれぞれ本発明で用いる高域強調回路のブロ
ック図、第１６図、第１７図は水平周波数特性図、第１
８図、第１９図は垂直周波数特性図。
第２０図は重み付き加算回路のブロック図、第２１図は
本発明の他の実施例のブロック図、第２２図。
第２３図はＩＤＴＶの静止画モードと動画モードの周波
数特性図、第２４図は本発明で用いろ高域強調回路のブ
ロック図である。
１１・・・・・・広帯域（静止画用）高域強調回路１２
・・・・・・狭帯域（動画用）高域強調回路１５・・・
・・・重み付き加算回路。
代理人 弁理士 小川勝男１パ）
第 １ 図
第４図
第５図 第６図
第７口
ＩＩ＋７
第１４図
第２０図
第 ２１ 図
第２２図 第２３図FIG. 1 is a block diagram showing one embodiment of the present invention. FIG. 2 is a frequency a% characteristic diagram of a video signal in still image mode. FIG. 3 is a frequency characteristic diagram of a video signal in video mode. Figure 4 is a frequency characteristic diagram of a conventional high-frequency emphasis circuit; Figure 5;
Figure 6 is a frequency characteristic diagram after passing through the high frequency emphasis circuit, respectively.
Fig. 7 is a block diagram showing the configuration of the high frequency emphasizing circuit as the central part of the present invention, Fig. 8 is a frequency characteristic diagram of the wide band emphasizing circuit, Fig. 9 is a frequency characteristic diagram of the narrow band emphasizing circuit, and Fig. 10 is a diagram showing the frequency characteristics of the wide band emphasizing circuit. , FIG. 11 is a frequency characteristic diagram after passing through the high-frequency emphasis circuit according to the present invention, FIGS. 12 and 15 are frequency characteristic diagrams in still image mode and moving image mode, and FIG. 14, respectively. Fig. 15 is a block diagram of the high-frequency emphasis circuit used in the present invention, Figs. 16 and 17 are horizontal frequency characteristic diagrams, and Fig. 1
Figures 8 and 19 are vertical frequency characteristic diagrams. FIG. 20 is a block diagram of a weighted addition circuit, FIG. 21 is a block diagram of another embodiment of the present invention, and FIG. 22 is a block diagram of a weighted addition circuit. FIG. 23 is a frequency characteristic diagram of IDTV still image mode and moving image mode, and FIG. 24 is a block diagram of a high frequency emphasis circuit used in the present invention. 11... Wideband (for still images) high frequency emphasis circuit 12
...Narrow band (for video) high frequency emphasis circuit 15...
...Weighted addition circuit. Agent Patent Attorney Katsuo Ogawa 1) Figure 1 Figure 4 Figure 5 Figure 6 Figure 7 Portion II+7 Figure 14 Figure 20 Figure 21 Figure 22 Figure 23
Claims (1)
ピーク周波数をそれぞれ異にする少なくとも２個以上の
高域強調回路と、前記各高域強調回路の出力に前記動き
検出回路において検出した動き検出量に応じて重みを付
して加算する重み付き加算回路と、を含むことを特徴と
するテレビ信号処理回路。1. A motion detection circuit that detects motion on a television signal screen;
at least two or more high-frequency enhancement circuits having different peak frequencies; and a weighted addition in which the output of each of the high-frequency enhancement circuits is weighted and added according to the amount of motion detected by the motion detection circuit. A television signal processing circuit comprising: a circuit;
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62101913A JPS63268376A (en) | 1987-04-27 | 1987-04-27 | Video signal processing circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62101913A JPS63268376A (en) | 1987-04-27 | 1987-04-27 | Video signal processing circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63268376A true JPS63268376A (en) | 1988-11-07 |
Family
ID=14313149
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62101913A Pending JPS63268376A (en) | 1987-04-27 | 1987-04-27 | Video signal processing circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63268376A (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02166971A (en) * | 1988-12-21 | 1990-06-27 | Nippon Hoso Kyokai <Nhk> | Picture quality improving method |
| JPH03190473A (en) * | 1989-12-20 | 1991-08-20 | Nec Home Electron Ltd | Video signal processor |
| US5105274A (en) * | 1989-09-27 | 1992-04-14 | Sony Corporation | Circuits for reducing noise in a video signal |
| JPH04351178A (en) * | 1991-05-29 | 1992-12-04 | Nec Corp | Moving image filter |
| US5276403A (en) * | 1990-07-09 | 1994-01-04 | Sony Corporation | Nonlinear preemphasis-deemphasis system |
| US7057653B1 (en) | 1997-06-19 | 2006-06-06 | Minolta Co., Ltd. | Apparatus capable of image capturing |
| JP2008028507A (en) * | 2006-07-19 | 2008-02-07 | Sony Corp | Image correction circuit, image correction method and image display |
-
1987
- 1987-04-27 JP JP62101913A patent/JPS63268376A/en active Pending
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02166971A (en) * | 1988-12-21 | 1990-06-27 | Nippon Hoso Kyokai <Nhk> | Picture quality improving method |
| US5105274A (en) * | 1989-09-27 | 1992-04-14 | Sony Corporation | Circuits for reducing noise in a video signal |
| JPH03190473A (en) * | 1989-12-20 | 1991-08-20 | Nec Home Electron Ltd | Video signal processor |
| US5276403A (en) * | 1990-07-09 | 1994-01-04 | Sony Corporation | Nonlinear preemphasis-deemphasis system |
| JPH04351178A (en) * | 1991-05-29 | 1992-12-04 | Nec Corp | Moving image filter |
| US7057653B1 (en) | 1997-06-19 | 2006-06-06 | Minolta Co., Ltd. | Apparatus capable of image capturing |
| JP2008028507A (en) * | 2006-07-19 | 2008-02-07 | Sony Corp | Image correction circuit, image correction method and image display |
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