JPS63215093A - Packaging of thick film hybrid integrated circuit - Google Patents
Packaging of thick film hybrid integrated circuitInfo
- Publication number
- JPS63215093A JPS63215093A JP4920587A JP4920587A JPS63215093A JP S63215093 A JPS63215093 A JP S63215093A JP 4920587 A JP4920587 A JP 4920587A JP 4920587 A JP4920587 A JP 4920587A JP S63215093 A JPS63215093 A JP S63215093A
- Authority
- JP
- Japan
- Prior art keywords
- thick film
- hybrid integrated
- integrated circuit
- thermosetting resin
- film hybrid
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004806 packaging method and process Methods 0.000 title claims description 5
- 239000011347 resin Substances 0.000 claims description 24
- 229920005989 resin Polymers 0.000 claims description 24
- 229920001187 thermosetting polymer Polymers 0.000 claims description 17
- 238000000034 method Methods 0.000 claims description 7
- 239000000758 substrate Substances 0.000 claims description 7
- 239000011248 coating agent Substances 0.000 claims description 4
- 238000000576 coating method Methods 0.000 claims description 4
- 238000007599 discharging Methods 0.000 claims 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 5
- 239000003595 mist Substances 0.000 description 5
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 4
- 239000000463 material Substances 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 238000007654 immersion Methods 0.000 description 2
- 241000544061 Cuculus canorus Species 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 239000005022 packaging material Substances 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
Landscapes
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Application Of Or Painting With Fluid Materials (AREA)
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、厚膜混成集積回路の外装法に関するものであ
る。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method of packaging thick film hybrid integrated circuits.
従来の技術
従来この種の厚膜混成集積回路の外装材塗布は第２図に
示す様な方法であった。第２図において２２はアルミナ
基板２６に実装部品２５が半田付された組立済基板であ
り、外部接続のためリードフレーム２１が半田付されて
いる。BACKGROUND OF THE INVENTION Conventionally, the coating material for this type of thick film hybrid integrated circuit has been applied by a method as shown in FIG. In FIG. 2, reference numeral 22 is an assembled board in which mounted components 25 are soldered to an alumina board 26, and a lead frame 21 is soldered for external connection.
また、樹脂槽２４に熱硬化性樹脂２３が満たされている
。Further, a resin tank 24 is filled with a thermosetting resin 23.
この熱硬化性樹脂２３の中に、リードフレーム２１が半
田付されている組立済基板２２を浸漬して外装材塗布を
行なっていた。The assembled board 22 to which the lead frame 21 is soldered is immersed in the thermosetting resin 23 to coat the exterior material.
発明が解決しようとする問題点
この様な従来の方法では、第２図において浸漬深さを実
装部品２６と同一レベルにした場合、熱硬化性樹脂２３
がリードフレーム２１及び実装部品２６０間に浸透する
まで非常に時間がかかり効率が非常に悪いという問題が
ある。Problems to be Solved by the Invention In such a conventional method, when the immersion depth is set to the same level as the mounted component 26 in FIG.
There is a problem in that it takes a very long time to penetrate between the lead frame 21 and the mounted component 260, and the efficiency is very low.
また、浸漬深さを実装部品２６よりも深くした場合、熱
硬化性樹脂２３の厚みが厚くなると共に実装部品２６の
間に熱硬化性樹脂２３のたまりが発生する。以上の様に
熱硬化性樹脂２３を組立済基板２２に均一に薄く塗布す
ることが難しいという問題点があった。Furthermore, when the immersion depth is made deeper than the mounted components 26, the thickness of the thermosetting resin 23 becomes thicker, and the thermosetting resin 23 accumulates between the mounted components 26. As described above, there is a problem in that it is difficult to uniformly and thinly apply the thermosetting resin 23 to the assembled substrate 22.
本発明は組立済基板に均一に薄く塗布できるようにする
ことを目的とする。An object of the present invention is to enable uniform and thin coating of assembled substrates.
問題点を解決するための手段
この問題点を解決するために本発明は、熱硬化性樹脂を
暖ためて一定粘度とし霧状にして塗布す ′るものであ
る。Means for Solving the Problems In order to solve this problem, the present invention heats a thermosetting resin to a constant viscosity and applies it in the form of a mist.
作用
この方法により熱硬化性樹脂を均一で薄く塗布すること
ができる。Function: This method allows the thermosetting resin to be applied uniformly and thinly.
実施例
第１図は１本発明の一実施例てよる厚膜混成集積回路の
外装材塗布方法の断面図である。Embodiment FIG. 1 is a sectional view of a method of coating a packaging material for a thick film hybrid integrated circuit according to an embodiment of the present invention.
８はアルミナ基板７に実装部品６が半田付された組立燐
基板であり、外部接続のためリードフレーム６及び１ｏ
が半田付されている。リードフレーム６及び１０は、リ
ードフレーム保護用カックー４で保護されている。リー
ドフレーム６とリードフレーム１ｏの中央にはノズル９
の開口が位置し。8 is an assembled phosphor board in which mounted components 6 are soldered to an alumina board 7, and lead frames 6 and 1o are used for external connection.
is soldered. The lead frames 6 and 10 are protected by a lead frame protection cuckoo 4. A nozzle 9 is located in the center of the lead frame 6 and the lead frame 1o.
The opening is located.
ヒーター３で一定温度に保たれた樹脂タンク２内の熱硬
化性樹脂１１が一定圧力に保たれたエアー１によりノズ
ル９の開口より霧状に吐出される。The thermosetting resin 11 in the resin tank 2 kept at a constant temperature by the heater 3 is discharged in the form of mist from the opening of the nozzle 9 by the air 1 kept at a constant pressure.
また１組立済基板８は、固定台１２の上に設置されてい
る。Further, one assembled board 8 is placed on a fixed base 12.
なお、厚膜集積回路は一般的に樹脂により外装されてお
り、この樹脂は熱硬化性である。Note that thick film integrated circuits are generally covered with resin, and this resin is thermosetting.
ここで、リードフレーム５とリードフレーム１０が半田
付されている組立燐基板８を固定台１２の上に固定して
リードフレーム５とリードフレーム１ｏにフレーム保護
用カバー４を設置する。次に熱硬化性樹脂１１が満たさ
れている樹脂タンク２をヒーター３により一定温度に暖
ため、熱硬化性樹脂１１を一定粘度に保ちつつ一定圧力
を加えたエアー１と共にノズル９に供給する。ノズル９
はリードフレーム６とリードフレーム１０の中央にアル
ミナ基板７より一定距離をあけて設置されており、熱硬
化性樹脂１１は、ノズル９より霧状でかつ円錐状に吐出
しながら組立燐基板８に塗布される。Here, the assembled phosphor substrate 8 to which the lead frame 5 and the lead frame 10 are soldered is fixed on the fixing table 12, and the frame protection cover 4 is installed on the lead frame 5 and the lead frame 1o. Next, the resin tank 2 filled with the thermosetting resin 11 is heated to a constant temperature by the heater 3, and the thermosetting resin 11 is supplied to the nozzle 9 together with the air 1 to which a constant pressure is applied while maintaining the thermosetting resin 11 at a constant viscosity. Nozzle 9
is installed at the center of the lead frame 6 and the lead frame 10 at a certain distance from the alumina substrate 7, and the thermosetting resin 11 is discharged from the nozzle 9 in a mist and conical shape onto the assembled phosphor substrate 8. applied.
また、霧状の飛散による樹脂のリードフレーム５．１０
への付着は、リードフレーム６及び１゜のリードフレー
ム保護用カバー４により取り除くことができる。In addition, resin lead frame 5.10 due to mist scattering
This can be removed by the lead frame 6 and the 1° lead frame protective cover 4.
発明の効果
以上の様に本発明によれば、熱硬化性樹脂をヒーターに
より暖ためて一定粘度とし、霧状にして組立燐基板に塗
布することにより、均一で薄く。Effects of the Invention As described above, according to the present invention, the thermosetting resin is heated with a heater to a constant viscosity, and is applied in the form of a mist onto the assembled phosphor substrate, thereby uniformly and thinly applying it.
量産性のよいディップ型厚膜混成集積回路の外装材塗布
を行うことができるという効果が得られる。The effect is that it is possible to apply an exterior material for a dip-type thick film hybrid integrated circuit that is easy to mass-produce.
第１図は本発明の一実施例による厚膜混成集積回路の外
装法を説明するための断面図、第２図は従来の外装法を
示す断面図である。
１・・・・・・エアー、２・・・・・・樹脂タンク、３
・・・・・・ヒーター、６・・・・・・実装部品、７・
・・・・・アルミナ基板、８・・・・・組立燐基板、９
・・・・・・ノズル、１１・・・・・・熱硬化性樹脂。
代理人の氏名 弁理士 中 尾 敏 男 ほか１名第１
図
第２図FIG. 1 is a sectional view illustrating a method of packaging a thick film hybrid integrated circuit according to an embodiment of the present invention, and FIG. 2 is a sectional view showing a conventional packaging method. 1...Air, 2...Resin tank, 3
...Heater, 6...Mounted parts, 7.
...Alumina board, 8...Assembly phosphorus board, 9
... Nozzle, 11 ... Thermosetting resin. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure 2
Claims (1)
供給し、そのノズルの吐出口に対面しておかれた厚膜混
成集積回路の組立済基板に、熱硬化性樹脂に吐出するこ
とにより樹脂を塗布することを特徴とする厚膜混成集積
回路の外装法。By supplying a thermosetting resin and air heated to a constant temperature to a nozzle, and discharging the thermosetting resin onto an assembled substrate of a thick film hybrid integrated circuit facing the nozzle's discharge port. A packaging method for thick film hybrid integrated circuits characterized by coating resin.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4920587A JPS63215093A (en) | 1987-03-04 | 1987-03-04 | Packaging of thick film hybrid integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4920587A JPS63215093A (en) | 1987-03-04 | 1987-03-04 | Packaging of thick film hybrid integrated circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63215093A true JPS63215093A (en) | 1988-09-07 |
Family
ID=12824484
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4920587A Pending JPS63215093A (en) | 1987-03-04 | 1987-03-04 | Packaging of thick film hybrid integrated circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63215093A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02143490A (en) * | 1988-11-24 | 1990-06-01 | Mitsubishi Electric Corp | Coating of resin on surface of thick film circuit board and resin coating device |
| JP2015193096A (en) * | 2014-03-31 | 2015-11-05 | Ｔｏｗａ株式会社 | Resin molding apparatus, and resin molding method |
-
1987
- 1987-03-04 JP JP4920587A patent/JPS63215093A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02143490A (en) * | 1988-11-24 | 1990-06-01 | Mitsubishi Electric Corp | Coating of resin on surface of thick film circuit board and resin coating device |
| JP2015193096A (en) * | 2014-03-31 | 2015-11-05 | Ｔｏｗａ株式会社 | Resin molding apparatus, and resin molding method |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US3859722A (en) | Method of dip-soldering printed circuits to attach components | |
| US3570115A (en) | Method for mounting electronic chips | |
| JPS63215093A (en) | Packaging of thick film hybrid integrated circuit | |
| JPS61500047A (en) | Electronic circuit assembly method | |
| US20020182774A1 (en) | Die-attach method and assemblies using film and epoxy bonds | |
| JPS5848947A (en) | Manufacture of semiconductor device | |
| JPH04299847A (en) | Sealing method for bare chip | |
| JPS584189Y2 (en) | IC sealing structure | |
| JPS60165789A (en) | Coating method | |
| JPS6020596A (en) | Method of producing hybrid integrated circuit | |
| JPH0513655A (en) | Lead frame and manufacturing method thereof | |
| JPS635817Y2 (en) | ||
| JPS6124258A (en) | Enclosure construction of electronic parts | |
| JPH08279405A (en) | Manufacture of chip electronic component | |
| JP2978988B2 (en) | Dip tank and dipping method | |
| JPH03201595A (en) | Hybrid integrated circuit board containing case | |
| JPS5920630U (en) | Resin coating equipment | |
| JPS5873125A (en) | Powder coating method for electronic parts | |
| JPS6214686Y2 (en) | ||
| JPH06224675A (en) | Production of electronic parts | |
| JPS62206895A (en) | Resin coating of hybrid integrated circuit board | |
| JPH0555414A (en) | Coating method for fine part | |
| JPH0462888A (en) | Mounting method of electronic part | |
| JPH05337979A (en) | Method for seal-molding of electronic part | |
| JPS63316445A (en) | Formation of external package of hybrid integrated circuit |