JPS6320117Y2 - - Google Patents

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Publication number
JPS6320117Y2
JPS6320117Y2 JP16697079U JP16697079U JPS6320117Y2 JP S6320117 Y2 JPS6320117 Y2 JP S6320117Y2 JP 16697079 U JP16697079 U JP 16697079U JP 16697079 U JP16697079 U JP 16697079U JP S6320117 Y2 JPS6320117 Y2 JP S6320117Y2
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JP
Japan
Prior art keywords
plate
semiconductor substrate
anode
cathode
alloy
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP16697079U
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Japanese (ja)
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JPS5684347U (en
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Priority to JP16697079U priority Critical patent/JPS6320117Y2/ja
Publication of JPS5684347U publication Critical patent/JPS5684347U/ja
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Publication of JPS6320117Y2 publication Critical patent/JPS6320117Y2/ja
Expired legal-status Critical Current

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Description

【考案の詳細な説明】 この考案は半導体装置に関し、特に加圧接触形
半導体装置の補償板に係わるものである。 従来例によるこの種の加圧接触形半導体装置を
第1図に示してある。すなわち、この第1図にお
いて、例えばP−N−N+接合をもつ半導体基体
1は、一方および他方の主面にアルミ蒸着による
陽極12および陰極13を形成したシリコンウエ
ハ11と、このシリコンウエハ11のパシベーシ
ヨン処理を施した周縁部に被嵌されて、これを機
械的および電気的に保護し、かつ位置決めするた
めの環状ゴム部材14とからなつており、これら
の陽極12および陰極13には、全表面にニツケ
ルメツキを施したタングステン製の陽極および陰
極補償板2,3が接触配置されている。また陰極
パツケージは、内端面凹部に前記陰極補償板3
を受入れるようにした銅ブロツク製の陰極導電体
41と、アルミナセラミツク製の筒状絶縁体42
と、内周縁を陰極導電体41に、外周部を筒状絶
縁体42の一端面に各々ロー付けした陰極フラン
ジ43と、内周部を筒状絶縁体42の他端面にロ
ー付けした溶接リング44とからなつていて、筒
状絶縁体42内に前記半導体基体を位置決めし
て収容する。さらに陽極パツケージは、内端面
凹部に前記陽極補償板2を受入れるようにした銅
ブロツク製の陽極導電体51と、内周縁を陽極導
電体51にロー付けした陽極フランジ52とから
なつていて、この陽極フランジ52を前記溶接リ
ング44に重ね合わせ、両者の外周縁相互を溶接
して気密性のある半導体装置を構成するのであ
る。 従つてこの従来構成によると、半導体基体
両主面には、陰極および陽極補償板3,2を介し
て、陰極および陽極パツケージが接触さ
れ、半導体基体を外気から遮断すると共に、前
記の陰極および陽極パツケージの外側か
ら、図示しない冷却フインをもつ電極端子により
加圧して、これらの間に完全な電気的および熱的
な接触状態を得ているのである。 しかし乍らこのような従来の加圧接触形半導体
装置においては、陰極および陽極補償板3,2
に、焼結、鍛造によつて成型されたタングステン
を用いるために、電気および熱伝導率が悪くて、
半導体基体との接触部における電気および熱接
触抵抗が大きくなるほかに、タングステン自体の
単価も高く、かつ焼結、鍛造後に平面度、平行度
を出すためにラツピング加工などを必要としてい
て加工費が増し、さらには半導体基体と各補償
板2,3との間に、微細な金属粉、絶縁粉などが
介在されると、タングステンの物理的性質が良好
であるために、その介在により硬くてもろい基体
自体が損傷を受けて電気的特性の劣化を招くなど
の欠点があつた。 この考案は従来のこのような欠点を改善するた
めに、圧延されたFe−Ni合金板を所定形状に打
抜きかつこれを焼鈍してなる材料を補償板に用い
たものである。 以下、この考案に係わる半導体装置の一実施例
につき、第2図を参照して詳細に説明する。 この第2図において前記第1図と同一符号は同
一または相当部分を示しており、この実施例では
前記従来例でのタングステンを焼結、鍛造してな
る陰極および陽極補償板3,2に代え、圧延され
たFe−Ni合金板を所定形状に打抜いたのちに焼
鈍した陰極および陽極補償板8,7を用いたもの
である。 前記陰極および陽極補償板8,7の製造は、例
えばFe58%−Ni42%の合金インゴツトを、圧延
率約60%になるように圧延してから、プレスによ
つて所定形状に打抜き成形させ、ついでこれを約
700℃に加熱したのち徐冷して焼鈍し、その後両
面を細かいワイヤブラシなどで軽く研磨して仕上
げる。 ここでこの実施例でのFe58%−Ni42%合金と
タングステンとによる各補償板の特性を比較して
みると、まず体積抵抗率はFe−Ni合金が約48μΩ
cmでタングステンの約55μΩcmに対し約12%小さ
く、線膨張係数はFe−Ni合金が約4.8×10-6/℃
でタングステンの約4.4×10-6/℃に対し約9%
大きい。また硬度(HV)はFe−Ni合金が約140
でタングステンの約330に対し約57%小さくなつ
ており、さらにAl蒸着された半導体基体との間
の接触熱抵抗値はFe−Ni合金が圧接力100Kg/cm2
のとき0.14℃・cm2/WでNiメツキのタングステン
の0.18℃・cm2/Wに対し約22%小さくなつてい
る。すなわち、線膨張係数以外はタングステンよ
りもFe−Ni合金の方が優れていることが判る。 そして線膨張係数が大きくなると、激しい断続
的な繰り返し通電により接触部分に機械的応力が
生じて半導体基体が破損する惧れがあると言われ
ている。従つてここでも断続通電寿命試験を行な
つたところ、Fe−Ni合金補償板を用いた場合に
も、半導体装置の電気的特性は劣化せず、充分に
実用に耐え得ることを確認できた。これは線膨張
係数こそ大きいが、他の特性、特に接触を含めた
電気および熱抵抗値に優れているために、通電な
どの信頼度が増すからであると推定される。 また次に半導体基体と補償板との間に、粒径
50μのアルミナセラミツク粉を介在させて、圧接
力100Kg/cm2で5回の圧接を繰り返して半導体基
体への損傷を調べたところ、Fe−Ni合金の場合
は被試験体5個で不良1、タングステンの場合は
同5個で不良3が確認され、Fe−Ni合金の方が
優れている。これはFe−Ni合金のときには、硬
度の点からアルミナセラミツクが補償板側に喰い
込んで、基体側への損傷度合が改善されるからで
ある。 なおまたこのように補償板をFe−Ni合金とす
る場合には、その結晶粒子を圧延時の約3倍、粒
子径を約60μmにするために、最低700℃で1時
間程度加熱し、炉冷などによる徐冷によつて焼鈍
するのが効果的である。 さらにFe−Ni合金による補償板は、圧延板を
プレス打抜きするだけであるために、平面度、平
行度は特にラツピング加工しなくても規準値を満
足するが、その外周縁部には打ち抜き側にダレ
を、反対側にカエリを生じて好ましくないが、こ
れはダレの側を基体側に合わせることで容易に解
決できた。さらにまたこのようにして得られる
Fe−Ni合金の補償板では、タングステンに比較
して加工費を含めた製造単価を約1/10程度まで大
巾に低減し得るのである。 以上詳述したようにこの考案によるときは、補
償板の材料としてFe−Ni合金により、その圧延
材を所定形状に打抜いたのち焼鈍して使用するだ
けで、従来のタングステンによる補償板を用いる
場合よりも電気的特性を向上でき、かつ同等もし
くはそれ以上の信頼性を得ることができ、また補
償板は、700℃以上で加熱しその後徐冷して焼鈍
して形成されているので、それの結晶粒子は約
60μm程度の大きさにされ、半導体基体と補償板
との間に、微細な金属粉などが介在した状態で両
者を圧接しても、その金属半分は補償板側に喰い
込み、基体への損傷を押え、不良発生率を大きく
下げることができ、併せて安価な装置提供に役立
つなどの特長を有するものである。
[Detailed Description of the Invention] This invention relates to a semiconductor device, and particularly to a compensating plate for a pressure contact type semiconductor device. A conventional pressure contact type semiconductor device of this type is shown in FIG. That is, in FIG. 1, a semiconductor substrate 1 having, for example, a P-N-N + junction includes a silicon wafer 11 on which an anode 12 and a cathode 13 are formed by aluminum vapor deposition on one and the other main surfaces, and this silicon wafer 11. The anode 12 and cathode 13 include an annular rubber member 14 which is fitted over the passivated peripheral edge of the anode 12 and the cathode 13 to mechanically and electrically protect and position the annular rubber member 14. Tungsten anode and cathode compensating plates 2 and 3 whose entire surfaces are nickel-plated are arranged in contact with each other. Further, the cathode package 4 has the cathode compensating plate 3 in the concave portion of the inner end surface.
A cathode conductor 41 made of copper block and a cylindrical insulator 42 made of alumina ceramic.
, a cathode flange 43 whose inner periphery is brazed to the cathode conductor 41 and whose outer periphery is brazed to one end surface of the cylindrical insulator 42; and a weld ring whose inner periphery is brazed to the other end surface of the cylindrical insulator 42. 44, and the semiconductor substrate 1 is positioned and accommodated within the cylindrical insulator 42. Further, the anode package 5 is composed of an anode conductor 51 made of a copper block and having a recessed part on its inner end surface to receive the anode compensating plate 2, and an anode flange 52 whose inner peripheral edge is brazed to the anode conductor 51. This anode flange 52 is superimposed on the welding ring 44, and their outer peripheral edges are welded together to form an airtight semiconductor device. Therefore, according to this conventional configuration, the cathode and anode packages 4 and 5 are in contact with both main surfaces of the semiconductor substrate 1 via the cathode and anode compensating plates 3 and 2, thereby shielding the semiconductor substrate 1 from the outside air and , the cathode and anode packages 4 and 5 are pressurized from the outside by electrode terminals having cooling fins (not shown) to obtain perfect electrical and thermal contact between them. However, in such a conventional pressure contact type semiconductor device, the cathode and anode compensating plates 3, 2
Because tungsten is formed by sintering and forging, it has poor electrical and thermal conductivity.
In addition to the increased electric and thermal contact resistance at the contact portion with the semiconductor substrate 1 , the unit cost of tungsten itself is high, and lapping processing is required to achieve flatness and parallelism after sintering and forging, which increases processing costs. Furthermore, when fine metal powder, insulating powder, etc. are interposed between the semiconductor substrate 1 and each compensating plate 2, 3, the physical properties of tungsten are good, so the interposition makes it harder. The disadvantage was that the fragile substrate itself was damaged, leading to deterioration of electrical characteristics. In order to improve these conventional drawbacks, this invention uses a material made by punching a rolled Fe--Ni alloy plate into a predetermined shape and annealing it for the compensator plate. Hereinafter, one embodiment of the semiconductor device according to this invention will be described in detail with reference to FIG. 2. In this FIG. 2, the same reference numerals as in FIG. 1 indicate the same or corresponding parts, and in this embodiment, the cathode and anode compensating plates 3, 2 made of sintered and forged tungsten in the conventional example are replaced. The cathode and anode compensating plates 8 and 7 are formed by punching a rolled Fe--Ni alloy plate into a predetermined shape and then annealing the plate. The cathode and anode compensation plates 8, 7 are manufactured by rolling an alloy ingot of, for example, 58% Fe-42% Ni to a rolling ratio of about 60%, punching it into a predetermined shape using a press, and then forming the ingot into a predetermined shape. This is approx.
After heating to 700℃, it is slowly cooled and annealed, and then finished by lightly polishing both sides with a fine wire brush. Comparing the characteristics of each compensation plate made of 58% Fe-42% Ni alloy and tungsten in this example, first, the volume resistivity of Fe-Ni alloy is about 48 μΩ.
cm, which is approximately 12% smaller than that of tungsten, which is approximately 55μΩcm, and the linear expansion coefficient of Fe-Ni alloy is approximately 4.8×10 -6 /°C.
9% compared to tungsten's approximately 4.4×10 -6 /℃
big. In addition, the hardness (HV) of Fe-Ni alloy is approximately 140.
It is about 57% smaller than tungsten's about 330, and furthermore, the contact thermal resistance value between the Fe-Ni alloy and the semiconductor substrate on which Al is deposited is 100 Kg/cm 2
When the temperature is 0.14°C·cm 2 /W, it is about 22% smaller than the 0.18°C·cm 2 /W of Ni-plated tungsten. In other words, it can be seen that the Fe--Ni alloy is superior to tungsten in terms other than the coefficient of linear expansion. When the coefficient of linear expansion becomes large, it is said that there is a risk that mechanical stress will be generated in the contact portion due to repeated and intermittent energization, and that the semiconductor substrate will be damaged. Therefore, when an intermittent current life test was conducted here as well, it was confirmed that the electrical characteristics of the semiconductor device did not deteriorate even when the Fe--Ni alloy compensating plate was used, and that the semiconductor device was sufficiently durable for practical use. This is presumed to be because, although the coefficient of linear expansion is large, other properties, especially electrical and thermal resistance including contact, are excellent, which increases the reliability of energization. Next, between the semiconductor substrate and the compensator, a grain size
Damage to the semiconductor substrate was investigated by repeating pressure bonding 5 times with a pressure force of 100 kg/cm 2 with 50μ alumina ceramic powder interposed, and in the case of Fe-Ni alloy, 5 test pieces were found to be defective, 1 defective, In the case of tungsten, defect 3 was confirmed in the same five pieces, and Fe-Ni alloy is superior. This is because when Fe--Ni alloy is used, the alumina ceramic digs into the compensator due to its hardness, which improves the degree of damage to the base. Furthermore, when the compensator is made of Fe-Ni alloy, the crystal grains are heated at a minimum temperature of 700°C for about 1 hour to make the grain size about 60 μm, which is about three times that of rolling. It is effective to perform annealing by slow cooling. Furthermore, since the compensator plate made of Fe-Ni alloy is simply punched out from a rolled plate, its flatness and parallelism meet standard values even without wrapping. This is undesirable because it causes sagging on one side and burrs on the other side, but this can be easily solved by aligning the sagging side with the substrate side. Furthermore, it can be obtained in this way
Compensating plates made of Fe-Ni alloy can significantly reduce the manufacturing cost, including processing costs, to about 1/10 of that of tungsten. As detailed above, when using this invention, the compensator plate material is made of Fe-Ni alloy, and the compensator plate is simply punched into a predetermined shape and annealed, and the conventional compensator plate made of tungsten can be used. It is possible to improve the electrical characteristics and obtain the same or higher reliability than the conventional case, and since the compensator plate is formed by heating at 700℃ or higher, then slowly cooling and annealing, The crystal grains of are approx.
Even if the semiconductor substrate and the compensator are pressed together with fine metal powder interposed between the semiconductor substrate and the compensator, half of the metal will dig into the compensator and cause damage to the substrate. It has the advantage of being able to significantly reduce the occurrence of defects, and also being useful in providing inexpensive equipment.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来例による加圧接触形半導体装置の
構成を示す断面図、第2図はこの考案を適用した
加圧接触形半導体装置の一実施例による構成を示
す断面図である。 ……半導体基体、7および8……陽極および
陰極補償板、および……陰極および陽極パツ
ケージ、41および51……陰極および陽極導電
体、42……筒状絶縁体。
FIG. 1 is a sectional view showing the structure of a conventional pressure contact type semiconductor device, and FIG. 2 is a sectional view showing the structure of an embodiment of a pressure contact type semiconductor device to which this invention is applied. 1 ... Semiconductor substrate, 7 and 8... Anode and cathode compensation plate, 4 and 5 ... Cathode and anode package, 41 and 51... Cathode and anode conductor, 42... Cylindrical insulator.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 一方および他方の各主面に各々電極を形成した
半導体基体と、この半導体基体の各電極に接触す
る各補償板と、これらの各補償板を介して前記半
導体基体に圧接する各電極導電体とを備えた半導
体装置において、前記補償板として、圧延された
Fe−Ni合金板を所定形状に打抜くとともに、こ
の補償板を700℃以上の温度に加熱し、かつ徐冷
して焼鈍することにより形成したことを特徴とす
る半導体装置。
A semiconductor substrate having electrodes formed on one and the other principal surfaces, each compensating plate in contact with each electrode of this semiconductor substrate, and each electrode conductor in pressure contact with the semiconductor substrate via each of these compensating plates. In the semiconductor device equipped with the compensating plate, a rolled
1. A semiconductor device characterized in that it is formed by punching an Fe-Ni alloy plate into a predetermined shape, heating the compensating plate to a temperature of 700° C. or higher, and slowly cooling and annealing the compensator plate.
JP16697079U 1979-11-30 1979-11-30 Expired JPS6320117Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16697079U JPS6320117Y2 (en) 1979-11-30 1979-11-30

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16697079U JPS6320117Y2 (en) 1979-11-30 1979-11-30

Publications (2)

Publication Number Publication Date
JPS5684347U JPS5684347U (en) 1981-07-07
JPS6320117Y2 true JPS6320117Y2 (en) 1988-06-03

Family

ID=29677845

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16697079U Expired JPS6320117Y2 (en) 1979-11-30 1979-11-30

Country Status (1)

Country Link
JP (1) JPS6320117Y2 (en)

Also Published As

Publication number Publication date
JPS5684347U (en) 1981-07-07

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