JPS6320108Y2 - - Google Patents
Info
- Publication number
- JPS6320108Y2 JPS6320108Y2 JP1981056708U JP5670881U JPS6320108Y2 JP S6320108 Y2 JPS6320108 Y2 JP S6320108Y2 JP 1981056708 U JP1981056708 U JP 1981056708U JP 5670881 U JP5670881 U JP 5670881U JP S6320108 Y2 JPS6320108 Y2 JP S6320108Y2
- Authority
- JP
- Japan
- Prior art keywords
- individual electrodes
- lead wires
- electrode
- lead
- composite capacitor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000003990 capacitor Substances 0.000 claims description 27
- 239000002131 composite material Substances 0.000 claims description 21
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical group [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 claims description 15
- 239000000919 ceramic Substances 0.000 claims description 12
- 239000000758 substrate Substances 0.000 claims description 11
- 238000000605 extraction Methods 0.000 claims description 6
- 238000005476 soldering Methods 0.000 description 9
- 229910000679 solder Inorganic materials 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 238000000034 method Methods 0.000 description 4
- 239000011248 coating agent Substances 0.000 description 3
- 238000000576 coating method Methods 0.000 description 3
- 239000011347 resin Substances 0.000 description 3
- 229920005989 resin Polymers 0.000 description 3
- 239000003985 ceramic capacitor Substances 0.000 description 2
- 230000014759 maintenance of location Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000007769 metal material Substances 0.000 description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 239000002390 adhesive tape Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 229910052573 porcelain Inorganic materials 0.000 description 1
- 238000010405 reoxidation reaction Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
Landscapes
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
- Ceramic Capacitors (AREA)
Description
【考案の詳細な説明】
本考案は、例えば交流電源回路等のラインフイ
ルタとして使用される複合コンデンサに関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a composite capacitor used as a line filter in, for example, an AC power supply circuit.
交流電源回路において、電源回路を通して侵入
するノイズまたは外部へ出るノイズを除去するた
め、第１図に示すように、コンデンサC1、C2お
よびC3をＴ型（またはスター型）に結線したラ
インフイルタ１を、電源ライン２、３とアースと
の間に接続したフイルタ回路が従来より知られて
いる。第１図において、S1はスイッチ、F1はフ
ューズ、T1は変圧器である。 In an AC power supply circuit, in order to remove noise that enters through the power supply circuit or noise that goes out to the outside, a line in which capacitors C 1 , C 2 and C 3 are connected in a T-shape (or star shape) as shown in Figure 1 is used. A filter circuit in which a filter 1 is connected between power supply lines 2 and 3 and the ground is conventionally known. In FIG. 1, S 1 is a switch, F 1 is a fuse, and T 1 is a transformer.
前記ラインフイルタ１を構成するため、従来は
第２図Ａ、Ｂに示すような複合コンデンサを用い
ていた。この複合コンデンサは、誘電体磁器等で
構成された平板状の磁器基板４の一面上に、３個
の個別電極５、６、７を設けると共に、磁器基板
４の他面側に前記個別電極５、６、７に共通に対
向する共通電極８を設け、個別電極５、６、７の
それぞれにリード線９、１０、１１を半田付け等
の手段で固着した構造となっていた。なお、１２
は全体をコーテイングする絶縁樹脂である。 To construct the line filter 1, conventionally, a composite capacitor as shown in FIGS. 2A and 2B has been used. This composite capacitor has three individual electrodes 5, 6, and 7 provided on one surface of a flat ceramic substrate 4 made of dielectric ceramic or the like, and the individual electrodes 5 on the other surface of the ceramic substrate 4. , 6, and 7 are provided with a common electrode 8 that commonly faces them, and lead wires 9, 10, and 11 are fixed to each of the individual electrodes 5, 6, and 7 by means such as soldering. In addition, 12
is an insulating resin that coats the entire surface.
ところが、この従来の複合コンデンサは、リー
ド線９〜１１を磁器基板４の片面に設けた個別電
極５〜７にのみ接続し、他面に設けた共通電極８
に対してはリード線を接続しない構造であるた
め、リード線９〜１１の半田付け作業が面倒で、
量産化を図る上の大きな障害となっていた。 However, in this conventional composite capacitor, the lead wires 9 to 11 are connected only to the individual electrodes 5 to 7 provided on one side of the ceramic substrate 4, and the lead wires 9 to 11 are connected only to the common electrode 8 provided on the other side.
Because the structure does not connect lead wires to
This was a major obstacle to mass production.
すなわち、一般に、この種の複合コンデンサ
は、製造工程における量産性を確保すると同時
に、プリント回路基板への実装作業時の作業性を
向上させるため、第３図Ａ、Ｂに示すように、台
板１３ａと粘着テープ１３ｂとより成る保持帯１
３上に、予めリード線９〜１１を所定の間隔で連
続的に保持すると共に、リード線９〜１１の中間
部にアルミニウム線もしくはエナメル線などの半
田の付着しにくいダミーリード線１４を保持し、
リード線９〜１１とダミーリード線１４の弾性を
利用して、両者間に当該複合コンデンサ１５を挟
み込んで行き、保持帯１３を矢印イの如く搬送さ
せながら複合コンデンサ１５を溶融半田槽中に浸
漬させることにより、リード線９〜１１を複合コ
ンデンサ１５の電極５〜７に半田付けする。この
場合、ダミーリード線１４には半田が付着しない
から、ダミーリード線１４が共通電極８に半田付
けされることがなく、回路基板への実装時に簡単
に除去することができる。 That is, in general, this type of composite capacitor is manufactured using a base plate as shown in FIGS. Retention band 1 consisting of 13a and adhesive tape 13b
3, lead wires 9 to 11 are held continuously at predetermined intervals in advance, and a dummy lead wire 14 such as an aluminum wire or an enameled wire to which solder does not easily adhere is held in the middle of the lead wires 9 to 11. ,
Using the elasticity of the lead wires 9 to 11 and the dummy lead wire 14, sandwich the composite capacitor 15 between them, and immerse the composite capacitor 15 in the molten solder bath while transporting the holding band 13 as shown by arrow A. By doing so, the lead wires 9 to 11 are soldered to the electrodes 5 to 7 of the composite capacitor 15. In this case, since no solder adheres to the dummy lead wire 14, the dummy lead wire 14 is not soldered to the common electrode 8, and can be easily removed when mounted on a circuit board.
しかし、一つの保持帯１３上に、リード線９〜
１１と、これとは材質を異になるダミーリード線
１４とを保持させて行く必要があるため、テーピ
ング工程が複雑になり、生産性に欠ける欠点があ
った。仮にダミーリード線１４をリード線９〜１
１と同質の材料によって構成した場合には、半田
デイツプ後にダミーリード線１４を切断する工程
が必要となり、前述の場合と同様に生産性が低下
する。 However, on one holding band 13, the lead wires 9 to
11 and the dummy lead wire 14 made of a different material from the dummy lead wire 14, the taping process becomes complicated, resulting in a lack of productivity. If the dummy lead wire 14 is connected to the lead wires 9 to 1,
If the dummy lead wire 14 is made of the same material as 1, a step of cutting the dummy lead wire 14 after soldering will be necessary, which will reduce productivity as in the case described above.
また、ダミーリード線１４の当る部分に磁器基
板を露出させてダミーリード線１４の半田付けを
防止する方法も提案されているが、その分だけ共
通電極８の面積が減少し、取得容量の低下または
形状の大形化を招き、更に共通電極８の印刷形成
作業が面倒になる不都合がある。 Furthermore, a method has been proposed in which the ceramic substrate is exposed in the area where the dummy lead wires 14 contact to prevent soldering of the dummy lead wires 14, but this reduces the area of the common electrode 8 and reduces the acquisition capacity. Otherwise, there is a problem that the shape becomes larger and the printing process of the common electrode 8 becomes troublesome.
本考案は上述する従来の欠点を除去し、ダミー
リード線が不要で、保持帯へのリード線のテーピ
ング作業および電極に対するリード線の半田付け
作業が容易で、生産性、量産性に富む複合コンデ
ンサを提供することを目的とする。 This invention eliminates the above-mentioned conventional drawbacks, eliminates the need for dummy lead wires, facilitates taping of lead wires to retaining bands and soldering of lead wires to electrodes, and is highly productive and mass-producible. The purpose is to provide
上記目的を達成するため、本考案に係る複合コ
ンデンサは、一面側に３個以上の個別電極を設け
た磁器基板の他面側に、前記個別電極に共通に対
向する共通電極と前記個別電極の少なくとも１つ
に対向する取出電極とを設け、該取出電極および
この取出電極と対向関係にない前記個別電極の少
なくとも２つに、それぞれリード線を接続したこ
とを特徴とする。 In order to achieve the above object, the composite capacitor according to the present invention has a ceramic substrate having three or more individual electrodes on one side, a common electrode that commonly faces the individual electrodes, and a common electrode that commonly faces the individual electrodes on the other side. At least one opposing extraction electrode is provided, and a lead wire is connected to the extraction electrode and at least two of the individual electrodes that are not opposed to the extraction electrode.
以下実施例たる添付図面を参照し、本考案の内
容を具体的に説明する。第４図Ａは本考案に係る
複合コンデンサの正面図、第４図Ｂは同じくその
背面図、第４図Ｃは第４図ＡのB2−B2線上にお
ける側面断面図である。この実施例では、誘電体
磁器で構成された磁器基板１６の一面側に、適当
な間隔をおいて、銀焼付け等より成る３つの個別
電極１７、１８および１９を被着形成すると共
に、磁器基板１６の他面側には、前記個別電極１
７〜１９のそれぞれに対向する共通電極２０およ
び個別電極１８だけに対向する取出電極２１を間
隔をおいて被着形成し、個別電極１７，１９およ
び取出電極２１のそれぞれに、リード線２２、２
３、２４を半田付け等の手段で固着した構造とな
っている。なお、２５は全体を被覆する絶縁樹脂
である。 DESCRIPTION OF THE PREFERRED EMBODIMENTS The content of the present invention will be specifically described below with reference to the accompanying drawings, which are examples. 4A is a front view of a composite capacitor according to the present invention, FIG. 4B is a rear view thereof, and FIG. 4C is a side sectional view taken along line B 2 -B 2 of FIG. 4A. In this embodiment, three individual electrodes 17, 18 and 19 made of silver baking or the like are deposited at appropriate intervals on one side of a ceramic substrate 16 made of dielectric ceramic, and the ceramic substrate On the other side of 16, the individual electrode 1
A common electrode 20 facing each of the electrodes 7 to 19 and a lead-out electrode 21 facing only the individual electrodes 18 are formed at intervals, and lead wires 22, 2 are attached to the individual electrodes 17, 19 and the lead-out electrode 21, respectively.
3 and 24 are fixed together by means such as soldering. Note that 25 is an insulating resin that covers the entire structure.
第５図は上記複合コンデンサの等価回路図であ
り、リード線２２−２３間に、共通電極２０と個
別電極１７、１９との重なり面積によるコンデン
サC4、C5を直列に接続し、このコンデンサA4、
C5の接続点とリード線２４との間に、共通電極
２０−個別電極１８間の重なり面積によるコンデ
ンサC6と、個別電極１８−取出電極２１間の重
なり面積によるコンデンサC7の直列回路を接続
したＴ型またはスター型のコンデンサ回路とな
る。 FIG. 5 is an equivalent circuit diagram of the above-mentioned composite capacitor, in which capacitors C 4 and C 5 are connected in series between the lead wires 22 and 23 based on the overlapping area of the common electrode 20 and the individual electrodes 17 and 19. A4 ,
Between the connection point of C 5 and the lead wire 24, a series circuit of a capacitor C 6 based on the overlapping area between the common electrode 20 and the individual electrode 18 and a capacitor C 7 based on the overlapping area between the individual electrode 18 and the extraction electrode 21 is connected. This results in a connected T-type or star-type capacitor circuit.
上述のような構造であると、リード線２２、２
３、２４を半田付着性の良好な同質の金属材料に
よって構成でき、しかもリード線２２、２４とリ
ード線２３とにより磁器基板１６を両面から挟持
することができるため、リード線２２、２３、２
４のテーピング作業、半田付け作業および絶縁樹
脂２５のコーテング作業が非常に容易になり、生
産性、量産性が著るしく向上する。たとえば、第
３図Ａ、Ｂで説明したように、当該複合コンデン
サを保持帯１３上にテーピングする場合を例にと
ると、まずリード線２２、２３、２４が同質の金
属材料で構成できるため、保持帯１３に対するリ
ード線２２、２３、２４のテーピング作業が非常
に容易になる。また、テーピングされたリード線
２２、２３、２４に複合コンデンサを挟み込み、
その弾発力を利用して挟持できるので、複合コン
デンサの挟込み作業も容易になる。更に、リード
線２２、２３、２４に挟込んだ状態で半田槽中に
浸漬し、リード線２２、２３、２４を個別電極１
７、１８および取出電極２１に半田付けするだけ
でよく、ダミーリード線の除去、切断などの作業
が不要であるから、半田付け作業が非常に容易で
ある。しかも、半田付け工程後はそのまま絶縁コ
ーテイングを施すことができる。 With the structure as described above, the lead wires 22, 2
3 and 24 can be made of the same metal material with good solder adhesion, and the ceramic substrate 16 can be held between both sides by the lead wires 22, 24 and the lead wire 23.
The taping work, soldering work, and coating work with the insulating resin 25 in step 4 are greatly facilitated, and productivity and mass production are significantly improved. For example, as explained in FIGS. 3A and 3B, if we take the case where the composite capacitor is taped onto the retaining band 13, first, since the lead wires 22, 23, and 24 can be made of the same metal material, The work of taping the lead wires 22, 23, 24 to the holding band 13 becomes very easy. In addition, a composite capacitor is sandwiched between the taped lead wires 22, 23, and 24,
Since the elastic force can be used to clamp the composite capacitor, it becomes easier to clamp the composite capacitor. Furthermore, the lead wires 22, 23, 24 are sandwiched between the individual electrodes 1 by immersing them in a solder bath.
7, 18 and the extraction electrode 21, and there is no need to remove or cut the dummy lead wires, the soldering work is very easy. Moreover, an insulating coating can be applied directly after the soldering process.
なお、上記実施例では３個の個別電極を設けた
ものを示したが、それ以上の個数であってもよ
い。また、誘電体磁器コンデンサの代りに、粒界
絶縁形もしくは還元再酸化形等の半導体磁器コン
デンサによって構成してもよい。 In the above embodiment, three individual electrodes are provided, but a larger number may be used. Further, instead of the dielectric ceramic capacitor, a semiconductor ceramic capacitor such as a grain boundary insulation type or a reduction and reoxidation type may be used.
以上述べたように、本考案に係る複合コンデン
サは、一面側に３個以上の個別電極を設けた磁器
基板の他面側に、前記個別電極に共通に対向する
共通電極と前記個別電極の少なくとも一つに対向
する取出電極とを設け、該取出電極およびこの取
出電極と対向関係にない前記個別電極の少なくと
も２つに、それぞれリード線を接続したことを特
徴とするから、リード線によって磁器基板を両面
から挟みつける構造となり、電子部品連化する場
合のテーピング作業、リード線の半田付け作業お
よび絶縁コーテイング作業が非常に容易で、量産
性の高いＴ型結線またはスター結線の複合コンデ
ンサを提供することができる。 As described above, the composite capacitor according to the present invention includes a ceramic substrate having three or more individual electrodes on one side, a common electrode commonly facing the individual electrodes, and at least one of the individual electrodes on the other side. One of the lead electrodes is provided opposite to the other, and a lead wire is connected to the lead electrode and at least two of the individual electrodes that are not in a facing relationship with the lead electrode. To provide a T-type or star-connected composite capacitor that is highly mass-producible and has a structure in which the capacitors are sandwiched from both sides, making it extremely easy to perform taping work when connecting electronic components, soldering work for lead wires, and insulating coating work. be able to.
第１図は複合コンデンサを使用した交流電源回
路の回路図、第２図Ａは従来の複合コンデンサの
正面図、第２図Ｂは同じく側面部分断面図、第３
図Ａは保持帯へのテーピングを説明する図、第３
図Ｂは第３図ＡのB1−B1線上における断面図、
第４図Ａは本考案に係る複合コンデンサの正面
図、第４図Ｂは同じくその背面図、第４図Ｃは第
４図ＡのB2−B2線上における断面図、第５図は
その等価回路図である。
１６…磁器基板、１７，１８，１９…個別電
極、２０…共通電極、２１…取出電極、２２，２
３，２４…リード線。
Figure 1 is a circuit diagram of an AC power supply circuit using a composite capacitor, Figure 2A is a front view of a conventional composite capacitor, Figure 2B is a side partial cross-sectional view, and Figure 3
Figure A is a diagram explaining the taping to the retention band, the third
Figure B is a sectional view taken along line B1 - B1 of Figure 3A,
FIG. 4A is a front view of the composite capacitor according to the present invention, FIG. 4B is a rear view thereof, FIG. 4C is a sectional view taken along line B 2 - B 2 of FIG. 4A, and FIG. It is an equivalent circuit diagram. 16...Porcelain substrate, 17,18,19...Individual electrode, 20...Common electrode, 21...Takeout electrode, 22,2
3, 24...Lead wire.
Claims (1)
の他面側に、前記個別電極に共通に対向する共通
電極と前記個別電極の少なくとも一つに対向する
取出電極とを設け、該取出電極およびこの取出電
極と対向関係にない前記個別電極の少なくとも２
つに、それぞれリード線を接続したことを特徴と
する複合コンデンサ。 A common electrode that commonly faces the individual electrodes and a lead-out electrode that faces at least one of the individual electrodes are provided on the other face of the ceramic substrate on which three or more individual electrodes are provided, and the lead-out electrode and at least two of the individual electrodes not facing this extraction electrode.
A composite capacitor characterized by having a lead wire connected to each.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1981056708U JPS6320108Y2 (en) | 1981-04-20 | 1981-04-20 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1981056708U JPS6320108Y2 (en) | 1981-04-20 | 1981-04-20 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS57168235U JPS57168235U (en) | 1982-10-23 |
| JPS6320108Y2 true JPS6320108Y2 (en) | 1988-06-03 |
Family
ID=29853202
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1981056708U Expired JPS6320108Y2 (en) | 1981-04-20 | 1981-04-20 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6320108Y2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH088744B2 (en) * | 1987-03-06 | 1996-01-29 | 日立エーアイシー株式会社 | Power supply circuit |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS498760A (en) * | 1972-05-24 | 1974-01-25 |
-
1981
- 1981-04-20 JP JP1981056708U patent/JPS6320108Y2/ja not_active Expired
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS498760A (en) * | 1972-05-24 | 1974-01-25 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS57168235U (en) | 1982-10-23 |
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