JPS63198290U - - Google Patents

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本考案の色信号処理回路の１実施例の
構成図、第２図は第１図の信号の周波数特性図、
第３図は第１図の説明に供する波形図、第４図及
び第５図は従来の色信号処理回路の系統図である
。 １はマトリツクス回路、２，３，４は濾波器、
５，６，９，１０，２０，２２は乗算器、７，１
３，１９，２１は加算器、１４は帯域通過濾波器
、１５，１６，１７，１８は遅延素子、２３ａ，
２３ｂは遅延回路、２４は演算回路である。 FIG. 1 is a block diagram of one embodiment of the color signal processing circuit of the present invention, FIG. 2 is a frequency characteristic diagram of the signal in FIG. 1,
FIG. 3 is a waveform diagram for explaining FIG. 1, and FIGS. 4 and 5 are system diagrams of conventional color signal processing circuits. 1 is a matrix circuit, 2, 3, and 4 are filters,
5, 6, 9, 10, 20, 22 are multipliers, 7, 1
3, 19, 21 are adders, 14 is a band pass filter, 15, 16, 17, 18 are delay elements, 23a,
23b is a delay circuit, and 24 is an arithmetic circuit.

Claims (1)

【実用新案登録請求の範囲】 色副搬送波周波数ｆｓｃの４ｎ倍（但し、ｎは
正の整数）の周波数でサンプリングされた第１及
び第２の色信号から成る入力搬送色信号が供給さ
れる、夫々２ｎサンプリング周期に等しい遅延時
間を有する直列接続された一対の遅延回路と、 上記入力搬送色信号及び上記一対の遅延回路の
各出力を演算する演算回路と、 上記一対の遅延回路の接続中点の出力及び上記
演算回路の出力を４ｎｆｓｃの周波数を以て切換
える切換スイツチとを有し、 上記一対の遅延回路及び上記演算回路にて帯域
通過濾波器を構成し、 上記切換スイツチから出力搬送色信号をえるよ
うにして成る色信号処理回路。[Claims for Utility Model Registration] An input carrier color signal consisting of first and second color signals sampled at a frequency 4n times the color subcarrier frequency fsc (where n is a positive integer) is supplied. a pair of series-connected delay circuits each having a delay time equal to 2n sampling periods; an arithmetic circuit for calculating the input carrier color signal and each output of the pair of delay circuits; and a connection midpoint of the pair of delay circuits. and a switch for switching the output of the arithmetic circuit and the output of the arithmetic circuit at a frequency of 4nfsc, the pair of delay circuits and the arithmetic circuit constitute a bandpass filter, and the output carrier color signal is obtained from the switch. The color signal processing circuit consists of this.