JPS63175255U - - Google Patents
Info
- Publication number
- JPS63175255U JPS63175255U JP15686386U JP15686386U JPS63175255U JP S63175255 U JPS63175255 U JP S63175255U JP 15686386 U JP15686386 U JP 15686386U JP 15686386 U JP15686386 U JP 15686386U JP S63175255 U JPS63175255 U JP S63175255U
- Authority
- JP
- Japan
- Prior art keywords
- data
- arithmetic
- detected
- calculation mode
- data memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 9
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
Landscapes
- Calculators And Similar Devices (AREA)
Description
第1図は本考案の電子式卓上計算機の構成を示
すブロツク図、第2図は第1図の液晶表示器の構
成を示す図、第3図は第1図のキーボードの構成
を示す図、第4図は表示メモリの構成を示す模式
図、第5図はレジスタの構成を示す模式図、第6
図はデータメモリの構成を示す模式図、第7図は
第1図の動作状態を示すフローチヤート、第8図
、第9図、第10図、第11図、第12図、第1
3図、第14図及び第15図は、第4図、第5図
、第6図の状態遷移図、第16図、第17図は従
来例を示す図である。
1……制御回路、2……キーボード、3……プ
ログラムメモリ、4……データメモリ、5……駆
動回路、6……表示器。
FIG. 1 is a block diagram showing the configuration of the electronic desk calculator of the present invention, FIG. 2 is a diagram showing the configuration of the liquid crystal display in FIG. 1, FIG. 3 is a diagram showing the configuration of the keyboard in FIG. 1, Figure 4 is a schematic diagram showing the configuration of the display memory, Figure 5 is a schematic diagram showing the configuration of the register, and Figure 6 is a schematic diagram showing the configuration of the register.
7 is a schematic diagram showing the configuration of the data memory, FIG. 7 is a flowchart showing the operating state of FIG. 1, FIGS.
3, FIG. 14, and FIG. 15 are state transition diagrams of FIG. 4, FIG. 5, and FIG. 6, and FIG. 16 and FIG. 17 are diagrams showing the conventional example. DESCRIPTION OF SYMBOLS 1...Control circuit, 2...Keyboard, 3...Program memory, 4...Data memory, 5...Drive circuit, 6...Display device.
Claims (1)
ドと、入力されたデータを記憶するデータメモリ
と、入力されたデータに基づき演算を行なう演算
手段と、前記データメモリの記憶データを順次読
出し表示手段に表示させる読出し手段と、四則キ
ーが2回以上操作されたことを記憶する手段と、
イコールキー信号を検出した時前記記憶手段をチ
エツクし、最初の四則キーの直後であることを検
出した場合には定数計算モードに設定し、一方何
回目かの四則キーの後であることを検出した場合
には、前記データメモリにデータを記憶する演算
モードに設定するよう制御する制御手段で構成し
たことを特徴とする電子式卓上計算機。 A keyboard for inputting numerical data operator data, etc., a data memory for storing the input data, an arithmetic means for performing an operation based on the input data, and a display means for sequentially reading and displaying the data stored in the data memory. a reading means, a means for storing that the four arithmetic keys have been operated two or more times;
When an equal key signal is detected, the storage means is checked, and if it is detected that it is immediately after the first four arithmetic key, it is set to constant calculation mode, and on the other hand, it is detected that it is after the fourth arithmetic key. 1. An electronic desktop calculator, characterized in that the electronic desk calculator is configured to include a control means for controlling the calculation mode to be set to store data in the data memory when the calculation mode is set.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15686386U JPS63175255U (en) | 1986-10-14 | 1986-10-14 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15686386U JPS63175255U (en) | 1986-10-14 | 1986-10-14 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS63175255U true JPS63175255U (en) | 1988-11-14 |
Family
ID=31078883
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15686386U Pending JPS63175255U (en) | 1986-10-14 | 1986-10-14 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS63175255U (en) |
-
1986
- 1986-10-14 JP JP15686386U patent/JPS63175255U/ja active Pending
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