JPS63165915U - - Google Patents

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図はこの発明の一実施例を示す回路構成図
、第２図は第１図の動作説明に供するための図、
第３図は従来回路の一例を示す回路構成図である
。 ３０はミユート回路、３１は排他的論理和回路
、３２，３４及び３３は第１の回路を構成する抵
抗器及びコンデンサ、３５，３６及び３７は第２
の回路を構成する抵抗器及びコンデンサである。 FIG. 1 is a circuit configuration diagram showing an embodiment of the present invention, FIG. 2 is a diagram for explaining the operation of FIG. 1,
FIG. 3 is a circuit configuration diagram showing an example of a conventional circuit. 30 is a mute circuit, 31 is an exclusive OR circuit, 32, 34 and 33 are resistors and capacitors constituting the first circuit, and 35, 36 and 37 are second circuits.
These are the resistors and capacitors that make up the circuit.

Claims (1)

【実用新案登録請求の範囲】 電源投入時に出力が急峻な立ち上がりを示し、
電源切断時に出力が急峻な立ち下がりを示す第１
の回路と、 電源投入時に出力がゆるやかな立ち上がりを示
し、電源切断時に出力がゆるやかな立ち下がりを
示す第２の回路と を備え、上記第１及び第２の回路の出力を排他的
論理和回路の入力側に夫々入力し、その出力によ
つて音声信号のミユーテイング制御を行なうよう
にしたことを特徴とするミユート回路。[Scope of utility model registration claim] The output shows a steep rise when the power is turned on,
The first case where the output shows a steep fall when the power is turned off.
and a second circuit whose output shows a gradual rise when the power is turned on and whose output shows a gradual fall when the power is turned off, and the outputs of the first and second circuits are connected to an exclusive OR circuit. What is claimed is: 1. A muting circuit, characterized in that the muting control of an audio signal is performed by inputting signals to the input sides of the respective input terminals, and controlling the muting of audio signals according to the output thereof.