JPS63164456A - Semiconductor integrated circuit - Google Patents
Semiconductor integrated circuitInfo
- Publication number
- JPS63164456A JPS63164456A JP61314692A JP31469286A JPS63164456A JP S63164456 A JPS63164456 A JP S63164456A JP 61314692 A JP61314692 A JP 61314692A JP 31469286 A JP31469286 A JP 31469286A JP S63164456 A JPS63164456 A JP S63164456A
- Authority
- JP
- Japan
- Prior art keywords
- terminal
- output
- terminals
- circuit
- circuit section
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 9
- 238000012360 testing method Methods 0.000 description 8
- 238000010586 diagram Methods 0.000 description 5
- 230000000593 degrading effect Effects 0.000 description 1
- 238000003745 diagnosis Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
Landscapes
- Tests Of Electronic Circuits (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は半導体集積回路の回路構成、特にその中に構成
されている回路について診断をより容易にする構成を備
える半導体集積回路に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a circuit configuration of a semiconductor integrated circuit, and particularly to a semiconductor integrated circuit having a configuration that facilitates diagnosis of circuits configured therein.
従来、この種の半導体集積回路（以下ＬＳＩと略称する
）は印刷配線された基板上に多数実装されて使用される
が、その内の１つでも故障した場合にはその影響は大き
く、はとんどの場合はシステムダウンにつながるため、
使用されている個々のＬＳＩに対して非常に高度の信頼
性が要求される場合が多い。Conventionally, many semiconductor integrated circuits (hereinafter referred to as LSI) of this type are mounted on a printed circuit board and used, but if even one of them fails, the impact is significant and In most cases, it will lead to system down.
A very high degree of reliability is often required for each LSI used.
上述した従来のＬＳＩは入力端子、出力端子及び電源端
子等で構成されるが、信頼性の高いＬＳＩを得るために
は、その内部に存在する機能回路部を検査するために、
入力端子に検査パターンを印加し、出力端子に印加され
たパターンに対応して出力されるパターンを観測するこ
とによって内部の機能回路部の動作をチェックする方法
がとられている。従って高い信頼性のＬＳＩを得るため
にはこの検査パターンを非常に多数ＬＳＩに対して印加
せねばならず、結果的にはＬＳＩの検査時間が長くなり
、また、高い信頼性を得るための検査パターンの作成に
多大の工数を必要とする欠点があった。The above-mentioned conventional LSI is composed of input terminals, output terminals, power supply terminals, etc., but in order to obtain a highly reliable LSI, in order to inspect the functional circuit section existing inside the LSI,
A method is used to check the operation of the internal functional circuit section by applying a test pattern to an input terminal and observing a pattern output corresponding to the pattern applied to an output terminal. Therefore, in order to obtain a highly reliable LSI, it is necessary to apply this test pattern to a large number of LSIs, which results in a longer test time for the LSI, and There was a drawback that a large amount of man-hours were required to create the pattern.
本発明の目的は上述の欠点を除去したＬＳＩを提供する
ことにある。An object of the present invention is to provide an LSI that eliminates the above-mentioned drawbacks.
（問題点を解決するための手段〕
本発明は回路部入力端子及び回路部出力端子を備え、前
記入力端子に所定の信号が入力したときに所定の動作を
行って前記出力端′子に所定の信号を出力する機能回路
部と、
前記回路部入力端子と同数の入力端子、前記回路部出力
端子と同数の出力端子、切換信号を入力する切換信号入
力端子、前記出力端子の各々と対応する前記回路部出力
端子の各々とを接続する切換素子を備え、前記切換信号
入力端子に前記切換信号が入力しないときは前記出力端
子を前記回路部出力端子に接続し、前記切換信号入力端
子に前記切換信号が人力したときは前記出力端子に対応
する１″Ｍｉ記機能回路部の途中より引き出された追加
出力端子を接続する端子切換回路部とを１つの半導体チ
ップ内に有することを特徴とする半導体集積回路である
。(Means for Solving the Problems) The present invention is provided with a circuit section input terminal and a circuit section output terminal, and when a predetermined signal is input to the input terminal, a predetermined operation is performed to output a predetermined signal to the output terminal. a functional circuit section that outputs a signal, corresponding to the same number of input terminals as the input terminals of the circuit section, the same number of output terminals as the output terminals of the circuit section, a switching signal input terminal that inputs a switching signal, and the output terminals. A switching element is provided for connecting each of the circuit part output terminals, and when the switching signal is not input to the switching signal input terminal, the output terminal is connected to the circuit part output terminal, and the switching element is connected to the switching signal input terminal. One semiconductor chip is characterized by having a terminal switching circuit section that connects an additional output terminal pulled out from the middle of the 1"Mi functional circuit section corresponding to the output terminal when the switching signal is manually input. It is a semiconductor integrated circuit.
次に、本発明の一実施例について図面を参照して詳細に
説明する。Next, one embodiment of the present invention will be described in detail with reference to the drawings.
第１図は本発明の一実施例を示すブロック図である。FIG. 1 is a block diagram showing one embodiment of the present invention.
半導体集積回路（ＬＳＩ） １は機能回路部２と、回路
部入力端子Ｐ、〜Ｐｎと１回路部出力端子Ｑ工〜Ｑｍと
、。Semiconductor integrated circuit (LSI) 1 includes a functional circuit section 2, circuit section input terminals P, -Pn, and circuit section output terminals Q - Qm.
追加出力端子Ｎ１〜Ｎｍと、出力端子Ｂと、切換信号入
力端子Ｔと、実際は電子回路で構成されるが。The additional output terminals N1 to Nm, the output terminal B, and the switching signal input terminal T are actually composed of electronic circuits.
第１図ではその機能を簡明に表現するために単純なスイ
ッチの記号で示しである端子切換回路部３と、該回路部
３と出力端子Ｂとを結ぶ端子Ｒ１〜Ｒｍと切換信号入力
端子と入力端子との両者が混在する入力部Ａとを備えて
構成される。In Fig. 1, the terminal switching circuit section 3, which is shown with a simple switch symbol in order to express its function simply, the terminals R1 to Rm connecting the circuit section 3 and the output terminal B, and the switching signal input terminal. It is configured to include an input terminal and an input section A in which both are mixed.
第１図において、切換信号入力端子Ｔに信号が印加され
ていないときは図に示す如く回路部３は出力端子Ｑ１〜
Ｑｌｌと端子Ｒ１〜Ｒ−をそれぞれ接続している。この
状態は従来のＬＳＩの状態であり、この状態のみで高品
質のＬＳＩを得るためには、非常に膨大な検査パターン
を入力部Ａを通して入力端子Ｐ１〜Ｐｎに印加しそれに
対する回路部２の出力を出力端子０１〜Ｑｍと回路部３
と端子Ｒ１〜Ｒｍを介して出力−子Ｂより観測して判断
しなければならない。In FIG. 1, when no signal is applied to the switching signal input terminal T, the circuit section 3 outputs the output terminals Q1 to Q1 as shown in the figure.
Qll and terminals R1 to R- are respectively connected. This state is the state of a conventional LSI, and in order to obtain a high-quality LSI using only this state, a very large number of test patterns must be applied to the input terminals P1 to Pn through the input section A, and the circuit section 2 must be Output from output terminals 01 to Qm and circuit section 3
This must be determined by observing output terminal B via terminals R1 to Rm.
第２図は第１図を簡略化した図である。FIG. 2 is a simplified diagram of FIG. 1.
ところで機能回路部２の内部を更に細分化し、ある１区
切の機能毎に分割した回路を第１図中でそれぞれＣ（記
号は同一であるが回路は全く異なる）とし、各回路Ｃの
出力の内でその出力が直接出力端子Ｂより観測可能であ
れば、従来端子Ｐ１〜Ｐｎに印加していた検査パターン
数を従来のＬＳＩの品質を損なうことなく合理的に減少
させることができる。そこで本発明は各回路Ｃの出力を
選出しそれらを追加出力端子Ｎ１〜Ｎｍとして出力させ
、入力部Ａを通して入力端子Ｔに信号を印加することに
より、回路部３を動作させて端子Ｎ１〜Ｎ■と端子Ｒ１
〜Ｒｍとを各々接続させて出力端子Ｂより観測可能とし
たものであり、検査パターン数の低減が可能となる・第
３図に入力端子Ｔに一号が印加された状態を示す。By the way, the inside of the functional circuit section 2 is further subdivided, and the circuits divided for each function are designated as C (symbols are the same but the circuits are completely different) in Fig. 1, and the output of each circuit C is If the output can be directly observed from the output terminal B, the number of test patterns conventionally applied to the terminals P1 to Pn can be rationally reduced without degrading the quality of the conventional LSI. Therefore, the present invention selects the outputs of each circuit C, outputs them as additional output terminals N1 to Nm, and applies a signal to the input terminal T through the input part A, thereby operating the circuit part 3 and outputting them as the additional output terminals N1 to Nm. ■ and terminal R1
~Rm are connected to each other so that they can be observed from the output terminal B, making it possible to reduce the number of inspection patterns. FIG. 3 shows a state in which No. 1 is applied to the input terminal T.
実際にＬＳＩを検査する場面においては、検査の途中で
第２図、第一３図の状態を上手に組み合せることによっ
て上述の目的は達成される。When actually testing an LSI, the above objective can be achieved by skillfully combining the states shown in FIGS. 2 and 13 during the test.
以上説明したように本発明はＬＳＩの内部に端子切換回
路部等を内蔵させることにより、従来のＬＳＩの端子数
を最低限１ピンのみ増加させることによって、装置レベ
ルで必要とされる高い信頼性を有するＬＳＩの動作を短
時間で検査でき、かつその検査パターンの作成を従来よ
りも短い工数で行うことができる効果を有する。As explained above, the present invention increases the number of terminals of a conventional LSI by at least one pin by incorporating a terminal switching circuit, etc. inside an LSI, thereby achieving the high reliability required at the device level. The present invention has the advantage that the operation of an LSI having the following characteristics can be tested in a short time, and the test pattern can be created in a shorter number of man-hours than in the past.
第１図は本発明の一実施例のブロック図、第２図は第１
図を簡略化した図、第３図は切換信号入力端子に信号が
印加された状態を簡略化した図である。FIG. 1 is a block diagram of one embodiment of the present invention, and FIG. 2 is a block diagram of an embodiment of the present invention.
FIG. 3 is a simplified diagram showing a state in which a signal is applied to the switching signal input terminal.
Claims (1)
入力端子に所定の信号が入力したときに所定の動作を行
って前記出力端子に所定の信号を出力する機能回路部と
、 前記回路部入力端子と同数の入力端子、前記回路部出力
端子と同数の出力端子、切換信号を入力する切換信号入
力端子、前記出力端子の各々と対応する前記回路部出力
端子の各々とを接続する切換素子を備え、前記切換信号
入力端子に前記切換信号が入力しないときは前記出力端
子を前記回路部出力端子に接続し、前記切換信号入力端
子に前記切換信号が入力したときは前記出力端子に対応
する前記機能回路部の途中より引き出された追加出力端
子を接続する端子切換回路部とを１つの半導体チップ内
に有することを特徴とする半導体集積回路。(1) a functional circuit section that includes a circuit section input terminal and a circuit section output terminal, and performs a predetermined operation to output a predetermined signal to the output terminal when a predetermined signal is input to the input terminal; and the circuit. the same number of input terminals as the section input terminals, the same number of output terminals as the circuit section output terminals, a switching signal input terminal for inputting a switching signal, and a switch for connecting each of the output terminals and each of the corresponding circuit section output terminals. the output terminal is connected to the circuit section output terminal when the switching signal is not input to the switching signal input terminal, and corresponds to the output terminal when the switching signal is input to the switching signal input terminal. 1. A semiconductor integrated circuit comprising, in one semiconductor chip, a terminal switching circuit section for connecting an additional output terminal drawn out from the middle of the functional circuit section.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61314692A JPS63164456A (en) | 1986-12-26 | 1986-12-26 | Semiconductor integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61314692A JPS63164456A (en) | 1986-12-26 | 1986-12-26 | Semiconductor integrated circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63164456A true JPS63164456A (en) | 1988-07-07 |
Family
ID=18056400
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61314692A Pending JPS63164456A (en) | 1986-12-26 | 1986-12-26 | Semiconductor integrated circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63164456A (en) |
-
1986
- 1986-12-26 JP JP61314692A patent/JPS63164456A/en active Pending
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