JPS63147031U - - Google Patents
Info
- Publication number
- JPS63147031U JPS63147031U JP3939587U JP3939587U JPS63147031U JP S63147031 U JPS63147031 U JP S63147031U JP 3939587 U JP3939587 U JP 3939587U JP 3939587 U JP3939587 U JP 3939587U JP S63147031 U JPS63147031 U JP S63147031U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- invalid
- detection means
- shaping
- output signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims 3
- 238000007493 shaping process Methods 0.000 claims 3
- 238000010586 diagram Methods 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
Landscapes
- Manipulation Of Pulses (AREA)
Description
第１図は本考案の一実施例を示すブロツク図、
第２図は第１図に示す各回路の入出力信号の波形
の一例を示す波形図である。
１…増幅器、２…結合コンデンサ、３…信号整
流回路、４，５…コンパレータ、６…ＡＮＤ回路
、８…基準電圧（ＶＲＥＦ）。
FIG. 1 is a block diagram showing an embodiment of the present invention.
FIG. 2 is a waveform diagram showing an example of waveforms of input and output signals of each circuit shown in FIG. 1. DESCRIPTION OF SYMBOLS 1...Amplifier, 2...Coupling capacitor, 3...Signal rectifier circuit, 4, 5...Comparator, 6...AND circuit, 8...Reference voltage (VREF).
Claims (1)
号検出手段と、前記入力信号を波形整形する整形
手段と、前記無効信号検出手段の出力信号と前記
整形手段の出力信号との論理積をとる論理積手段
とを備えることを特徴とする雑音信号除去装置。 (2) 無効信号検出手段は、振幅の絶対値が規定
の電圧以上の入力信号を整流する整流回路と、こ
の整流回路の出力信号を基準電圧で比較する比較
回路とを有する実用新案登録請求の範囲第(1)項
記載の雑音信号除去装置。[Claims for Utility Model Registration] (1) An invalid signal detection means for detecting an invalid signal point of an input signal, a shaping means for shaping the waveform of the input signal, and an output signal of the invalid signal detection means and the shaping means. 1. A noise signal removal device comprising: logical product means for calculating a logical product with an output signal. (2) The invalid signal detection means includes a rectifier circuit that rectifies an input signal whose absolute value of amplitude is equal to or higher than a specified voltage, and a comparison circuit that compares the output signal of the rectifier circuit with a reference voltage. Noise signal removal device according to scope (1).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3939587U JPS63147031U (en) | 1987-03-17 | 1987-03-17 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3939587U JPS63147031U (en) | 1987-03-17 | 1987-03-17 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63147031U true JPS63147031U (en) | 1988-09-28 |
Family
ID=30852517
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3939587U Pending JPS63147031U (en) | 1987-03-17 | 1987-03-17 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63147031U (en) |
-
1987
- 1987-03-17 JP JP3939587U patent/JPS63147031U/ja active Pending
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