JPS63110638A - Semiconductor manufacturing method - Google Patents

Semiconductor manufacturing method

Info

Publication number
JPS63110638A
JPS63110638A JP25641886A JP25641886A JPS63110638A JP S63110638 A JPS63110638 A JP S63110638A JP 25641886 A JP25641886 A JP 25641886A JP 25641886 A JP25641886 A JP 25641886A JP S63110638 A JPS63110638 A JP S63110638A
Authority
JP
Japan
Prior art keywords
etching
sample
plasma
generated
reactive ion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP25641886A
Other languages
Japanese (ja)
Inventor
Shinji Kishimura
眞治 岸村
Kyusaku Nishioka
西岡 久作
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP25641886A priority Critical patent/JPS63110638A/en
Publication of JPS63110638A publication Critical patent/JPS63110638A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To contrive to perform an etching of low damage at high throughput by a method wherein a high-speed etching is performed in a plasma generating chamber until the midst of an etching process and from immediately before the end point of the etching process, a sample stand is shifted from the plasma generating chamber and a reactive ion etching (RIBE) of low damage is performed. CONSTITUTION:A movable sample stage 11 with a sample 3 installed thereon is set in a reaction tank 1 for holding plasma, plasma is generated in the plasma generating tank 1 and a high-speed etching is performed. In the midst of this etching, the movable sample stage 11 is made to shift plasma generating chamber 1 and an RIBE is performed. Hereupon, an electron cycloton resonance is generated by the interaction between magnetic fields generated by magnetic coils 7 and microwaves 8, neutral particles are ionized by electron impact and ions are generated. These ions are directed onto the lead-out sample 3 as ion beams 10 and the sample 3 is etched. The ion beams 10 obtainable at this time can be controlled at low energy and damage to the sample 3 can be lessened.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、半導体製造方法、特にエツチングによる半
導体素子の微細加工方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a semiconductor manufacturing method, and particularly to a method for microfabrication of semiconductor elements by etching.

〔従来の技術〕[Conventional technology]

従来、半導体素子製造において微細加工を行なうのに反
応性イオンエツチング(以下、RIBと称す)が多く使
用されていた。第2図はRIFjの方法を説明する断面
図であり、図において、…はプラズマ発生室、(21は
プラズマ発生用電極、13)は試料、+41H工ツチン
グガスtプラズマ発生室Il+に導入するためのガス導
入系、(5)はガス導入系141によりガス導入を行な
いながらプラズマ発生室11)内を所定のガス圧力に株
りための排気系である。
Conventionally, reactive ion etching (hereinafter referred to as RIB) has been widely used for microfabrication in the manufacture of semiconductor devices. Fig. 2 is a cross-sectional view for explaining the RIFj method. A gas introduction system (5) is an exhaust system for maintaining a predetermined gas pressure in the plasma generation chamber 11) while introducing gas through the gas introduction system 141.

次にRよりの原理について説明する。ガス導入系(4)
によりガスを導入しながら排気系+61により排気を行
ない、プラズマ発生室+11 ’i所定の圧力に保つ。
Next, the principle from R will be explained. Gas introduction system (4)
While introducing gas, exhaust is performed by the exhaust system +61, and the plasma generation chamber +11'i is maintained at a predetermined pressure.

電極+21に高周波電力を印加するとプラズ啼発生室…
内にプラズマが発生する。プラズマにさらされた試料は
絶えず励起中性粒子、電子、イオンからなる粒子の@撃
にさらされ、化学反応により上記試料(3)がエツチン
グされる。
When high frequency power is applied to electrode +21, a plasma noise generation chamber...
Plasma is generated inside. The sample exposed to plasma is constantly bombarded with particles consisting of excited neutral particles, electrons, and ions, and the sample (3) is etched by a chemical reaction.

この場合、イオンシースによりイオンが試料に垂直に加
速されるため異方性エツチングが行なわれ、微細パター
ン形成が可能である。
In this case, since the ions are accelerated perpendicularly to the sample by the ion sheath, anisotropic etching is performed and fine patterns can be formed.

また、現在反応性イオンをビーム状にして試料に照射さ
せることによりエツチングする方法、いわゆる反応性イ
オンビームエツチングC以下。
In addition, there is currently a method of etching by irradiating a sample with reactive ions in the form of a beam, so-called reactive ion beam etching C.

RよりEと称す)技術が開発されている。第8図は皐:
子サイクロトロン共鳴(以下、KCRと称す)型イオン
源を利用したRよりEの方法を説明する断面図であり、
図において、161は試料台、(1)は磁場を発生させ
るための磁気コイル、(8)¥′iヤイクロ波、[91
fiイオン発生室、(lO)はイオン発生室(91から
引き出されたイオンビームであるO 次に、KCRを利用したRIBEの原理について説明す
る。磁場とマイクロ波(81との相反作用により電子を
らせん運動させ、かつ、ECRの条件下で電子がm率よ
く加速される。このためイオン発生室(9)で電子衝撃
による中性粒子の1!離確率が高ま、り高電離プラズマ
が形成される。
(referred to as E rather than R) technology has been developed. Figure 8 is Satoshi:
FIG. 2 is a cross-sectional view illustrating a method of E from R using a child cyclotron resonance (hereinafter referred to as KCR) type ion source;
In the figure, 161 is a sample stage, (1) is a magnetic coil for generating a magnetic field, (8) is a microwave wave, [91
fi ion generation chamber, (lO) is the ion beam extracted from the ion generation chamber (91) Next, the principle of RIBE using KCR will be explained. Electrons are caused to move in a spiral manner and are accelerated at a high rate under ECR conditions.For this reason, the probability of separation of neutral particles due to electron impact increases in the ion generation chamber (9), and highly ionized plasma is formed. be done.

このECRイオ/源より引き出されたイオンビーム(1
0)を試料13)に照射することにより試料(3)のエ
ツチングを行なう。
Ion beam (1
The sample (3) is etched by irradiating the sample 13) with 0).

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

従来のR工E[以上のように構成されているので、プラ
ズマにさらされた試料は絶えず、第4図に示すように高
エネルギー(ときには数100eVにも達する)を持っ
たイオンの衝撃にざらされ、試料が損傷と受けるという
問題点があった。
Conventional R Engineering E [With the above structure, the sample exposed to plasma is constantly bombarded by ions with high energy (sometimes reaching several hundred eV) as shown in Figure 4. However, there was a problem that the sample could be damaged.

一方、第4図に示すようにIICCRイオン源を使用し
たRよりEではイオンビームのエネルギーを数10sV
程度と低くできるため試料の受ける損傷は小さくなるが
、R工Eと比較するとエツチング時のガス圧がt贋ため
エツチング速度が小さくなるという問題点があった。
On the other hand, as shown in FIG.
Although the damage to the sample is reduced because the etching can be performed at a lower level, there is a problem in that the gas pressure during etching is lower than that in RE process E, resulting in a lower etching rate.

この発明は上記のような問題点を解消するためになされ
たもので、試料への損傷を低減できるとともに高速エツ
チングを行なうことのできる半導体製造方法全得ること
を目的とする。
The present invention was made to solve the above-mentioned problems, and its object is to provide a complete semiconductor manufacturing method that can reduce damage to a sample and perform high-speed etching.

〔問題点を解決するための手段〕[Means for solving problems]

この発明に係る半導体製造方法は、エツチング工程の冷
やまではプラズマ発生室中にて高速エツチングを行ない
、エツチング終点1頁前からはプラズマ発生室から試料
台を移幼させ低損傷なRIBEを行なうようにした方法
である。
In the semiconductor manufacturing method according to the present invention, high-speed etching is performed in a plasma generation chamber until the etching process is cooled, and from one page before the etching end point, the sample stage is moved from the plasma generation chamber to perform RIBE with less damage. This is the method I used.

〔作用〕[Effect]

この発明においては、試料台をプラズマ発生室から移l
幼させることにより、プラズマエツチングに続いてRI
BKが行なわれ、高スループツトで低損傷なエツチング
金運成することができる。
In this invention, the sample stage can be moved from the plasma generation chamber.
Plasma etching followed by RI
BK is performed, allowing for high throughput and low damage etching.

〔実施例〕〔Example〕

以下この発明の一実施例を図について説明する。第1図
はこの発明の一実施例による半導体製造方法を示す断面
図であり、図において、+3)は試料、(11)は試料
13)をプラズマ発生室…からR1Bln金行なうため
移動させる可動性試料台、(力と(8)はそれぞれF、
CR放電を起こさせるための磁気コイルとマイクロ波、
+101はプラズマ発生室でKCR放電によって生じた
イオンを引き出したイオンビームである。
An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a cross-sectional view showing a semiconductor manufacturing method according to an embodiment of the present invention. In the figure, +3) is a sample, and (11) is a movability for moving a sample 13) from a plasma generation chamber to conduct R1Bln gold. sample stage, (force and (8) are respectively F,
magnetic coil and microwave to cause CR discharge,
+101 is an ion beam extracted from ions generated by KCR discharge in a plasma generation chamber.

撞ず、第1図1alにおいてプラズマエツチングを行な
う。試料(3)を装着した可動性試料台(II)をグラ
ズリ保持用反応槽(1)内にセットし、ガス導入系(4
1によりエツチングガスに4人しながら排気系(6)に
より排気を行ないプラズマ発生槽11+を所定の圧力に
保つ。磁場及びマイクロ波(8)k印加することにより
プラズ臂発生H1tll内にプラス!が発生する。プラ
ズマにさらされた試料(3)は中性の励起粒子との化学
反応により高速エツチングされる。このとき試料台(1
1)にRFバイアスを印加することにより異方性エツチ
ングが可能である。次にエツチングの冷やでプラズマエ
ツチングを終え、可動式試料台(1■)を第1図1al
lに示すようにプラズマ発生室;11から移幼しRより
Fiを行なう。第1凶(blにおいて磁気コイルtel
による磁場とマイクロ波+81との相互作用により電子
サイクロトロン共鳴?起こさせ、電子衝撃により中性粒
子が電離しイオンを発生する。このイオンゲイオンビー
ム(lO)として引き出し試料(3)に照射することに
より試料(3)トエツチングする。
Instead, plasma etching is performed in FIG. 1al. The movable sample stage (II) with the sample (3) attached is set in the reaction tank (1) for holding the glaze, and the gas introduction system (4
1, the etching gas is evacuated by the exhaust system (6) while four people are in use, and the plasma generation tank 11+ is maintained at a predetermined pressure. By applying a magnetic field and microwave (8)k, plasma arm generation H1tll is positive! occurs. The sample (3) exposed to the plasma is rapidly etched by a chemical reaction with neutral excited particles. At this time, the sample stage (1
Anisotropic etching is possible by applying an RF bias to 1). Next, the plasma etching is finished by cooling the etching process, and the movable sample stage (1) is moved to the position shown in Figure 1, 1al.
As shown in 1, the plasma is transferred from the plasma generation chamber 11 and Fi is performed from R. No. 1 (magnetic coil tel in bl)
Electron cyclotron resonance due to interaction between magnetic field and microwave +81? The electron bombardment causes the neutral particles to ionize and generate ions. The sample (3) is etched by irradiating the extracted sample (3) with this ion beam (lO).

このとき得られるイオンビームtloli20〜30e
Vと低エネルギーVC制御でき試料(3)への損傷を小
さくすることが可能となる。
Ion beam tloli20~30e obtained at this time
It is possible to control V and low energy VC, thereby making it possible to reduce damage to the sample (3).

以上の説明かられかるようic本英瞼例では。As you can see from the above explanation, this is an example of an IC book.

エツチングの余栄まではプラズマ発生室にて高速エツチ
ング2行ない、エツチング途中からは試料台(+11 
e移動してRIBFXi行うようにしたので、デバイス
損傷の少ない高速エツチングを行なうことができた。
Two high-speed etching steps are performed in the plasma generation chamber until the end of etching.
Since the RIBFXi was performed with the E-movement, high-speed etching with little damage to the device could be performed.

なお、上記実施例ではRよりEとしてECR型イオンg
t?用いてエツチング加工する例について述べたが、こ
の発明はこれに限定されるものではなく、活性ガス分子
の化学結合を断ち切ったりあるいに励起状態にもってい
くエネルギーにレーザ光で与えて光ビームがあたったと
ころだけ反応が促進されるようにしてエツチングを行な
う光アシストエツチングにも適用i3T能である。
In addition, in the above example, ECR type ion g is set as E rather than R.
T? Although the present invention is not limited to this example, the present invention is not limited to this, but the present invention is not limited to this, and the invention is not limited to this. The i3T function can also be applied to photo-assisted etching in which etching is performed by promoting the reaction only where it hits.

〔発明の効果〕〔Effect of the invention〕

以上のように、この発明によればエツチング中に試料台
を移動できるようにしたので、高スループツトにて低損
傷エツチングが可能となる効果がある。
As described above, according to the present invention, since the sample stage can be moved during etching, it is possible to perform etching with high throughput and low damage.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明の一実施例による半導体製造方法を示
す断面図、第2図は従来のRIEの方法を示す断面図、
第8図は従来のRIBIIHの方法冷水す断面図、第4
図はイオンエネルギーの分布図である。 ]11はプラズマ発生室、13)は試料、 no+はイ
オンビーム、(川は可動性試料台。 なお、図中、同一符号は同一、又に相当部分を示す。
FIG. 1 is a sectional view showing a semiconductor manufacturing method according to an embodiment of the present invention, FIG. 2 is a sectional view showing a conventional RIE method,
Figure 8 is a cross-sectional view of the conventional RIBIIH method for cooling water.
The figure is a distribution diagram of ion energy. ] 11 is a plasma generation chamber, 13) is a sample, no+ is an ion beam, (River is a movable sample stage. In the figures, the same reference numerals indicate the same or corresponding parts.

Claims (3)

【特許請求の範囲】[Claims] (1)第1の反応性イオンエッチングにより、半導体装
置の除去予定部分の上層部を除去したのち、前記第1の
反応性イオンエッチングに比し、低エッチングレートか
つ低損傷の第2の反応性イオンエッチングにより、前記
部分の残部を除去することを特徴とする半導体製造方法
(1) After the upper layer of the portion of the semiconductor device to be removed is removed by first reactive ion etching, a second reactive ion etching process is performed using a second reactive ion etching process that has a lower etching rate and less damage than the first reactive ion etching process. A semiconductor manufacturing method characterized in that the remaining portion of the portion is removed by ion etching.
(2)第1の反応性イオンエッチングが有磁場マイクロ
波放電プラズマより実現されていることを特徴とする特
許請求の範囲第1項記載の半導体製造方法。
(2) The semiconductor manufacturing method according to claim 1, wherein the first reactive ion etching is realized by magnetic field microwave discharge plasma.
(3)電子サイクロトロン共鳴現象により発生されたプ
ラズマをイオン源とする反応性イオンビームにより第2
の反応性イオンエッチングを行うことを特徴とする特許
請求の範囲第1項または第3項記載の半導体製造方法。
(3) A reactive ion beam using a plasma generated by an electron cyclotron resonance phenomenon as an ion source
4. The semiconductor manufacturing method according to claim 1, wherein reactive ion etching is performed.
JP25641886A 1986-10-27 1986-10-27 Semiconductor manufacturing method Pending JPS63110638A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP25641886A JPS63110638A (en) 1986-10-27 1986-10-27 Semiconductor manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP25641886A JPS63110638A (en) 1986-10-27 1986-10-27 Semiconductor manufacturing method

Publications (1)

Publication Number Publication Date
JPS63110638A true JPS63110638A (en) 1988-05-16

Family

ID=17292392

Family Applications (1)

Application Number Title Priority Date Filing Date
JP25641886A Pending JPS63110638A (en) 1986-10-27 1986-10-27 Semiconductor manufacturing method

Country Status (1)

Country Link
JP (1) JPS63110638A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0474431A (en) * 1990-07-16 1992-03-09 Matsushita Electron Corp Semiconductor device and its manufacture
US6417013B1 (en) 1999-01-29 2002-07-09 Plasma-Therm, Inc. Morphed processing of semiconductor devices

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0474431A (en) * 1990-07-16 1992-03-09 Matsushita Electron Corp Semiconductor device and its manufacture
US6417013B1 (en) 1999-01-29 2002-07-09 Plasma-Therm, Inc. Morphed processing of semiconductor devices

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