JPS63110044U - - Google Patents
Info
- Publication number
- JPS63110044U JPS63110044U JP1987001578U JP157887U JPS63110044U JP S63110044 U JPS63110044 U JP S63110044U JP 1987001578 U JP1987001578 U JP 1987001578U JP 157887 U JP157887 U JP 157887U JP S63110044 U JPS63110044 U JP S63110044U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor chip
- connection line
- board
- integrated circuit
- dam
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 5
- 239000011347 resin Substances 0.000 claims description 4
- 229920005989 resin Polymers 0.000 claims description 4
- 239000004020 conductor Substances 0.000 claims description 3
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
第１図ａは本考案の一実施例のチツプコート樹
脂を省略して示した平面図、同図ｂは同図ａのコ
ート樹脂を含むＡ―Ａ断面図、第２図は従来の混
成集積回路装置の断面図である。
１……混成集積回路基板、２……配線導体、３
……半導体チツプ、４……接続線、５……ダム、
６……チツプコート樹脂、７……ＣＲ部品。
Fig. 1a is a plan view of an embodiment of the present invention with the chip coat resin omitted, Fig. 1b is a sectional view taken along line AA including the coat resin in Fig. 2a, and Fig. 2 is a conventional hybrid integrated circuit. FIG. 2 is a cross-sectional view of the device. 1... Hybrid integrated circuit board, 2... Wiring conductor, 3
...Semiconductor chip, 4...Connection line, 5...Dam,
6...Chip coat resin, 7...CR parts.
Claims (1)
半導体チツプと、前記基板上の配線導体と前記半
導体チツプの電極との間に接続された接続線と、
前記接続線の配線導体側の接続点を内側にして前
記半導体チツプの周りを囲むように設けられたダ
ムと、前記半導体チツプおよび接続線を被つて前
記ダムの内側に充満されたチツプコート樹脂とを
含むことを特徴とする混成集積回路装置。 a hybrid integrated circuit board, a semiconductor chip fixed on the board, a connection line connected between a wiring conductor on the board and an electrode of the semiconductor chip;
A dam is provided to surround the semiconductor chip with the connection point on the wiring conductor side of the connection line inside, and a chip coat resin is filled inside the dam so as to cover the semiconductor chip and the connection line. A hybrid integrated circuit device comprising:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987001578U JPS63110044U (en) | 1987-01-08 | 1987-01-08 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987001578U JPS63110044U (en) | 1987-01-08 | 1987-01-08 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63110044U true JPS63110044U (en) | 1988-07-15 |
Family
ID=30779619
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987001578U Pending JPS63110044U (en) | 1987-01-08 | 1987-01-08 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63110044U (en) |
-
1987
- 1987-01-08 JP JP1987001578U patent/JPS63110044U/ja active Pending