JPS63108284U - - Google Patents
Info
- Publication number
- JPS63108284U JPS63108284U JP19935486U JP19935486U JPS63108284U JP S63108284 U JPS63108284 U JP S63108284U JP 19935486 U JP19935486 U JP 19935486U JP 19935486 U JP19935486 U JP 19935486U JP S63108284 U JPS63108284 U JP S63108284U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- system clock
- frequency
- phase lock
- lock loop
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000002131 composite material Substances 0.000 claims 2
- 239000000284 extract Substances 0.000 claims 1
- 238000000605 extraction Methods 0.000 claims 1
- 238000001514 detection method Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Processing Of Color Television Signals (AREA)
Description
第1図は本考案の一実施例に係わるテレビジヨ
ン受像機のクロツク作成回路の構成を示すブロツ
ク図、第2図は第1図のインターリーブ検出回路
14の構成を示すブロツク図である。
11……信号抽出部、12……第1の位相ロツ
クループ(PLL)、13……第2の位相ロツク
ループ、14……インターリーブ検出回路、15
……セレクタ、21……カウンタ、22……フイ
ールド・カウンタ、23……ウインドー回路。
FIG. 1 is a block diagram showing the configuration of a clock generation circuit for a television receiver according to an embodiment of the present invention, and FIG. 2 is a block diagram showing the configuration of the interleave detection circuit 14 of FIG. 1. 11... Signal extractor, 12... First phase lock loop (PLL), 13... Second phase lock loop, 14... Interleave detection circuit, 15
...Selector, 21...Counter, 22...Field counter, 23...Window circuit.
Claims (1)
スト信号を抽出する信号抽出部と、 この抽出された水平同期信号の周波数の910
倍の周波数を有する第1のシステム・クロツク信
号を作成する第1の位相ロツクループと、 前記抽出されたカラーバースト信号の周波数の
4倍の周波数を有する第2のシステム・クロツク
信号を作成する第2の位相ロツクループと、 前記第1、第2のシステム・クロツク信号の周
波数差が所定範囲内にあるかどうかによつて前記
複合映像信号に含まれる映像信号がインターリー
ブの関係を持つかどうかを検査し、インターリー
ブの関係を持たなければ前記第1のシステム・ク
ロツク信号を選択的に出力し、インターリーブの
関係を持てば前記第2のシステム・クロツク信号
を選択的に出力する選択出力部とを備えたことを
特徴とするテレビジヨン受像機のクロツク作成回
路。[Claims for Utility Model Registration] A signal extraction unit that extracts a horizontal synchronization signal and a color burst signal from a composite video signal;
a first phase lock loop for creating a first system clock signal having a frequency twice the frequency of the extracted color burst signal; and a second phase lock loop for creating a second system clock signal having a frequency four times the frequency of the extracted color burst signal. checking whether the video signals included in the composite video signal have an interleaving relationship based on whether a frequency difference between the phase lock loop and the first and second system clock signals is within a predetermined range. , a selection output section that selectively outputs the first system clock signal if there is no interleaving relationship, and selectively outputs the second system clock signal if there is an interleaving relationship. A clock generation circuit for a television receiver, characterized in that:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19935486U JPS63108284U (en) | 1986-12-27 | 1986-12-27 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19935486U JPS63108284U (en) | 1986-12-27 | 1986-12-27 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS63108284U true JPS63108284U (en) | 1988-07-12 |
Family
ID=31160899
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP19935486U Pending JPS63108284U (en) | 1986-12-27 | 1986-12-27 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS63108284U (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63276994A (en) * | 1987-03-09 | 1988-11-15 | Hitachi Ltd | Signal processor unit for digital television receiver |
JPS6489791A (en) * | 1987-09-30 | 1989-04-04 | Toshiba Corp | Television receiver |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5049935A (en) * | 1973-09-03 | 1975-05-06 | ||
JPS60157391A (en) * | 1984-01-27 | 1985-08-17 | Canon Inc | Luminance signal chromaticity signal separating device |
-
1986
- 1986-12-27 JP JP19935486U patent/JPS63108284U/ja active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5049935A (en) * | 1973-09-03 | 1975-05-06 | ||
JPS60157391A (en) * | 1984-01-27 | 1985-08-17 | Canon Inc | Luminance signal chromaticity signal separating device |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63276994A (en) * | 1987-03-09 | 1988-11-15 | Hitachi Ltd | Signal processor unit for digital television receiver |
JPS6489791A (en) * | 1987-09-30 | 1989-04-04 | Toshiba Corp | Television receiver |
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