JPS6265306A - Fine pitch independent resistance circuit pattern - Google Patents
Fine pitch independent resistance circuit patternInfo
- Publication number
- JPS6265306A JPS6265306A JP60204747A JP20474785A JPS6265306A JP S6265306 A JPS6265306 A JP S6265306A JP 60204747 A JP60204747 A JP 60204747A JP 20474785 A JP20474785 A JP 20474785A JP S6265306 A JPS6265306 A JP S6265306A
- Authority
- JP
- Japan
- Prior art keywords
- insulating substrate
- conductor
- independent resistance
- resistance circuit
- circuit pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Apparatuses And Processes For Manufacturing Resistors (AREA)
- Non-Adjustable Resistors (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、各種電子機器に使用される複数個の独立抵抗
回路を１ブロツク化した独立抵抗ネットワークに関する
ものであシ、微細ピッチの独立抵抗回路を形成するため
のパターン構成に関するものである。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to an independent resistance network in which a plurality of independent resistance circuits used in various electronic devices are combined into one block. The present invention relates to a pattern configuration for forming the pattern.
従来の技術
近年、各種電子機器の軽薄短小化の動きは著しいものか
あυ、受動素子としての抵抗についても。Conventional technology In recent years, there has been a remarkable movement toward making various electronic devices lighter, thinner, and smaller.This also applies to resistors as passive elements.
チップ化や複合、ネットワーク化によって、実装密度が
大幅に向上している。特に、複数個の抵抗を同一絶縁基
板上に形成した抵抗ネットワークについては、端子間ピ
ッチ２．５４Ｍ 、 １．７８ｆｌ 。Packaging density has improved significantly through chipping, compositing, and networking. In particular, for a resistor network in which a plurality of resistors are formed on the same insulating substrate, the pitch between terminals is 2.54M and 1.78fl.
１．２７ｆｉピツチへと縮少化すると共に、チップ形多
端子抵抗ネットワークやミニフラットパッケージなど低
背化された製品が求められている。With the shrinking of the pitch to 1.27fi, there is a demand for products with lower profile such as chip-type multi-terminal resistor networks and mini flat packages.
以下、図面を参照しながら、上述したような従来の抵抗
ネットワークにおける独立抵抗回路パターンについて説
明を行う。Hereinafter, an independent resistance circuit pattern in the conventional resistance network as described above will be explained with reference to the drawings.
第４図は従来の独立抵抗回路パターンを示すものである
。第４図において、１は絶縁基板、２は絶縁基板１上に
複数個形成された導体、３は相対する前記導体２間に形
成された抵抗体である。FIG. 4 shows a conventional independent resistance circuit pattern. In FIG. 4, 1 is an insulating substrate, 2 is a plurality of conductors formed on the insulating substrate 1, and 3 is a resistor formed between the conductors 2 facing each other.
以上のように構成された独立抵抗回路パターンは、必要
に応じて導体２に検針を立てることによシ、両端の抵抗
値を測定しながら、レーザートリミングを行うものであ
る。さらに、導体２部にはリード端子（図示せず）を挿
入した後、半田付けを施すことによって、プリント基板
との接続を行うものである。The independent resistance circuit pattern configured as described above is laser trimmed while measuring the resistance value at both ends by setting a probe on the conductor 2 as necessary. Further, a lead terminal (not shown) is inserted into the conductor 2 portion and then soldered to connect it to the printed circuit board.
発明が解決しようとする問題点
しかしながら、このような構成では、ピッチ間隔の微細
化を図るためには、第４図において導体２、抵抗体３の
幅寸法及びそれらの間隔を縮める以外に方法はなく、下
記の理由により、量産化が困難であった。すなわち、第
一に導体２の幅寸法を縮小した場合、レーザー検針ラン
ドのスペースが充分に゛とれず、レーザー検針の接触不
良が発生する。第２に抵抗体３の幅寸法及びその間隔を
縮小した場合、パターン形成時の印刷ズレ及びレーザー
修正時のレーザービーム照射位置の寸法余裕がなく、隣
接する抵抗体にレーザービームが照射され、所望の°ト
リミング抵抗値が得られなく々る。Problems to be Solved by the Invention However, in such a configuration, in order to achieve a finer pitch interval, there is no other method than shortening the width dimensions of the conductor 2 and the resistor 3 and the interval therebetween as shown in FIG. However, mass production was difficult for the following reasons. That is, first, when the width dimension of the conductor 2 is reduced, sufficient space for the laser meter reading land cannot be secured, resulting in poor contact of the laser meter reading. Second, when the width dimension of the resistor 3 and the interval between them are reduced, there is no dimensional margin for the laser beam irradiation position during printing misalignment during pattern formation and laser correction, and the adjacent resistor is irradiated with the laser beam. I am having trouble getting the trimming resistance value.
前記のように、従来の構成では導体、抵抗体の幅寸法及
び間隔寸法を単に縮めるだけでは、ピッチ間隔の小さい
ものを得ることは、非常に困難であるという問題点を有
していた。As mentioned above, the conventional structure has the problem that it is very difficult to obtain a small pitch by simply reducing the width and spacing of the conductor and resistor.
本発明は前記欠点に鑑み、レーザー修正検針用の導体電
極ランドのスペースが充分に得られ、かつレーザービー
ムの照射位置の寸法余裕が確保できる微細ピッチ独立抵
抗回路パターンを提供することを目的とするものである
。In view of the above-mentioned drawbacks, it is an object of the present invention to provide a fine-pitch independent resistance circuit pattern that can provide sufficient space for the conductive electrode land for laser correction meter reading and also ensure dimensional margins for the laser beam irradiation position. It is something.
問題点を解決するための手段
この目的を達成するために本発明の微細ピッチ独立抵抗
回路パターンは、絶縁基板上に形成された導体と、前記
導体間に形成された抵抗体とを備えた複数個の独立抵抗
回路が千鳥状に配置され、分割用スリットで前記絶縁基
板と隔てられたダミー絶縁基板上にコモン導体とレーザ
ー修正検針用の導体電極ランドを有する構成としたもの
である。Means for Solving the Problems To achieve this object, the fine pitch independent resistance circuit pattern of the present invention comprises a plurality of conductors formed on an insulating substrate and resistors formed between the conductors. Independent resistance circuits are arranged in a staggered manner, and a common conductor and a conductive electrode land for laser correction meter reading are provided on a dummy insulating substrate separated from the insulating substrate by a dividing slit.
作用
この構成によれば、各独立抵抗回路を千鳥状に多段に配
置構成することにより隣接する抵抗体をレーザービーム
で切断することなく、レーザービームの寸法精度余裕を
充分に確保した上で１微細ピツチの独立抵抗回路を形成
することができる。Effect: According to this configuration, by arranging each independent resistor circuit in multiple stages in a staggered manner, adjacent resistors are not cut by the laser beam, and a sufficient margin of dimensional accuracy of the laser beam is secured, and one minute A pitch independent resistance circuit can be formed.
また、ダミー絶縁基板上にコモン導体とレーザー修正検
針用の導体電極ランドを設けることにより、微細ピッチ
にかかわらず、レーザー修正検針用の導体電極ランドの
スペースが充分に得られ、レーザー検針の接触不良が発
生するといったことはなくなることとなる。In addition, by providing the common conductor and the conductor electrode land for laser correction meter reading on the dummy insulating board, sufficient space for the conductor electrode land for laser correction meter reading can be obtained regardless of the fine pitch, and contact failure of laser meter reading can be avoided. This will no longer occur.
実施例
以下本発明の一実施例について、図面を参照しながら説
明する。EXAMPLE An example of the present invention will be described below with reference to the drawings.
第１図は、本発明の一実施例における微細ピッチ独立抵
抗回路パターンを示すものである。第１図において、４
は絶縁基板、６は絶縁基板４上に複数個形成された導体
、６は相対する前記導体６間に形成された抵抗体であり
、これらは３段構造の千鳥状に配列されている。７はダ
ミー絶縁基板。FIG. 1 shows a fine pitch independent resistor circuit pattern in one embodiment of the present invention. In Figure 1, 4
6 is an insulating substrate, 6 is a plurality of conductors formed on the insulating substrate 4, and 6 is a resistor formed between the opposing conductors 6, which are arranged in a staggered three-stage structure. 7 is a dummy insulating board.
８はダミー絶縁基板７上に形成されたコモン導体で、各
独立抵抗回路の導体６の一端が共通に接続されている。Reference numeral 8 denotes a common conductor formed on the dummy insulating substrate 7, to which one end of the conductor 6 of each independent resistance circuit is commonly connected.
９はダミー絶縁基板Ｔ上に形成されたレーザー修正検針
用の導体電極ランドであり、各独立抵抗回路の導体５の
他端が個々に接続形成されている。１ｏは絶縁基板４と
ダミー絶縁基板７とを隔てている分割用スリットである
。Reference numeral 9 denotes a conductive electrode land for laser correction meter reading formed on the dummy insulating substrate T, to which the other end of the conductor 5 of each independent resistance circuit is individually connected. 1o is a dividing slit separating the insulating substrate 4 and the dummy insulating substrate 7.
以上のように構成された微細ピッチ独立抵抗回路パター
ンは、コモン導体８及びレーザー修正検針用の導体電極
ランド９に検針を立てることにより、抵抗値を測定しな
がら、所望の抵抗値を得るためにレーザートリミングを
行うものである。次に、分割用スリット１０部において
基板分割を行いダミー絶縁基板７を除去し、独立抵抗回
路を形成する。The fine-pitch independent resistance circuit pattern configured as described above can be used to obtain a desired resistance value while measuring the resistance value by setting a meter on the common conductor 8 and the conductor electrode land 9 for laser correction meter reading. It performs laser trimming. Next, the substrate is divided at the dividing slit 10, the dummy insulating substrate 7 is removed, and an independent resistance circuit is formed.
第２図は、ダミー絶縁基板７を除去したものである。ま
た、第１図及び第２図において、１１は前記導体６から
延長された外部信号取出し用電極であり、実装時の端子
部としての役割を果たすものである。In FIG. 2, the dummy insulating substrate 7 is removed. Further, in FIGS. 1 and 2, reference numeral 11 is an external signal extraction electrode extended from the conductor 6, and serves as a terminal portion during mounting.
第３図は本発明による微細ピッチ独立抵抗回路の実装方
法の一例を示すものである。第３図において、１２はプ
リント基板を示し、１３は前記プリント基板１２上に形
成された銅箔である。１４はプリント基板１２に取付け
られた半田付部である。FIG. 3 shows an example of a method for mounting a fine pitch independent resistance circuit according to the present invention. In FIG. 3, 12 represents a printed circuit board, and 13 represents a copper foil formed on the printed circuit board 12. In FIG. 14 is a soldered part attached to the printed circuit board 12.
なお、本実施例において、独立抵抗回路は３段構造の千
鳥状の配列としたが、部品寸法の許す限リ、４段千鳥、
５段千鳥状配列としてもよいことは言う１でもない。In this example, the independent resistance circuits were arranged in a three-stage staggered structure, but as far as the component dimensions allow, four-stage staggered, four-stage staggered,
There is no doubt that a five-stage staggered arrangement is also possible.
発明の効果
以上のように本発明は、絶縁基板上の導体と前記導体間
に形成された抵抗体とを備えた独立抵抗回路を、千鳥状
に多段に配置構成することにより。Effects of the Invention As described above, the present invention comprises arranging independent resistance circuits each including a conductor on an insulating substrate and a resistor formed between the conductors in multiple stages in a staggered manner.
隣接する抵抗体をレーザー・ビームで切断することなく
、レーザー・ビーム照射位置の寸法精度余裕を充分に確
保した上で、微細ピッチ独立抵抗回路を形成することが
できる。また、分割用スリットで前記絶縁基板と隔てら
れたダミー絶縁基板上に、コモン導体とレーザー修正検
針用の導体電極ランドを設けることにより、微細ピッチ
にかかわらず、レーザー修正検針用の導体電極ランドの
スペースが充分に得られ、絶縁基板上の導体のピッチの
２倍の寸法余裕でレーザー修正検針用の導体電極ランド
が構成できる。このためレーザー検針の接触不良が発生
するといったことはなくなるものである。It is possible to form a fine-pitch independent resistance circuit without cutting adjacent resistors with a laser beam, while ensuring a sufficient dimensional accuracy margin for the laser beam irradiation position. In addition, by providing a common conductor and a conductor electrode land for laser correction meter reading on a dummy insulating substrate separated from the insulating substrate by a dividing slit, the conductor electrode land for laser correction meter reading can be used regardless of the fine pitch. Sufficient space is obtained, and a conductor electrode land for laser correction meter reading can be configured with a dimensional margin twice the pitch of the conductors on the insulating substrate. This eliminates the occurrence of poor contact during laser meter reading.
このように本発明のパターン構成により、その実用的効
果は犬なるものがある。As described above, the pattern structure of the present invention has significant practical effects.
第１図は本発明の一実施例における微細ピッチ独立抵抗
回路パターンを説明する拡大平面図１第２図は同抵抗回
路パターンのダミー絶縁基板を除去した後の構成を示す
平面図、第３図は本発明によって得られる微細ピッチ独
立抵抗回路の実装例を示す断面図、第４図は従来の独立
抵抗パターンの平面図である。
４・・・・・・絶縁基板、６・・・・・導体、６・・・
・・・抵抗体、７・・・・・・ダミー絶縁基板、８・・
・・・・コモン導体、９・・・・・・レーザー修正検針
用の導体電極ランド、１０・・・・・・分割用スリット
、１１・・・・・・外部信号取出し用電極、１２・・・
・・・プリント基板、１３・・・・・・銅ハク、１４・
・・・・・ハンダ付は部。
代理人の氏名 弁理士 中 尾 敏 男 ほか１名富
ＩＩ！ｉｉ！
第２図
第４図FIG. 1 is an enlarged plan view illustrating a fine pitch independent resistor circuit pattern according to an embodiment of the present invention. FIG. 2 is a plan view showing the configuration of the same resistor circuit pattern after removing the dummy insulating substrate. 4 is a sectional view showing an example of mounting a fine pitch independent resistance circuit obtained by the present invention, and FIG. 4 is a plan view of a conventional independent resistance pattern. 4...Insulating substrate, 6...Conductor, 6...
...Resistor, 7...Dummy insulating board, 8...
... Common conductor, 9 ... Conductor electrode land for laser correction meter reading, 10 ... Slit for division, 11 ... Electrode for external signal extraction, 12 ...・
...Printed circuit board, 13...Copper foil, 14.
...Soldering is part. Name of agent: Patent attorney Toshio Nakao and one other person
II! ii! Figure 2 Figure 4
Claims (1)
れた抵抗体とを備えた複数個の独立抵抗回路が千鳥状に
配置され、分割用スリットで前記絶縁基板と隔てられた
ダミー絶縁基板上にコモン導体とレーザー修正検針用の
導体電極ランドを有する構成とした微細ピッチ独立抵抗
回路パターン。A dummy insulating substrate in which a plurality of independent resistance circuits each including a conductor formed on an insulating substrate and a resistor formed between the conductors are arranged in a staggered manner and are separated from the insulating substrate by a dividing slit. A fine pitch independent resistance circuit pattern with a common conductor on top and a conductor electrode land for laser correction meter reading.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60204747A JPS6265306A (en) | 1985-09-17 | 1985-09-17 | Fine pitch independent resistance circuit pattern |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60204747A JPS6265306A (en) | 1985-09-17 | 1985-09-17 | Fine pitch independent resistance circuit pattern |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3098787A Division JPH04226002A (en) | 1991-04-30 | 1991-04-30 | Fine pitch independent resistance circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6265306A true JPS6265306A (en) | 1987-03-24 |
| JPH0413841B2 JPH0413841B2 (en) | 1992-03-11 |
Family
ID=16495657
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60204747A Granted JPS6265306A (en) | 1985-09-17 | 1985-09-17 | Fine pitch independent resistance circuit pattern |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6265306A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2013102218A (en) * | 2007-08-10 | 2013-05-23 | Rohm Co Ltd | Drive device |
| US10938303B2 (en) | 2007-08-10 | 2021-03-02 | Rohm Co., Ltd. | Driving device |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS50129960A (en) * | 1974-03-20 | 1975-10-14 |
-
1985
- 1985-09-17 JP JP60204747A patent/JPS6265306A/en active Granted
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS50129960A (en) * | 1974-03-20 | 1975-10-14 |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2013102218A (en) * | 2007-08-10 | 2013-05-23 | Rohm Co Ltd | Drive device |
| US8796956B2 (en) | 2007-08-10 | 2014-08-05 | Rohm Co., Ltd. | Driving device |
| US9104215B2 (en) | 2007-08-10 | 2015-08-11 | Rohm Co., Ltd. | Driving device |
| US10938303B2 (en) | 2007-08-10 | 2021-03-02 | Rohm Co., Ltd. | Driving device |
| US11133744B2 (en) | 2007-08-10 | 2021-09-28 | Rohm Co., Ltd. | Driving device |
| US11863068B2 (en) | 2007-08-10 | 2024-01-02 | Rohm Co., Ltd. | Driving device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0413841B2 (en) | 1992-03-11 |
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