JPS6260047U - - Google Patents

Info

Publication number
JPS6260047U
JPS6260047U JP15102685U JP15102685U JPS6260047U JP S6260047 U JPS6260047 U JP S6260047U JP 15102685 U JP15102685 U JP 15102685U JP 15102685 U JP15102685 U JP 15102685U JP S6260047 U JPS6260047 U JP S6260047U
Authority
JP
Japan
Prior art keywords
integrated circuit
resistor
hybrid integrated
substrate
shielding film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15102685U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP15102685U priority Critical patent/JPS6260047U/ja
Publication of JPS6260047U publication Critical patent/JPS6260047U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Non-Adjustable Resistors (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の混成集積回路の一実施例の断
面図、第2図は従来構造の断面図である。 1,11……基板、2,12……配線、3,1
3……抵抗体、4……遮蔽膜(誘電体)。
FIG. 1 is a sectional view of an embodiment of the hybrid integrated circuit of the present invention, and FIG. 2 is a sectional view of a conventional structure. 1, 11... Board, 2, 12... Wiring, 3, 1
3... Resistor, 4... Shielding film (dielectric).

Claims (1)

【実用新案登録請求の範囲】 1 基板上に形成した回路の一部に抵抗体を有す
る混成集積回路において、この抵抗体と基板との
間に誘電体からなる遮蔽膜を形成したことを特徴
とする混成集積回路。 2 フエライト基板上に酸化ルテニウムの抵抗体
を構成し、遮蔽膜を樹脂、ガラス等で構成してな
る実用新案登録請求の範囲第(1)項記載の混成集
積回路。
[Claims for Utility Model Registration] 1. A hybrid integrated circuit having a resistor as part of a circuit formed on a substrate, characterized in that a shielding film made of a dielectric material is formed between the resistor and the substrate. hybrid integrated circuit. 2. A hybrid integrated circuit according to claim (1) of the utility model registration, which comprises a ruthenium oxide resistor on a ferrite substrate and a shielding film made of resin, glass, etc.
JP15102685U 1985-10-01 1985-10-01 Pending JPS6260047U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15102685U JPS6260047U (en) 1985-10-01 1985-10-01

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15102685U JPS6260047U (en) 1985-10-01 1985-10-01

Publications (1)

Publication Number Publication Date
JPS6260047U true JPS6260047U (en) 1987-04-14

Family

ID=31067710

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15102685U Pending JPS6260047U (en) 1985-10-01 1985-10-01

Country Status (1)

Country Link
JP (1) JPS6260047U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02239683A (en) * 1989-03-13 1990-09-21 Omron Tateisi Electron Co Hybrid circuit board and manufacture thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02239683A (en) * 1989-03-13 1990-09-21 Omron Tateisi Electron Co Hybrid circuit board and manufacture thereof

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