JPS6258593B2 - - Google Patents
Info
- Publication number
- JPS6258593B2 JPS6258593B2 JP55147222A JP14722280A JPS6258593B2 JP S6258593 B2 JPS6258593 B2 JP S6258593B2 JP 55147222 A JP55147222 A JP 55147222A JP 14722280 A JP14722280 A JP 14722280A JP S6258593 B2 JPS6258593 B2 JP S6258593B2
- Authority
- JP
- Japan
- Prior art keywords
- photoelectric conversion
- signal charges
- state imaging
- solid
- imaging device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000006243 chemical reaction Methods 0.000 claims description 50
- 238000000034 method Methods 0.000 claims description 30
- 238000003384 imaging method Methods 0.000 claims description 19
- 238000007599 discharging Methods 0.000 claims description 7
- 239000011159 matrix material Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 14
- 238000009825 accumulation Methods 0.000 description 12
- 206010047571 Visual impairment Diseases 0.000 description 7
- 230000010354 integration Effects 0.000 description 7
- 238000007796 conventional method Methods 0.000 description 2
- 238000001514 detection method Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 230000035945 sensitivity Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/40—Extracting pixel data from image sensors by controlling scanning circuits, e.g. by modifying the number of pixels sampled or to be sampled
- H04N25/44—Extracting pixel data from image sensors by controlling scanning circuits, e.g. by modifying the number of pixels sampled or to be sampled by partially reading an SSIS array
- H04N25/441—Extracting pixel data from image sensors by controlling scanning circuits, e.g. by modifying the number of pixels sampled or to be sampled by partially reading an SSIS array by reading contiguous pixels from selected rows or columns of the array, e.g. interlaced scanning
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/71—Charge-coupled device [CCD] sensors; Charge-transfer registers specially adapted for CCD sensors
- H04N25/73—Charge-coupled device [CCD] sensors; Charge-transfer registers specially adapted for CCD sensors using interline transfer [IT]
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
Description
【発明の詳細な説明】
本発明は固体撮像装置の駆動方法に関するもの
である。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for driving a solid-state imaging device.
一般に固体撮像装置では、解像度、及び感度を
向上させるためにインタレース走査が行なわれる
が本発明は、インタレース走査における問題点を
改善するものである。以下にインターライン転送
方式CCDを用いた固体撮像装置を例にとつて説
明する。 Generally, in solid-state imaging devices, interlaced scanning is performed to improve resolution and sensitivity, but the present invention is intended to improve problems in interlaced scanning. A solid-state imaging device using an interline transfer type CCD will be described below as an example.
第１図はインターライン転送方式CCDを有す
る固体撮像装置の要部を示す図である。その動作
は、まず奇数番目の光電変換部１，３，５，……
に蓄積された信号電荷を転送ゲート６を通して電
荷読み出し部７へ転送、検知して１フイールド分
の信号を出力する。続いて偶数番目の光電変換部
２，４，……に蓄積された信号電荷を電荷読み出
し部７へ転送検知して次の１フイルド分の信号を
出力する。この方法を用いると第１フイールドと
第２フイールドを形成する信号電荷は、それぞれ
奇数番目、偶数番目の光電変換部に蓄えられてい
た信号電荷であり、また隣接し、かつ独立である
から、解像度は良好な像が得られる。また１個の
光電変換部に注目すると、２フイールド毎に１度
読み出されるので、信号電荷を積分する時間が、
１フイールド毎に読み出す場合の倍になる。従つ
て、標準テレビ方式（NTSC方式）に従うならば
１フイールド毎に読み出す場合は積分時間が16.7
ｍsecであるのに対して、上記インタレース走査
では33ｍsecになる。この様な駆動法をフレーム
蓄積法とよぶ。 FIG. 1 is a diagram showing the main parts of a solid-state imaging device having an interline transfer type CCD. The operation begins with the odd-numbered photoelectric conversion units 1, 3, 5,...
The accumulated signal charges are transferred to the charge readout section 7 through the transfer gate 6, detected, and outputted as a signal for one field. Subsequently, the signal charges accumulated in the even-numbered photoelectric conversion sections 2, 4, . When this method is used, the signal charges forming the first field and the second field are the signal charges stored in the odd-numbered and even-numbered photoelectric conversion sections, respectively, and are adjacent and independent, so the resolution can be improved. A good image can be obtained. Also, if we focus on one photoelectric conversion unit, it is read out once every two fields, so the time it takes to integrate the signal charge is
This is twice as much as when reading out each field. Therefore, according to the standard television system (NTSC system), the integration time is 16.7 when reading out each field.
msec, whereas in the above-mentioned interlaced scanning, the time is 33 msec. Such a driving method is called a frame accumulation method.
しかし、このような駆動方法には次の様な欠点
がある。 However, such a driving method has the following drawbacks.
すなわち、積分期間中は信号電荷を積分し続け
るので被写体が静止体であれば、積分時間は長く
ても、かまわないが、被写体が動体の場合は、通
常の写真撮影において、動く被写体を遅いシヤツ
タースピードで撮影する場合に生じる被写体のブ
レと同様の現象が生じる。この現象を等価残像と
呼ぶ。 In other words, the signal charge continues to be integrated during the integration period, so if the subject is a stationary object, it does not matter if the integration time is long. A phenomenon similar to the blurring of the subject that occurs when shooting at high speeds occurs. This phenomenon is called equivalent afterimage.
この等価残像を減少させる方法として、フイー
ルド蓄積法とよばれる方法がある。これはまず第
１フイールドで光電変換部２と１、４と３等の偶
数番目とその上の奇数番目の光電変換部に蓄積さ
れた信号電荷を混合して読み出す。第２フイール
ドでは、２と３、４と５等偶数番目とその下の奇
数番目の光電変換部に蓄積された信号電荷を混合
して読み出す。 As a method for reducing this equivalent afterimage, there is a method called field accumulation method. First, in the first field, the signal charges accumulated in the even-numbered photoelectric conversion sections 2 and 1, 4 and 3, etc. and the odd-numbered photoelectric conversion sections above them are mixed and read out. In the second field, the signal charges accumulated in the even-numbered photoelectric conversion sections such as 2nd, 3rd, 4th, and 5th and the odd-numbered photoelectric conversion sections below are mixed and read out.
この方法では、各光電変換部は１フイールド毎
に読み出されるので積分時間は、16.7ｍsecであ
りフレーム蓄積法の半分の時間になるので等価残
像は軽減されるが第１フイールドと第２フイール
ドを構成する信号電荷は、同じ光電変換部に蓄え
られた信号電荷を用い、混合する対の信号電荷を
変えているだけなので、フレーム蓄積モードを行
なうよりも解像度が劣化する。 In this method, each photoelectric conversion unit is read out field by field, so the integration time is 16.7 msec, which is half the time of the frame accumulation method, so the equivalent afterimage is reduced, but the Since the signal charges stored in the same photoelectric conversion section are used and only the signal charges of the pair to be mixed are changed, the resolution is worse than when performing the frame accumulation mode.
本発明は、前記従来の欠点を除去するものであ
りフレーム蓄積法の高い解像度を維持し、かつフ
イールド蓄積法の低い等価残像を実現する固体撮
像装置の駆動方法を提供するものである。 The present invention eliminates the drawbacks of the conventional method and provides a method for driving a solid-state imaging device that maintains the high resolution of the frame accumulation method and achieves low equivalent afterimages of the field accumulation method.
第１図をもとにして本発明の第１の実施例を以
下に説明する。まず奇数番目の光電変換部１，
３，５……に蓄えられた信号電荷を読み出して第
１フイールドを構成する際、奇数番目の光電変換
部１，３，５……に蓄えられた信号電荷を読み出
す前に、まず偶数番目の光電変換部２，４，……
に蓄積された信号電荷を電荷読み出し部７へ転送
し、充分速い周波数で電荷読み出し部７の外部ま
で転送して排出してしまう。或いは電荷読み出し
部内での転送途中段に電荷排出部を設けることに
より、最終段まで転送することなく、途中で排出
してもよい。この排出のための転送周波数は、上
記排出のための転送及びこの後で行なう奇数番目
の光電変換部１，３，５……に蓄えられた信号電
荷を電荷読み出し部へ転送し、更に電荷読み出し
部内での検知部直前までの転送が垂直ブランキン
グ期間内に終了する程度の速い周波数で行なう。
この様に偶数番目の光電変換部２，４……に蓄え
られた信号電荷を速い周波数で排出した後、奇数
番目の光電変換部１，３，５、に蓄えられた信号
電荷を電荷読み出し部７へ転送し、更に電荷読み
出し部内を転送し、順次検知部で検知することに
より、第１フイールドを構成する。次に、奇数番
目の光電変換部１，３，５，……に蓄積された信
号電荷を先程と同じく速い転送周波数で排出した
後、偶数番目の光電変換部２，４，……に蓄積さ
れた信号電荷を電荷読み出し部に転送、検知する
ことによつて第２フイールドを構成する。この方
法によれば、各光電変換部に蓄えられた信号電荷
は１フイールド毎に読み出し、或いは排出される
ので、積分時間は16.7ｍsecとなり、等価残像は
フイールド蓄積法と等しくなる。また第１フイー
ルドと第２フイールドの構成に用いられる信号電
荷は、フレーム蓄積法と同じく独立の光電変換部
に蓄えられた信号電荷を用いるので、フレーム蓄
積法と同じ解像度が得られる。 A first embodiment of the present invention will be described below with reference to FIG. First, the odd-numbered photoelectric conversion unit 1,
When reading out the signal charges stored in the photoelectric converters 1, 3, 5, etc. to form the first field, first read out the signal charges stored in the odd-numbered photoelectric conversion units 1, 3, 5, and so on. Photoelectric conversion units 2, 4,...
The signal charges accumulated in the charge readout section 7 are transferred to the charge readout section 7, and are transferred to the outside of the charge readout section 7 at a sufficiently fast frequency and discharged. Alternatively, by providing a charge discharging section in the middle of transfer in the charge reading section, the charge may be discharged midway without being transferred to the final stage. The transfer frequency for this discharge is determined by the transfer for the discharge described above and the subsequent transfer of the signal charge stored in the odd-numbered photoelectric conversion units 1, 3, 5, etc. to the charge readout unit, and the further charge readout The frequency is so high that the transfer within the unit up to just before the detection unit is completed within the vertical blanking period.
After discharging the signal charges stored in the even-numbered photoelectric conversion units 2, 4, etc. in this way at a fast frequency, the signal charges stored in the odd-numbered photoelectric conversion units 1, 3, 5, etc. are transferred to the charge readout unit. 7, further transferred within the charge readout section, and sequentially detected by the detection section, thereby forming the first field. Next, after the signal charges accumulated in the odd-numbered photoelectric conversion units 1, 3, 5, ... are discharged at the same high transfer frequency as before, the signal charges are accumulated in the even-numbered photoelectric conversion units 2, 4, ... The second field is constructed by transferring the signal charge to the charge readout section and detecting it. According to this method, the signal charges stored in each photoelectric conversion section are read out or discharged field by field, so the integration time is 16.7 msec, and the equivalent afterimage is equal to that of the field accumulation method. Further, as the signal charges used to configure the first field and the second field, signal charges stored in independent photoelectric conversion sections are used as in the frame accumulation method, so that the same resolution as in the frame accumulation method can be obtained.
前記第１の実施例は非読み出しフイールドの信
号電荷を排出した後、読み出しフイールドの信号
電荷を読み出す駆動方法であるが、次に読み出し
フイールドの信号電荷を読み出した後、非読み出
しフイールドの信号電荷を排出する本発明の第２
の実施例における固体撮像装置の駆動方法を説明
する。この方法は、第２図に示す様に、光電変換
部に隣接して、電荷排出部を設ける事により実施
が可能となる。すなわち、第２図において８はオ
ーバーフローコントロールゲート、９はオーバフ
ロードレインであり、信号電荷蓄積中は、光電変
換部の過剰電荷を排出する事により、ブルーミン
グ抑制機能をもつものである。駆動方法は、まず
第１フイールドとして、奇数番目の光電変換部
１，３，５，……に蓄積された信号電荷を転送ゲ
ート６を通して電荷読み出し部７へ転送した後、
オーバーフローコントロールゲート８に電圧を印
加する事により偶数番目の光電変換部に蓄積され
ている信号電荷をオーバーフロードレイン９に排
出する。第２フイールドとして、逆に偶数番目の
光電変換部２，４，……の信号電荷を電荷読み出
し部７へ転送した後、オーバーフローコントロー
ルゲート８に電圧を印加する事により、奇数番目
の光電変換部に蓄積されている信号電荷をオーバ
ーフロードレイン９に排出する。 The first embodiment is a driving method in which the signal charges in the read field are read out after the signal charges in the non-read field are discharged.Next, after the signal charges in the read field are read out, the signal charges in the non-read field are read out. The second aspect of the present invention to discharge
A method of driving a solid-state imaging device in this embodiment will be described. This method can be implemented by providing a charge discharge section adjacent to the photoelectric conversion section, as shown in FIG. That is, in FIG. 2, 8 is an overflow control gate, and 9 is an overflow drain, which have a blooming suppressing function by discharging excess charges from the photoelectric conversion section during signal charge accumulation. The driving method is to first transfer the signal charges accumulated in the odd-numbered photoelectric conversion units 1, 3, 5, . . . to the charge readout unit 7 through the transfer gate 6 as the first field.
By applying a voltage to the overflow control gate 8, the signal charges accumulated in the even-numbered photoelectric conversion sections are discharged to the overflow drain 9. As a second field, after transferring the signal charges of the even-numbered photoelectric conversion units 2, 4, . . . to the charge readout unit 7, by applying a voltage to the overflow control gate 8, The signal charges accumulated in the overflow drain 9 are discharged to the overflow drain 9.
次に、前記第１および第２の実施例をさらに具
体的に理解するために、クロツクパルスの図をも
ちいて以下に説明する。 Next, in order to understand the first and second embodiments more specifically, explanation will be given below using a diagram of clock pulses.
まず、前記第１の実施例に関してクロツクパル
スの図をもちいて再度詳細に説明する。 First, the first embodiment will be explained in detail again using a diagram of clock pulses.
第３図ａは読み出し部７に４相駆動CCDを用
いた場合の模式図（第１図に対応する）、第３図
ｂはそのクロツクパルスの図である。φTは転送
ゲート６に印加されるクロツクパルス、φ１，φ
２，φ３，φ４は４相CCDゲート電極のそれぞ
れに印加されるクロツクパルスである。まず奇数
番目の光電変換部に蓄えられた信号電荷を読み出
す場合には、前もつて偶数番目の光電変換部の信
号電荷を排出する訳である。 FIG. 3a is a schematic diagram (corresponding to FIG. 1) when a four-phase drive CCD is used in the reading section 7, and FIG. 3b is a diagram of the clock pulses thereof. φ T is the clock pulse applied to the transfer gate 6, φ 1 , φ
2 , φ3 , and φ4 are clock pulses applied to each of the four-phase CCD gate electrodes. First, when reading the signal charges stored in the odd-numbered photoelectric conversion units, the signal charges in the even-numbered photoelectric conversion units are first discharged.
クロツクパルスはφTとφ３に同時に正電圧を
印加する期間を設けることにより、偶数番目の光
電変換部に蓄えられていた信号電荷をφ３ゲート
下に転送し、転送ゲートφTを閉じた後、速い周
波数でCCD内を順次転送してゆき排出する（第
３図ｂのＡ期間）。その後、φTとφ１に同時に正
電圧を印加する期間を設けて、奇数番目の光電変
換部に蓄えられた信号電荷をφ１ゲート下に転送
し、φTを閉じた後、CCD内を順次転送し、検知
出力する（第３図ｂのＢ期間）。続いて奇数番目
の光電変換部の信号電荷を排出（第３図ｂのＣ期
間）したのち、偶数番目を読み出す（第３図ｂの
Ｄ期間）のも全く同様である。 By providing a period in which a positive voltage is simultaneously applied to φ T and φ 3 , the clock pulse transfers the signal charges stored in the even-numbered photoelectric conversion sections to below the φ 3 gate, and after closing the transfer gate φ T. , and are sequentially transferred within the CCD at a high frequency and discharged (period A in Fig. 3b). After that, a period is set in which a positive voltage is applied to φ T and φ 1 at the same time, and the signal charge stored in the odd-numbered photoelectric conversion section is transferred to the bottom of the φ 1 gate, and after closing φ T , the inside of the CCD is The signals are sequentially transferred and detected and output (period B in FIG. 3b). Subsequently, after the signal charges of the odd-numbered photoelectric conversion sections are discharged (period C in FIG. 3b), even-numbered photoelectric conversion sections are read out (period D in FIG. 3b) in exactly the same manner.
次に前記第２の実施例についてクロツクパルス
の図をもちいて同様の説明を行なう。第４図ａは
先程と同じく読み出し部７に４相駆動CCDを用
いた場合の模式図（第２図に対応する）で、第４
図ｂはそのクロツクパルスの図である。φ0FCGは
オーバーフローコントロールゲートに印加される
クロツクパルスである。まずφTとφ１に同時に
正電圧を印加する期間を設けて、奇数番目の光電
変換部に蓄えられていた信号電荷をφ１ゲート下
に転送し、φTを閉じたのち、CCD内を転送し順
次、検知出力する（第４図ｂのＥ期間）。 Next, a similar explanation will be given for the second embodiment using a diagram of clock pulses. Figure 4a is a schematic diagram (corresponding to Figure 2) when a 4-phase drive CCD is used in the readout section 7 as before.
Figure b is a diagram of the clock pulses. φ 0FCG is the clock pulse applied to the overflow control gate. First, a period is set in which a positive voltage is applied to φ T and φ 1 at the same time, and the signal charge stored in the odd-numbered photoelectric conversion section is transferred to the bottom of the φ 1 gate. After closing φ T , the inside of the CCD is transferred. The signals are transferred and sequentially detected and output (period E in FIG. 4b).
このとき、信号電荷をφ１ゲート下へ転送し、
φTを閉じた後Ｅ期間内の任意の時刻にφ0FCGに
正電圧を印加すれば、偶数番目の光電変換部に蓄
えられていた信号電荷（及び、もしも奇数番目の
光電変換部に取り残しがあれば、その残留電荷
も）はオーバーフロードレイン９へ排出される
（第４図ｂのＦ期間）。 At this time, the signal charge is transferred below the φ1 gate,
If a positive voltage is applied to φ 0FCG at any time within the E period after closing φ T , the signal charge stored in the even-numbered photoelectric conversion units (and if any signal charges are left behind in the odd-numbered photoelectric conversion units) is removed. If any, the residual charge is also discharged to the overflow drain 9 (period F in FIG. 4b).
続いて偶数番目の光電変換部に蓄えられた信号
電荷を読み出すときは、第４図ｂのＧ期間の様に
同様のクロツクパルスを印加すればよい。このと
きは、φ0FCGに正電圧を印加したＨ期間に排出が
行なわれる。第４図ａ，ｂの例では、Ｆ(H)期間の
終了時からＧ(E)期間の開始時までが偶（奇）数番
目の光電変換部での信号光電荷集積時間となるの
でφ0FCGのクロツクパルスの立ち下りの位置を調
整することにより、集積時間を調整することがで
きる。従つて、等価残像を低減する上で一層有効
である。 Subsequently, when reading out the signal charges stored in the even-numbered photoelectric conversion sections, it is sufficient to apply a similar clock pulse as in period G in FIG. 4b. At this time, the discharge is performed during the H period when a positive voltage is applied to φ 0FCG . In the examples shown in Figures 4a and 4b, the time from the end of the F(H) period to the start of the G(E) period is the signal photoelectric charge integration time in the even (odd) numbered photoelectric conversion units, so φ The integration time can be adjusted by adjusting the falling position of the 0FCG clock pulse. Therefore, it is more effective in reducing equivalent afterimages.
前記説明は、４相駆動CCDを用いた場合を例
にとり行なつたが、２相駆動CCD、BBD、MOS
スイツチ等を用いても同様の効果をもつ駆動を行
なえることはもちろんである。 The above explanation was given using a four-phase drive CCD as an example, but two-phase drive CCD, BBD, MOS
Of course, a switch or the like can also be used to drive with the same effect.
さらに前記説明はインターライン転送方式
CCDにおける実施例であつたが、光電変換部の
信号電荷を読み出す手段として、MOSスイツチ
を用いた固体撮像装置でも本発明は適用できる。 Furthermore, the above explanation is based on the interline transfer method.
Although the embodiment is a CCD, the present invention can also be applied to a solid-state imaging device using a MOS switch as a means for reading signal charges of a photoelectric conversion section.
以上説明したように本発明の固体撮像装置の駆
動方法は、フレーム蓄積法の高い解像度を維持し
つつ、フイールド蓄積法の低い残像を実現できる
もので、利用価値が大きい。 As explained above, the method for driving a solid-state imaging device according to the present invention can maintain the high resolution of the frame accumulation method while achieving low afterimages of the field accumulation method, and has great utility value.
第１図は従来および本発明の第１の実施例にお
ける固体撮像装置の駆動方法を説明するための
図、第２図は本発明の第２の実施例における固体
撮像装置の駆動方法を説明するための図、第３図
ａは同第１の実施例をさらに具体的に説明するた
めの４相駆動CCDを用いた固体撮像装置の模式
図、第３図ｂは第３図ａの固体撮像装置を駆動す
るためのクロツクパルスの図、第４図ａは同第２
の実施例をさらに具体的に説明するための４相駆
動CCDを用いた固体撮像装置の模式図、第４図
ｂは第４図ａの固体撮像装置を駆動するためのク
ロツクパルスの図である。
１，３，５……奇数番目の光電変換部、２，４
……偶数番目の光電変換部、６……転送ゲート、
７……電荷読み出し部、８……オーバーフローコ
ントロールゲート、９……オーバーフロードレイ
ン。
FIG. 1 is a diagram for explaining a method for driving a solid-state imaging device in the conventional method and a first embodiment of the present invention, and FIG. 2 is a diagram for explaining a method for driving a solid-state imaging device in a second embodiment of the present invention. FIG. 3a is a schematic diagram of a solid-state imaging device using a four-phase drive CCD to further specifically explain the first embodiment, and FIG. 3b is a diagram of the solid-state imaging device of FIG. 3a. Diagram of clock pulses for driving the device, Figure 4a is the same as Figure 2.
FIG. 4b is a diagram of a clock pulse for driving the solid-state imaging device of FIG. 4a. 1, 3, 5... odd numbered photoelectric conversion unit, 2, 4
...even-numbered photoelectric conversion unit, 6...transfer gate,
7... Charge readout section, 8... Overflow control gate, 9... Overflow drain.
Claims (1)
電変換素子に蓄積された信号電荷を転送、検知す
る電荷読み出し部よりなる固体撮像装置におい
て、１行とびの行の光電変換素子からなる第１の
光電変換素子群に蓄積された信号電荷を排出（ま
たは読み出）した後に、前記第１の光電変換素子
群とは異なる行の光電変換素子からなる第２の光
電変換素子群に蓄積された信号電荷を読み出（ま
たは排出）し、続いて、前記第２の光電変換素子
群に蓄積された信号電荷を排出（または読み出）
した後に、前記第１の光電変換素子群に蓄積され
た信号電荷の読み出し（または排出）を行うこと
を特徴とする固体撮像装置の駆動方法。 ２ 固体撮像装置がインターライン転送方式電荷
結合素子であることを特徴とする特許請求範囲第
１項記載の固体撮像装置の駆動方法。 ３ 固体撮像装置が、光電変換素子に蓄積された
信号電荷を電荷読み出し部へ転送する手段として
MOSスイツチを有していることを特徴とする特
許請求範囲第１項記載の固体撮像装置の駆動方
法。[Scope of Claims] 1. In a solid-state imaging device comprising photoelectric conversion elements arranged in a matrix and a charge readout section that transfers and detects signal charges accumulated in the photoelectric conversion elements, the photoelectric conversion elements in every row are arranged in rows and columns. After discharging (or reading) the signal charges accumulated in the first photoelectric conversion element group consisting of conversion elements, a second photoelectric conversion element consisting of photoelectric conversion elements in a different row from the first photoelectric conversion element group is performed. Reading (or discharging) the signal charges accumulated in the element group, and then discharging (or reading) the signal charges accumulated in the second photoelectric conversion element group.
A method for driving a solid-state imaging device, comprising reading out (or discharging) signal charges accumulated in the first photoelectric conversion element group. 2. The method for driving a solid-state imaging device according to claim 1, wherein the solid-state imaging device is an interline transfer type charge-coupled device. 3. The solid-state imaging device serves as a means for transferring signal charges accumulated in the photoelectric conversion element to the charge readout section.
2. A method for driving a solid-state imaging device according to claim 1, further comprising a MOS switch.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55147222A JPS5769981A (en) | 1980-10-20 | 1980-10-20 | Drive method for solid-state image sensor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55147222A JPS5769981A (en) | 1980-10-20 | 1980-10-20 | Drive method for solid-state image sensor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5769981A JPS5769981A (en) | 1982-04-30 |
| JPS6258593B2 true JPS6258593B2 (en) | 1987-12-07 |
Family
ID=15425325
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP55147222A Granted JPS5769981A (en) | 1980-10-20 | 1980-10-20 | Drive method for solid-state image sensor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5769981A (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6234471A (en) * | 1985-08-06 | 1987-02-14 | Nec Corp | Driving method for solid-state image pickup device |
| JPH0773347B2 (en) * | 1985-10-18 | 1995-08-02 | 日本電気株式会社 | Driving method for solid-state imaging device |
| JPS63109673A (en) * | 1986-10-27 | 1988-05-14 | Nec Corp | Charge coupled image pickup device |
-
1980
- 1980-10-20 JP JP55147222A patent/JPS5769981A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5769981A (en) | 1982-04-30 |
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