JPS6242368A - Cosine equalizing system - Google Patents
Cosine equalizing systemInfo
- Publication number
- JPS6242368A JPS6242368A JP18124385A JP18124385A JPS6242368A JP S6242368 A JPS6242368 A JP S6242368A JP 18124385 A JP18124385 A JP 18124385A JP 18124385 A JP18124385 A JP 18124385A JP S6242368 A JPS6242368 A JP S6242368A
- Authority
- JP
- Japan
- Prior art keywords
- constant
- disc
- disk
- operational amplifier
- outside
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Networks Using Active Elements (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
Abstract
Description
【発明の詳細な説明】
〔概要〕
磁気ディスクや光ディスク等のディスクに記録されたデ
ータを読出す場合、ディスク円板の外側と内側とでは分
解能が異なるため、読出されたデータの波形を2値信号
に変換し易く整形する余弦等化回路の定数を切替えて、
最適等化状態でデータの再生を行う。[Detailed Description of the Invention] [Summary] When reading data recorded on a disk such as a magnetic disk or an optical disk, the resolution is different between the outside and inside of the disk disk, so the waveform of the read data is converted into a binary format. By switching the constants of the cosine equalization circuit that shapes the signal to make it easier to convert,
Data is reproduced in the optimal equalization state.
本発明はディスクに記録されたデータを再生する記録再
生回路に係り、特にディスクから続出したデータの分解
能の変化に対応して、等化回路の定数を切替える余弦等
化回路に関する。The present invention relates to a recording and reproducing circuit for reproducing data recorded on a disk, and more particularly to a cosine equalization circuit that switches constants of the equalization circuit in response to changes in resolution of data successively output from the disk.
磁気ディスク装置や光デイスク装置等において、ディス
クに記録されたデータを読出し、2値信号に変換する場
合、ヘッドの読出し波形を整形し、2値信号に変換し易
くするため、余弦等化回路が使用されている。When reading data recorded on a disk and converting it into a binary signal in a magnetic disk device, optical disk device, etc., a cosine equalization circuit is used to shape the readout waveform of the head and make it easier to convert it into a binary signal. It is used.
ところで、通常ディスクは円板で構成され、一定速度で
回転するため、円板の外側と内側では分解能が変化し、
内側になるほど悪化する。即ち、外側はビットの記録密
度が低く、内側になるほど記録密度が高くなるため、ピ
ークシフトに差が発生し、波形歪に差が出来るためであ
る。By the way, a disk usually consists of a disk and rotates at a constant speed, so the resolution changes between the outside and inside of the disk.
The further inside it gets, the worse it gets. That is, the recording density of the bits is low on the outside, and the recording density becomes higher on the inside, resulting in a difference in peak shift and a difference in waveform distortion.
従って余弦等化回路により、読出した波形を整形する場
合、分解能に最適な等化状態で対応出来ることが望まし
い。Therefore, when shaping a read waveform using a cosine equalization circuit, it is desirable to be able to deal with it in an equalization state that is optimal for the resolution.
第4図は従来の余弦等化回路の一例を示すブロック図で
ある。FIG. 4 is a block diagram showing an example of a conventional cosine equalization circuit.
ヘッド1がディスクから読出したデータに基づく波形は
、内部インピーダンスZを経てインダクタンスしに送出
され、τ時間遅延して演算増幅器2の十端子に入る。又
抵抗R1とR2とで分圧された前記波形は、定数に=R
z / (R1+R2)により決定される分圧比により
、縮小されて演算増幅器2の一端子に入る。A waveform based on the data read from the disk by the head 1 is sent out to the inductance via the internal impedance Z, and enters the ten terminal of the operational amplifier 2 after being delayed by τ time. Also, the waveform divided by resistors R1 and R2 has a constant =R
It is reduced by the voltage division ratio determined by z/(R1+R2) and enters one terminal of the operational amplifier 2.
+端子にτ時間遅延して入った波形に、定数にで縮小さ
れた元の波形とが、演算増幅器2で合成され波形整形さ
れて、2値信号に変換し易い波形となって送出される。The waveform that enters the + terminal with a delay of τ time and the original waveform reduced to a constant are synthesized and shaped by the operational amplifier 2, and are sent out as a waveform that is easy to convert into a binary signal. .
上記の如く、従来は定数kが一定であるが、ディスク円
板の外側と内側とでは、前記の如く分解能が異なる。即
ち同一定数による波形修正では、常に最適の状態で等化
することが出来ないという問題がある。As mentioned above, the constant k is conventionally constant, but the resolution differs between the outside and inside of the disk as described above. That is, when modifying the waveform using the same constant, there is a problem that equalization cannot always be performed in an optimal state.
本発明はこのような問題点に鑑み、ディスク円板の外側
と内側とでは、分解能の変化に対応するように、定数k
を切替えて、最適の等化状態で対応出来るようにするも
のである。In view of these problems, the present invention provides a constant k between the outside and inside of the disk so as to correspond to the change in resolution.
It is possible to respond with the optimum equalization state by switching the
第1図は本発明の原理ブロック図である。 FIG. 1 is a block diagram of the principle of the present invention.
第1図は第4図に定数切替手段6を追加し、通常余弦等
化回路と同一場所に設置される自動利得増幅器5から、
ヘッドの位置情報を得るようにしたものである。In FIG. 1, a constant switching means 6 is added to FIG.
This is to obtain head position information.
定数切替手段6は端子Aから入る予め定められた比較電
圧と、ヘッドのディスク円板上の位置に対応して変化す
る自動利得増幅器5の制御電圧とを比較し、自動利得増
幅器5の制御電圧からヘッドのディスク円板上の位置を
検出し、ディスク円板の外側と内側とで、定数kを変化
させる構成とする。The constant switching means 6 compares a predetermined comparison voltage input from the terminal A with the control voltage of the automatic gain amplifier 5, which changes depending on the position of the head on the disk disk, and changes the control voltage of the automatic gain amplifier 5. The position of the head on the disk disk is detected from , and the constant k is changed between the outside and inside of the disk disk.
上記構成とすることにより、分解能の変化に対応して、
余弦等化回路の定数を切替え、ディスク円板の外側と内
側とで、夫々定数を変えて波形整形を行うことが出来る
。With the above configuration, in response to changes in resolution,
Waveform shaping can be performed by changing the constants of the cosine equalization circuit and changing the constants for the outside and inside of the disk.
第2図は本発明の一実施例を示す回路のブロック図で、
第3図は第2図の動作を説明する図である。FIG. 2 is a block diagram of a circuit showing an embodiment of the present invention.
FIG. 3 is a diagram illustrating the operation of FIG. 2.
第2図において、複数のヘッドに対して設けられている
自動利得増幅器5の制御電圧が演算増幅器4の十端子に
入る。この制御電圧は、第3図<alに示す如く、例え
ばディスク円板の外側から内側にヘッドが移動するに連
れ、順次高くなる。In FIG. 2, the control voltage of an automatic gain amplifier 5 provided for a plurality of heads is input to the ten terminal of an operational amplifier 4. In FIG. As shown in FIG. 3<al>, this control voltage gradually increases as the head moves from the outside to the inside of the disk, for example.
従ってこの制御電圧に対応して、ヘッドのディスク円板
の位置を示す比較電圧を■に示す如く予め定め、端子A
から演算増幅器4の一端子に供給する。分解能は第3図
(b)に示す如く、ディスク円板の外側から内側にヘッ
ドが移行するに連れ、順次悪化する。Therefore, corresponding to this control voltage, a comparison voltage indicating the position of the disk disk of the head is predetermined as shown in (■), and the terminal A
and supplies it to one terminal of the operational amplifier 4. As shown in FIG. 3(b), the resolution gradually deteriorates as the head moves from the outside to the inside of the disk.
演算増幅器4は比較電圧■より、自動利得増幅器5の制
御電圧が高くなると、スイッチ3を駆動して、例えば接
点を開く。従って抵抗R2に並列に接続されていた抵抗
R3が除去され、第3図(C1に示す如く、定数kがこ
の時点で切替えられる。When the control voltage of the automatic gain amplifier 5 becomes higher than the comparison voltage (2), the operational amplifier 4 drives the switch 3 to open, for example, a contact. Resistor R3, which was connected in parallel with resistor R2, is therefore removed and the constant k is switched at this point, as shown in FIG. 3 (C1).
従って演算増幅器2は予め定められたディスク円板の位
置にヘッドが到達すると、円板の外側と内側とで、異な
る定数により等化を行うことが出来る。Therefore, when the head reaches a predetermined position on the disk, the operational amplifier 2 can perform equalization using different constants on the outside and inside of the disk.
以上説明した如く、本発明は簡易な方法で余弦等化回路
の定数を切替えることが可能となり、分解能の異なるデ
ィスク円板の外側と内側とで定数を切替えて等化するこ
とが出来る。As explained above, the present invention makes it possible to switch the constant of the cosine equalization circuit using a simple method, and it is possible to perform equalization by switching the constant between the outside and inside of a disk having different resolutions.
第1図は本発明の原理ブロック図、
第2図は本発明の一実施例を示す回路のブロック図、
第3図は第2図の動作を説明する図、
第4図は従来の余弦等化回路の一例を示すブロック図で
ある。
図において、
lはヘッド 2.4は演算増幅器、3はスイッチ
、 5は自動利得増幅器、6は定数切替手段である。
オくイε明メツ? flブ0・17図
f7tru
ットイリ11
ν(イIり第2図の勤イF i を四
重5図
第3 圓Fig. 1 is a block diagram of the principle of the present invention, Fig. 2 is a block diagram of a circuit showing an embodiment of the present invention, Fig. 3 is a diagram explaining the operation of Fig. 2, and Fig. 4 is a conventional cosine etc. FIG. 2 is a block diagram showing an example of a conversion circuit. In the figure, l is a head, 2.4 is an operational amplifier, 3 is a switch, 5 is an automatic gain amplifier, and 6 is constant switching means. Is it OK? fl 0.17 figure f7tru tiri 11
ν
Claims (1)
整形する余弦等化回路において、 ディスク上のヘッドの位置に対応して制御電圧を発生す
る自動利得増幅器(5)の制御電圧と予め定めた比較電
圧とを比較して前記定数を切替える手段(6)を設け、 ディスク円板の外側と内側とで余弦等化回路の前記定数
を切替えることを特徴とする余弦等化方式。[Claims] In a cosine equalization circuit that shapes the waveform of data read from a disk in accordance with a constant, an automatic gain amplifier (5) that generates a control voltage in accordance with the position of a head on the disk. Cosine equalization characterized by providing means (6) for switching the constant by comparing the control voltage with a predetermined comparison voltage, and switching the constant of the cosine equalization circuit between the outside and inside of the disc. method.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18124385A JPS6242368A (en) | 1985-08-19 | 1985-08-19 | Cosine equalizing system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18124385A JPS6242368A (en) | 1985-08-19 | 1985-08-19 | Cosine equalizing system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6242368A true JPS6242368A (en) | 1987-02-24 |
Family
ID=16097296
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP18124385A Pending JPS6242368A (en) | 1985-08-19 | 1985-08-19 | Cosine equalizing system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6242368A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5467232A (en) * | 1992-03-24 | 1995-11-14 | Hitachi, Ltd. | Magnetic recording and reproducing method using phase discrimination and apparatus therefor |
-
1985
- 1985-08-19 JP JP18124385A patent/JPS6242368A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5467232A (en) * | 1992-03-24 | 1995-11-14 | Hitachi, Ltd. | Magnetic recording and reproducing method using phase discrimination and apparatus therefor |
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