JPS6234162B2 - - Google Patents
Info
- Publication number
- JPS6234162B2 JPS6234162B2 JP55073993A JP7399380A JPS6234162B2 JP S6234162 B2 JPS6234162 B2 JP S6234162B2 JP 55073993 A JP55073993 A JP 55073993A JP 7399380 A JP7399380 A JP 7399380A JP S6234162 B2 JPS6234162 B2 JP S6234162B2
- Authority
- JP
- Japan
- Prior art keywords
- frequency
- circuit
- resonant
- piezoelectric vibrator
- sub
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000010355 oscillation Effects 0.000 claims description 12
- 238000006243 chemical reaction Methods 0.000 claims description 10
- 238000001514 detection method Methods 0.000 claims 1
- 239000013078 crystal Substances 0.000 description 13
- 239000003990 capacitor Substances 0.000 description 8
- 238000010586 diagram Methods 0.000 description 8
- JRPBQTZRNDNNOP-UHFFFAOYSA-N barium titanate Chemical compound [Ba+2].[Ba+2].[O-][Ti]([O-])([O-])[O-] JRPBQTZRNDNNOP-UHFFFAOYSA-N 0.000 description 1
- 229910002113 barium titanate Inorganic materials 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 238000001228 spectrum Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L1/00—Stabilisation of generator output against variations of physical values, e.g. power supply
- H03L1/02—Stabilisation of generator output against variations of physical values, e.g. power supply against variations of temperature only
- H03L1/022—Stabilisation of generator output against variations of physical values, e.g. power supply against variations of temperature only by indirect stabilisation, i.e. by generating an electrical correction signal which is a function of the temperature
- H03L1/027—Stabilisation of generator output against variations of physical values, e.g. power supply against variations of temperature only by indirect stabilisation, i.e. by generating an electrical correction signal which is a function of the temperature by using frequency conversion means which is variable with temperature, e.g. mixer, frequency divider, pulse add/substract logic circuit
Landscapes
- Oscillators With Electromechanical Resonators (AREA)
Description
【発明の詳細な説明】
本発明は圧電振動子を用いた発振回路に関する
ものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an oscillation circuit using a piezoelectric vibrator.
従来、例えば水晶発振回路の発振周波数を温度
補償するものが種々考えられており、その一つと
してサーミスタ等の感温素子を用いたものがある
が、これによると水晶振動子と感温素子とが分離
しているため補償効果に遅れが生じ、特に温度変
化が急激な場合にはこれに追随できないことがあ
つた。 Conventionally, various methods have been considered for temperature-compensating the oscillation frequency of a crystal oscillator circuit, one of which uses a temperature-sensitive element such as a thermistor. Because of the separation, there was a delay in the compensation effect, and it was sometimes impossible to follow this, especially when the temperature change was rapid.
そこで本発明は、厚みすべり水晶振動子を主共
振モードおよび副共振モードで同時に発振させ、
各発振周波数の温度特性を利用して温度補償を行
なうようにした水晶発振回路を提供するものであ
る。 Therefore, the present invention causes a thickness-shear crystal resonator to oscillate simultaneously in the main resonance mode and the sub-resonance mode,
The present invention provides a crystal oscillation circuit that performs temperature compensation using the temperature characteristics of each oscillation frequency.
以下本発明の一実施例を図面に基づいて説明す
る。 An embodiment of the present invention will be described below based on the drawings.
第１図において、Ｑは厚みすべり水晶振動子で
その両面には第２図のごとく電極E1〜E3を形成
してある。この水晶振動子Ｑの共振特性を示した
のが第３図で、主共振周波数１に対してそれよ
り数％程度高い副共振周波数２が存在する。水
晶振動子Ｑを主共振周波数１で発振させるため
の第１の共振回路が、インバータV1、抵抗R1お
よびコンデンサC1，C4，C5で、副共振周波数
２で発振させるための第２の共振回路が、インバ
ータV2、抵抗R2、コイルＬおよびコンデンサC2
……C5である。 In FIG. 1, Q is a thickness-shear crystal resonator, and electrodes E 1 to E 3 are formed on both sides of the crystal resonator as shown in FIG. FIG. 3 shows the resonance characteristics of this crystal resonator Q, in which there is a sub-resonant frequency 2 that is several percent higher than the main resonant frequency 1 . The first resonant circuit for causing the crystal resonator Q to oscillate at the main resonant frequency 1 is composed of an inverter V 1 , a resistor R 1 and capacitors C 1 , C 4 , C 5 and has a sub resonant frequency
The second resonant circuit for oscillating at 2 is composed of an inverter V 2 , a resistor R 2 , a coil L and a capacitor C 2
...It is C5 .
なお、副共振レベルは主共振レベルより低いた
め、第２の共振回路が主共振周波数１に引き込
まれないように、コイルＬおよびコンデンサC3
を挿入して副共振周波数２に同調させてある。 Note that since the sub-resonance level is lower than the main resonance level, the coil L and capacitor C 3
is inserted and tuned to sub-resonant frequency 2 .
この構成によつて、水晶振動子Ｑを同時に主共
振および副共振させることができ、端子P1から主
共振周波数１が得られ、端子P2からは副共振周
波数２が得られる。両周波数の温度特性につい
てみると、主共振周波数１の温度特性は第４図
の曲線l1で表され、副共振周波数２の温度特性
は曲線l2のごとく曲線l1より急峻なものとなる。 With this configuration, the crystal resonator Q can be caused to have main resonance and sub-resonance at the same time, and main resonance frequency 1 can be obtained from terminal P 1 and sub-resonance frequency 2 can be obtained from terminal P 2 . Looking at the temperature characteristics of both frequencies, the temperature characteristics of main resonant frequency 1 are represented by curve l 1 in Figure 4, and the temperature characteristics of sub-resonant frequency 2 are steeper than curve l 1 , as shown by curve l 2 . .
そこでまず、副共振周波数２の温度特性によ
つて温度を検知し、これに基づいて主共振周波数
１の温度補償を行なう例について説明する。 Therefore, first, the temperature is detected based on the temperature characteristics of sub-resonant frequency 2 , and based on this, the main resonant frequency is
An example of performing temperature compensation in step 1 will be explained.
本例では第５図のように、コンデンサC1にス
イツチング回路Ｓを介してコンデンサC6を並列
接続し、端子ａにパルスＰを供給してスイツチン
グ回路Ｓをオンオフさせるもので、パルスＰのデ
ユーテイId／Ip（Id：パルス輻、Ip：パルスの周
期）を幅共振周波数２の温度特性に応じて調整
することによつて、第１の共振回路の端子ｂから
みた実効的な負荷容量を変化させ、主共振周波数
を調整するものである。 In this example, as shown in Fig. 5, a capacitor C6 is connected in parallel to a capacitor C1 via a switching circuit S, and a pulse P is supplied to terminal a to turn on and off the switching circuit S. By adjusting Id/Ip (Id: pulse intensity, Ip: pulse period) according to the temperature characteristics of width resonance frequency 2 , the effective load capacity seen from terminal b of the first resonant circuit is changed. This is to adjust the main resonant frequency.
そこでパルスｐのデユーテイによつて、端子ｂ
からみた容量ｃ（ｔ）がいかに変化するかをみて
みる。 Therefore, depending on the duty of pulse p, terminal b
Let's take a look at how the capacitance c(t) changes when viewed from.
まず、端子ｂからみた容量ｃ（ｔ）をフーリエ
級数に展開すると、
ｃ（ｔ）＝a0＋a1cosωpt＋a2cosωpt＋…
＋b1sinωpt＋b2sinωpt…
となる。 First, when the capacitance c(t) seen from terminal b is expanded into a Fourier series, c(t)=a 0 +a 1 cosωpt+a 2 cosωpt+... +b 1 sinωpt+b 2 sinωpt...
ただし、 ωｐ＝２πｐ，ｐ＝１／τｐ a0＝１／τｐ∫〓ｐ ０ｃ（ｔ）dt an＝２／τｐ∫〓ｐ ０ｃ（ｔ）cosnωpt dt bn＝２／τｐ∫〓ｐ ０ｃ（ｔ）sinnωpt dt とする。 However, ωp=2πp, p=1/τp a 0 =1/τp∫〓 p 0 c(t) dt an=2/τp∫〓 p 0 c(t) cosnωpt dt bn=2/τp∫〓 p 0 Let c(t) sinnωpt dt.
故に、
で表わされる。この式内には、スイツチング周波
数ｎ・ｐ（ｎ＝１，２，３……）成分が含まれ
ており、これに対する水晶振動子Ｑの応答性につ
いてみる。 Therefore, It is expressed as This equation includes a switching frequency n·p (n=1, 2, 3...) component, and the response of the crystal resonator Q to this component will be examined.
第１の共振回路の受動部の時定数τｃは、
τｃ≒2Q／ω０（Ｑ：水晶振動子のＱ値、ω０
＝２π０、０：発振周波数）で表わされる。
したがつて、パルスｐの周波数ｐをｐ≫１／
τｃとなるように設定しておくことにより、周波
数ｐのスイツチングを与えても水晶発振周波数
スペクトルのｐ成分はほとんど無視できる。そ
のため、上記(1)のｎ・ｐ（ｐ＝１／τｐ）成
分を含む項は無視でき、負荷容量は等価的にｃ
（ｔ）＝c1＋c6・τｄ／τｐで表わされ、実効的な
負荷容量がパルスｐのデユーテイによつて決まる
ことがわかる。したがつて、パルスｐのデユーテ
イによつて発振周波数が調整されるものである。
しかもコンデンサc6を接続したときおよび遮断し
たときの周波数が同じであり、常に一定の周波数
が得られる。因みに、水晶振動子Ｑとして、発振
周波数が約4.2MHzでＱ値が３×105〜５×105程度
のものを用いた場合に、Ｑ値が高いため、パルス
ｐの周波数ｐを10KHz程度に設定しておくこと
により、この周波数ｐによつて第１の共振回路
の発振周波数が影響を受けることはほとんどな
い。 The time constant τc of the passive part of the first resonant circuit is τc≒2Q/ω 0 (Q: Q value of the crystal resonator, ω 0
=2π 0 , 0 : oscillation frequency).
Therefore, the frequency p of the pulse p is p≫1/
By setting τc, even if switching of frequency p is applied, the p component of the crystal oscillation frequency spectrum can be almost ignored. Therefore, the term including the n・p (p=1/τp) component in (1) above can be ignored, and the load capacity is equivalently c
(t)=c 1 +c 6 ·τd/τp, and it can be seen that the effective load capacity is determined by the duty of pulse p. Therefore, the oscillation frequency is adjusted by the duty of the pulse p.
Moreover, the frequency is the same when the capacitor c6 is connected and when it is cut off, so a constant frequency is always obtained. Incidentally, when using a crystal resonator Q with an oscillation frequency of approximately 4.2 MHz and a Q value of approximately 3 × 10 5 to 5 × 10 5 , the frequency p of the pulse p is set to approximately 10 KHz because the Q value is high. By setting this frequency p, the oscillation frequency of the first resonant circuit is hardly affected by this frequency p.
したがつて、第１の共振回路の発振周波数は安
定性を損なわれることなく、パルスｐのデユーテ
イによつて調整される。 Therefore, the oscillation frequency of the first resonant circuit can be adjusted by the duty of the pulse p without sacrificing stability.
副共振周波数２をパルスｐに変換して温度補
償を行なう構成を示したのが第６図である。同図
において、Ｍはミキサで、副共振周波数２と温
度補償後の主共振周波数１との差の周波数出力
を生じるものである。D1は分周回路、Ｔはタイ
ミングパルス発生回路、CTはミキサＭからの差
の周波数をカウントするためのカウンタ、LAは
ラツチ回路である。DTはデータ変換回路で、差
の周波数をデユーテイ指定用のデジタルデータに
変換するものである。PCはプリセツタブルダウ
ンカウンタ、G1，G2はゲート回路である。 FIG. 6 shows a configuration in which temperature compensation is performed by converting the sub-resonant frequency 2 into a pulse p. In the figure, M is a mixer that generates a frequency output of the difference between the sub-resonant frequency 2 and the main resonant frequency 1 after temperature compensation. D1 is a frequency dividing circuit, T is a timing pulse generating circuit, CT is a counter for counting the frequency difference from mixer M, and LA is a latch circuit. DT is a data conversion circuit that converts the difference frequency into digital data for duty specification. PC is a presettable down counter, and G 1 and G 2 are gate circuits.
動作について説明すると、タイミングパルス発
生回路Ｔは分周回路D1からのパルスを受けて、
周期的に以下のようなパルスを発生する。 To explain the operation, the timing pulse generating circuit T receives a pulse from the frequency dividing circuit D1 , and
It periodically generates the following pulses.
まず端子t1から第８図t1の１パルスを発生して
カウンタCTをクリアする。つぎに端子t2から第
８図t2のように所定幅のパルスを発生してゲート
回路G1を開き、差の周波数をカウンタCTに供給
してこれをカウントさせる。そして端子t3から第
８図t3のパルスが発生してカウンタCTの内容
（差の周波数）がラツチ回路LAにラツチされ、そ
の出力がデータ変換回路DTに供給される。デー
タ変換回路DTには、予め以下のようなデータが
プログラムしてある。端子P1から生じる主共振周
波数１は以下の動作によつて目標周波数０近
傍に温度補償されるものであるため、ミキサＭか
ら生じる差の周波数△は幅共振周波数２と目
標周波数０との差の周波数（２―０）とな
り、これは第４図の曲線l2とほぼ同じ温度特性を
呈することになる。つまり差の周波数△＝（
２―０）は曲線l2に沿つて、温度の上昇に伴つ
て増大するものである。 First, one pulse t1 in FIG. 8 is generated from the terminal t1 to clear the counter CT. Next, a pulse of a predetermined width is generated from the terminal t2 as shown in FIG. 8 t2 to open the gate circuit G1 , and the difference frequency is supplied to the counter CT to be counted. Then, the pulse t3 in FIG. 8 is generated from the terminal t3 , the contents of the counter CT (difference frequency) are latched in the latch circuit LA, and its output is supplied to the data conversion circuit DT. The data conversion circuit DT is preprogrammed with the following data. Since the main resonance frequency 1 generated from the terminal P 1 is temperature compensated to near the target frequency 0 by the following operation, the difference frequency △ generated from the mixer M is the difference between the width resonance frequency 2 and the target frequency 0 . The frequency is ( 2-0 ), which exhibits almost the same temperature characteristics as the curve l2 in FIG. In other words, the difference frequency △=(
2-0 ) increases along the curve l2 as the temperature rises.
そこで、例えば主共振周波数１を温度TLか
らTMの範囲内において目標周波数０±1PPM
内に補償する場合には、第７図のように、曲線l1
で示した補償前の主共振周波数１が上記補償幅
2PPMずつずれる温度T11，T13，……，T21，T22
……を予め計測しておく。なお、第７図の縦軸に
おける△Ｆは、補償前の主共振周波数１と目標
周波数０との差の周波数である。 Therefore, for example, if the main resonance frequency 1 is within the range of temperature TL to TM, the target frequency is 0 ±1PPM.
In the case of compensating within 1, the curve l 1
The main resonant frequency 1 before compensation shown in is the above compensation width
Temperatures deviated by 2PPM T 11 , T 13 , ..., T 21 , T 22
Measure ... in advance. Note that ΔF on the vertical axis in FIG. 7 is the frequency difference between the main resonance frequency 1 before compensation and the target frequency 0 .
そして、上記で計測した各温度における副共振
周波数２を計測し、これと目標周波数０との
差の周波数（２―０）を算出する。データ変
換回路DT内には上記各温度における差の周波数
（２―０）に対応したデータをプログラムし
ておき、このうちから上記でラツチ回路LAにラ
ツチされた差の周波数（２―０）に対応した
データが選択され、ダウンカウンタPCに供給さ
れるものである。このデータは、タイミングパル
ス発生回路Ｔの端子t4からの第８図t4のパルスに
よつてダウンカウンタPCにプリセツトされる。
このプリセツトによつて、ダウンカウンタPCの
出力は“１”になり、ゲート回路G2が開いて分
周回路D1からのパルスがダウンカウンタPCに供
給される。そしてダウンカウンタPCが上記デー
タによつて設定された値を計数すると、その出力
が“０”に反転する。 Then, the sub-resonant frequency 2 at each temperature measured above is measured, and the difference frequency ( 2-0 ) between this and the target frequency 0 is calculated. The data conversion circuit DT is programmed with data corresponding to the frequency difference ( 2 - 0 ) at each temperature, and from this data the frequency ( 2 - 0 ) of the difference latched in the latch circuit LA above is programmed. The corresponding data is selected and supplied to the down counter PC. This data is preset in the down counter PC by the pulse t4 in FIG. 8 from the terminal t4 of the timing pulse generating circuit T.
Due to this preset, the output of the down counter PC becomes "1", the gate circuit G2 is opened, and the pulse from the frequency dividing circuit D1 is supplied to the down counter PC. When the down counter PC counts the value set by the above data, its output is inverted to "0".
したがつて、タイミングパルス発生回路Ｔの端
子t1〜t4からのパルスによる上記動作が繰り返さ
れることによつて、ダウンカウンタPCの出力か
らは、第８図t5のように端子t4からのパルスと同
一周期でかつデータ変換回路DTからのデータに
応じたパルス幅のパルスが生じる。すなわち、デ
ータ変換回路DTからのデータに対応したデユー
テイのパルスが生じ、スイツチング回路Ｓが開閉
される。これによつて、端子P1からりの主共振周
波数１が第７図の波線l3で示すごとく、目標周
波数０±1PPM内に温度補償され、これが本発
振回路の出力周波数として用いられるものであ
る。 Therefore, by repeating the above operation using the pulses from the terminals t1 to t4 of the timing pulse generation circuit T, the output of the down counter PC is output from the terminal t4 as shown in FIG. 8, t5 . A pulse is generated that has the same period as the pulse and has a pulse width that corresponds to the data from the data conversion circuit DT. That is, a duty pulse corresponding to the data from the data conversion circuit DT is generated, and the switching circuit S is opened and closed. As a result, the main resonant frequency 1 from the terminal P1 is temperature-compensated to within the target frequency 0 ±1PPM, as shown by the broken line l3 in Figure 7, and this is used as the output frequency of the oscillator circuit. be.
因みに、実験によると、室温で主共振周波数
１が約4194MHzで副共振周波数２が4356MHzの
ものを用いて、−30℃から70℃まで±1PPM内に
抑え込むことができた。 Incidentally, according to experiments, the main resonant frequency at room temperature
Using a device with 1 of about 4194 MHz and sub-resonant frequency 2 of 4356 MHz, we were able to suppress temperatures from -30°C to 70°C within ±1 PPM.
なお水晶振動子に代えてチタン酸バリウム等の
圧電振動子を用いてもよい。 Note that a piezoelectric vibrator made of barium titanate or the like may be used instead of the crystal vibrator.
以上のように本発明によれば、厚みすべり圧電
振動子をその主共振周波数および副共振周波数で
同時に発振させ両周波数の差の周波数に対応した
デユーテイで周波数がω０／2Qより高いパルス
によつてスイツチング回路をスイツチングして負
荷容量に並列に容量素子を接続および遮断するよ
うにしたので、極めて広い温度範囲内で温度補償
が行え、しかも容量素子を接続したときおよび遮
断したときの周波数を同じにでき、周波数標準と
して用いる上で特に大きな効果を発揮する。 As described above, according to the present invention, the thickness-shear piezoelectric vibrator is simultaneously oscillated at its main resonant frequency and sub-resonant frequency, and a pulse having a frequency higher than ω 0 /2Q is generated with a duty corresponding to the difference between the two frequencies. By switching the switching circuit to connect and disconnect the capacitive element in parallel with the load capacitance, temperature compensation can be performed within an extremely wide temperature range, and the frequency is the same when the capacitive element is connected and disconnected. It is particularly effective when used as a frequency standard.
第１図は主および副共振周波数を得るための構
成の一例を示した電気回路図、第２図は第１図で
用いた圧電振動子の正面および背面図、第３図は
圧電振動子の共振特性を示した特性図、第４図は
圧電振動子の温度特性を示した特性図、第５図は
主共振周波数の補正を行なうための構成の一例を
示した電気回路図、第６図は本発明の一実施例を
示した電気回路図、第７図は温度補償前および補
償後の主共振周波数の温度特性を示した特性図、
第８図は動作説明のためのタイムチヤート、第９
図は主および副共振周波数の差の周波数の温度特
性を示した特性図である。
Ｑ……厚みすべり圧電振動子、V1，V2……イ
ンバータ、R1，R2……抵抗、C1〜C5……コンデ
ンサ、Ｌ……コイル、Ｓ……スイツチング回路、
C6……コンデンサ、Ｍ……ミキサ、D1……分周
回路、Ｔ……タイミングパルス発生回路、CT…
…カウンタ、LA……ラツチ回路、DT……データ
変換回路、PC……プリセツタブルダウンカウン
タ、G1，G2……ゲート回路。
Figure 1 is an electric circuit diagram showing an example of the configuration for obtaining the main and sub-resonant frequencies, Figure 2 is a front and rear view of the piezoelectric vibrator used in Figure 1, and Figure 3 is a diagram of the piezoelectric vibrator used in Figure 1. Figure 4 is a characteristic diagram showing the resonance characteristics. Figure 4 is a characteristic diagram showing the temperature characteristics of the piezoelectric vibrator. Figure 5 is an electric circuit diagram showing an example of a configuration for correcting the main resonance frequency. Figure 6. is an electric circuit diagram showing an embodiment of the present invention, FIG. 7 is a characteristic diagram showing the temperature characteristics of the main resonant frequency before and after temperature compensation,
Figure 8 is a time chart for explaining the operation, Figure 9
The figure is a characteristic diagram showing the frequency temperature characteristic of the difference between the main and sub-resonant frequencies. Q...Thickness-slip piezoelectric vibrator, V1 , V2 ...Inverter, R1 , R2 ...Resistor, C1 to C5 ...Capacitor, L...Coil, S...Switching circuit,
C 6 ... Capacitor, M ... Mixer, D 1 ... Frequency divider circuit, T ... Timing pulse generation circuit, CT ...
...Counter, LA...Latch circuit, DT...Data conversion circuit, PC...Presettable down counter, G1 , G2 ...Gate circuit.
Claims (1)
発振させる第１の共振回路と、上記厚みすべり圧
電振動子をその副共振周波数で発振させる第２の
共振回路と、上記厚みすべり圧電振動子の主共振
周波数と副共振周波数との差の周波数を検出する
検出回路と、上記厚みすべり圧電振動子の負荷容
量に並列に容量素子を接続および遮断するスイツ
チング回路と、上記検出回路からの差の周波数を
カウントするカウンタと、このカウンタの内容を
ラツチするラツチ回路と、このラツチ回路の出力
によつて上記差の周波数に応じたデユーテイ指定
用のデータを生じるデータ変換回路と、このデー
タ変換回路からのデータをプリセツトされ一定周
期のクロツクパルスをカウントするダウンカウン
タと、周期が2Q／ω０（Ｑ；圧電振動子のＱ
値、ω０＝２π０、０；発振周波数）より短
いタイミングパルスを発生して上記カウンタ，上
記ラツチ回路，上記データ変換回路および上記ダ
ウンカウンタの動作を制御し上記ダウンカウンタ
から周期が2Q／ω０以下でデユーテイが上記差
の周波数に対応したパルスを発生せしめるタイミ
ングパルス発生回路とからなり、上記ダウンカウ
ンタの出力によつて上記スイツチング回路を開閉
することを特徴とする圧電振動子を用いた発振回
路。1 a first resonant circuit that causes the thickness-shear piezoelectric vibrator to oscillate at its main resonant frequency; a second resonant circuit that causes the thickness-shear piezoelectric vibrator to oscillate at its sub-resonant frequency; A detection circuit that detects the frequency difference between the resonant frequency and the sub-resonance frequency, a switching circuit that connects and disconnects a capacitive element in parallel to the load capacitance of the thickness-shear piezoelectric vibrator, and a switching circuit that detects the frequency difference between the resonant frequency and the sub-resonance frequency. A counter that counts, a latch circuit that latches the contents of this counter, a data conversion circuit that uses the output of this latch circuit to generate data for specifying a duty according to the above-mentioned difference frequency, and data from this data conversion circuit. A down counter that counts clock pulses with a preset period and a period of 2Q/ω 0 (Q; Q of the piezoelectric vibrator)
ω 0 =2π 0 , 0 ; oscillation frequency) to control the operations of the counter, the latch circuit, the data conversion circuit, and the down counter, so that the cycle is 2Q/ω from the down counter. oscillation using a piezoelectric vibrator, comprising a timing pulse generation circuit that generates a pulse whose duty corresponds to the frequency of said difference when the duty is 0 or less, and said switching circuit is opened and closed by the output of said down counter. circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7399380A JPS56169909A (en) | 1980-06-02 | 1980-06-02 | Oscillating circuit using piezoelectric oscillator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7399380A JPS56169909A (en) | 1980-06-02 | 1980-06-02 | Oscillating circuit using piezoelectric oscillator |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS56169909A JPS56169909A (en) | 1981-12-26 |
| JPS6234162B2 true JPS6234162B2 (en) | 1987-07-24 |
Family
ID=13534146
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7399380A Granted JPS56169909A (en) | 1980-06-02 | 1980-06-02 | Oscillating circuit using piezoelectric oscillator |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS56169909A (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02174407A (en) * | 1988-12-27 | 1990-07-05 | Nippon Dempa Kogyo Co Ltd | Temperature compensated frequency crystal oscillator |
| WO1997026504A1 (en) * | 1996-01-17 | 1997-07-24 | Patent-Treuhand-Gesellschaft für elektrische Glühlampen mbH | Circuit arrangement for the metrological determination of diameters of metal bodies |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5080869A (en) * | 1973-11-15 | 1975-07-01 | ||
| JPS5084274A (en) * | 1973-11-26 | 1975-07-08 | ||
| JPS53145675A (en) * | 1977-05-25 | 1978-12-19 | Seiko Epson Corp | Temperature compensating electronic watch |
| JPS54158839A (en) * | 1978-06-06 | 1979-12-15 | Citizen Watch Co Ltd | Temperature compensating device of oscillator |
-
1980
- 1980-06-02 JP JP7399380A patent/JPS56169909A/en active Granted
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5080869A (en) * | 1973-11-15 | 1975-07-01 | ||
| JPS5084274A (en) * | 1973-11-26 | 1975-07-08 | ||
| JPS53145675A (en) * | 1977-05-25 | 1978-12-19 | Seiko Epson Corp | Temperature compensating electronic watch |
| JPS54158839A (en) * | 1978-06-06 | 1979-12-15 | Citizen Watch Co Ltd | Temperature compensating device of oscillator |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS56169909A (en) | 1981-12-26 |
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