JPS6229741B2 - - Google Patents

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Publication number
JPS6229741B2
JPS6229741B2 JP53126781A JP12678178A JPS6229741B2 JP S6229741 B2 JPS6229741 B2 JP S6229741B2 JP 53126781 A JP53126781 A JP 53126781A JP 12678178 A JP12678178 A JP 12678178A JP S6229741 B2 JPS6229741 B2 JP S6229741B2
Authority
JP
Japan
Prior art keywords
tact
gate
block
plate thickness
plate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP53126781A
Other languages
Japanese (ja)
Other versions
JPS5554435A (en
Inventor
Katsuyuki Nishifuji
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
JFE Engineering Corp
Original Assignee
Nippon Kokan Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Kokan Ltd filed Critical Nippon Kokan Ltd
Priority to JP12678178A priority Critical patent/JPS5554435A/en
Publication of JPS5554435A publication Critical patent/JPS5554435A/en
Publication of JPS6229741B2 publication Critical patent/JPS6229741B2/ja
Granted legal-status Critical Current

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  • Investigating Or Analyzing Materials By The Use Of Ultrasonic Waves (AREA)

Description

【発明の詳細な説明】 この発明は板材の超音波探傷に際し、その超音
波探傷装置の欠陥検出ゲートの設定を自動的に行
う方法に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for automatically setting a defect detection gate of an ultrasonic flaw detection apparatus during ultrasonic flaw detection of a plate material.

板材の自動超音波探傷は、第1図に示すよう
に、板材1の幅方向に多数の探触子2を配設し、
板材1を移送しながらすだれ状に探傷する全面探
傷方式が採用されている。この場合、探傷方法と
して様々なものがあるが、分割型探触子によるパ
ルス反射法を例にとれば、第2図に示すように、
送信用振動子3と受信用振動子4とを接触媒質5
を介して、被検板材1に当て、パルス状の送信波
(T)を該被検板材1に発射して探傷が行われ
る。この時、送信波(T)は、その一部が接触媒
質5及び板材1表面に反射して、夫々クサビエコ
ー(K)及びエコー(S)となる。また板材1内の欠
陥6及び板材1の底面で反射したものは、夫々欠
陥エコー(F)及び底面エコー(B)となる。第3図はこ
れらの各エコーを示すもので、欠陥エコー(F)を検
出するために欠陥ゲート(FGL)を設定し、こ
の時間内にあるレベル以上の信号が受信されれ
ば、これを欠陥と看做して記録するようにしてい
る。
Automatic ultrasonic flaw detection of plate materials involves arranging a large number of probes 2 in the width direction of the plate material 1, as shown in Fig. 1.
A full-surface flaw detection method is adopted in which flaws are detected in a blind pattern while the plate material 1 is being transported. In this case, there are various flaw detection methods, but if we take the pulse reflection method using a split probe as an example, as shown in Figure 2,
The transmitting transducer 3 and the receiving transducer 4 are connected to a couplant 5.
Flaw detection is performed by applying a pulsed transmission wave (T) to the plate material 1 to be inspected through the probe. At this time, a portion of the transmitted wave (T) is reflected by the couplant material 5 and the surface of the plate material 1, resulting in a wedge echo (K) and an echo (S), respectively. Further, the defect 6 in the plate 1 and the reflection from the bottom of the plate 1 become a defect echo (F) and a bottom echo (B), respectively. Figure 3 shows each of these echoes. A defect gate (FGL) is set to detect a defect echo (F), and if a signal of a certain level or higher is received within this time, it is considered a defect. I take this into consideration and record it.

この欠陥ゲート(FGL)は、被検板材1の板
厚に相当するものであるが、その起点は、被検板
材1と探触子2との相対運動により生じる接触媒
質5の厚み変動に応じて補正される。これと同様
に、被検板材1間に、又同一被検板材1内の幅方
方向及び長さ方向に板厚の変動があり、この板厚
変動による欠陥ゲート(FGL)の終点補正を行
う必要がある。
This defect gate (FGL) corresponds to the thickness of the plate material 1 to be inspected, and its starting point corresponds to the thickness variation of the couplant 5 caused by the relative movement between the plate material 1 to be inspected and the probe 2. will be corrected. Similarly, there are variations in plate thickness between the test plates 1 and in the width direction and length direction within the same test plate 1, and the defect gate (FGL) end point correction is performed due to this plate thickness variation. There is a need.

何故ならば、終点補正を行わずにこれを固定す
ると、板厚が薄くなつた場合、底面エコー(B)がゲ
ート内に入り欠陥と見誤られ、いわゆる擬似欠陥
の発生を起こし、また板厚が厚くなつた場合に、
厚くなつた部分に欠陥があつたとしても、これは
検出されず未探傷域が生じるからである。
This is because if this is fixed without end point correction, when the plate thickness becomes thinner, the bottom echo (B) will enter the gate and be mistaken for a defect, causing so-called pseudo-defects. When the thickness becomes thicker,
This is because even if there is a defect in the thickened part, it will not be detected and an undetected area will be created.

この板厚の変動には、前述のよに連続的に超音
波探傷装置に搬入される被検板材1間の板厚変化
及び同一板内での幅方向又は長手方向の板厚変化
によるものがあるが、この発明は各板間の板厚変
化及び同一板内での幅方向及び長さ方向変化に対
応して、擬似欠陥の発生及び未探傷域の発生を極
力避けて、欠陥ゲートの設定を行おうとするもの
である。
As mentioned above, this variation in plate thickness is caused by changes in plate thickness between the test plates 1 that are continuously carried into the ultrasonic flaw detection device, and changes in plate thickness in the width direction or longitudinal direction within the same plate. However, this invention sets defect gates in response to changes in thickness between each board and changes in width and length within the same board, avoiding the occurrence of false defects and undetected areas as much as possible. This is what we are trying to do.

従来、このような欠陥ゲートの設定方法として
は次のような方法が用いられていた。即ち、まず
呼称板厚(TNOM)でゲートの初期設定を行
い、探触子の被検材接板後の実厚測定により、該
欠陥ゲートの終点補正を、各探触子あるい各チヤ
ンネル毎に行う方法である。この場合、呼称板厚
によるゲートの設定には第4図に示すように圧延
公差を考えて、呼称板厚(TNOM)−板厚許容下
限公差(δ)の値が用いられる。また多数の探触
子を板幅方向に配置するいわゆる多チヤンネル配
置で、これらをいくつかのブロツクに分割する場
合には、ゲートの初期設定は同様に呼称板厚に基
づいて行うが、その終点補正は、接板後に測定し
た実厚をブロツク単位に平均し、この平均値を用
いて行う。
Conventionally, the following method has been used to set such defective gates. That is, first, the gate is initialized using the nominal plate thickness (TNOM), and the end point correction of the defective gate is performed for each probe or each channel by measuring the actual thickness after the probe comes into contact with the test material. This is the method to do it. In this case, to set the gate based on the nominal plate thickness, the value of nominal plate thickness (TNOM) - lower limit tolerance of plate thickness (δ) is used, taking into account the rolling tolerance as shown in FIG. In addition, in a so-called multi-channel arrangement in which a large number of probes are arranged in the width direction of the plate, when dividing these into several blocks, the initial setting of the gate is similarly done based on the nominal plate thickness, but the end point Correction is performed by averaging the actual thicknesses measured after the plates are brought into contact for each block, and using this average value.

上記従来の方法の問題点は、探触子の被検材へ
の接板後の実厚測定において、その接板点にたま
たま欠陥が有つた場合、第5図に示すように、欠
陥距離が実測板厚と看做され、誤つたゲート終点
設定が行われ、その結果として未探傷域(X)が
発生して欠陥が検出されないことである。特に探
傷開始点は板材のトツプ又はボトム部であり、こ
れらの部分は欠陥発生頻度が高く、これらの問題
が生じることが多い。
The problem with the above conventional method is that when measuring the actual thickness after the probe contacts the test material, if there happens to be a defect at the contact point, the defect distance will increase as shown in Figure 5. The problem is that the gate end point is incorrectly set because the actually measured plate thickness is assumed, and as a result, an undetected area (X) occurs and no defects are detected. In particular, the starting point for flaw detection is the top or bottom of the plate, and these areas are where defects occur frequently and these problems often occur.

この発明は、この従来方法による問題点を解決
すべく創案されたものであつて、計算機を用いて
計測された実測板厚と呼称板厚又はその前の実測
板厚とを比較し、その差が一定値(例えば板厚許
容下限公差)以内であるか否かを判断し、一定値
以内であれば計測された実測板厚に基づいてゲー
ト設定を行い、一定値を外れる場合には、該計測
した実測板厚を無視して現状を維持するか、又は
他の合理的な基準によりゲート設定を行うことに
より、擬似欠陥の発生を防止すると共に、従来避
け難かつた未探傷域の発生をも防止しようとする
ものである。
This invention was devised to solve the problems with the conventional method, and it compares the actual plate thickness measured using a computer with the nominal plate thickness or the previously measured plate thickness, and then calculates the difference between is within a certain value (for example, plate thickness allowable lower limit tolerance), and if it is within a certain value, the gate is set based on the measured plate thickness, and if it is outside the certain value, By ignoring the measured plate thickness and maintaining the current state, or by setting gates based on other rational standards, it is possible to prevent the occurrence of false defects and to avoid the occurrence of undetected areas, which was difficult to avoid in the past. It also seeks to prevent this.

以下図面り基づいてこの発明の一実施例を説明
する。第6図及び第7図は、被検板材1の幅方向
に8個の探触子2が配列され、各探触子毎に板状
1を幅方向〜までの8ブロツクに区分し、各
探触子毎に初期ゲートの設定を行う場合を示すも
のである。
An embodiment of the present invention will be described below with reference to the drawings. 6 and 7, eight probes 2 are arranged in the width direction of the plate material 1 to be inspected, and each probe divides the plate 1 into eight blocks in the width direction. This shows a case where an initial gate is set for each probe.

まず、計算機に呼称板厚(TNOM)を記憶
(τ=TNOM)し、一定値(δ)を設定する。こ
の実施例の場合、この一定値(δ)は板厚許容下
限公差としている。次いで、各探触子2を接板
し、ブロツクの実測板厚(TACT1)を測定す
る。D=|TACT1−τ|の演算を行いDδで
あれば、ブロツクにおけるチヤンネルのゲート
(FGL1)を実測板厚(TACT1)にて行う。D>δ
であれば、この実測板厚(TACT1)を無視し、そ
の前のブロツクにおける実測板厚(TACTo-1
又はTNOM−δの値でゲート(FGL1)を設定す
る。ブロツクの場合、その前のブロツクはない
ので、TNOM−δの値によりゲート設定を行う
ことにする。次いでτをアツプデートし、τ=
TACT1とし、次のブロツクに移り同様な動作
をブロツクまで繰返し、各ブロツクにおける初
期ゲート設定を終了する。
First, store the nominal plate thickness (TNOM) in the computer (τ=TNOM) and set a constant value (δ). In the case of this embodiment, this constant value (δ) is set as the allowable lower limit tolerance for plate thickness. Next, each probe 2 is brought into contact with the plate, and the actual plate thickness (TACT 1 ) of the block is measured. Calculate D=|TACT 1 −τ|, and if Dδ, the channel gate (FGL 1 ) in the block is performed using the measured plate thickness (TACT 1 ). D>δ
If so, ignore this actual thickness (TACT 1 ) and calculate the actual thickness (TACT o-1 ) in the previous block.
Alternatively, set the gate (FGL 1 ) with the value of TNOM-δ. In the case of a block, since there is no previous block, the gate is set based on the value of TNOM-δ. Then update τ and get τ=
Set TACT to 1 , move on to the next block, repeat the same operation up to the block, and complete the initial gate setting for each block.

第6図に示すものの場合、ブロツク及びに
欠陥6があるので、夫々その前のブロツクの実測
板厚(TACT2)によりゲート設定が行われてい
る。第7−A図に示すものは、当初のブロツク
,に欠陥があり、この場合のゲート設定は
夫々TNOM−δの値で行われている。
In the case shown in FIG. 6, since there is a defect 6 in each block, gate setting is performed based on the actual thickness (TACT 2 ) of the previous block. In the case shown in FIG. 7-A, there is a defect in the initial block, and the gate settings in this case are performed using the value of TNOM-δ.

このような当初のブロツク図に欠陥がある場合
を想定して、上記シークエンス(SEQ)を2回
繰返せば、欠陥発生の確率から考えて、より未探
傷域の少ないゲート設定を実現できる。第7−B
図は、このシークエンス(SEQ)を2回繰返し
た場合を示すもので、2サイクル目ではブロツク
,は夫々ブロツクでの実測板厚
(TACH8)にてゲート設定が行われている。
Assuming that there is a defect in such an initial block diagram, by repeating the above sequence (SEQ) twice, gate settings with fewer undetected areas can be realized considering the probability of defect occurrence. 7th-B
The figure shows the case where this sequence (SEQ) is repeated twice, and in the second cycle, the gates are set at the actual thickness (TACH 8 ) of each block.

以上の如く、初期ゲート設定を行つた後、本探
傷に入り、被検板材1の長手方向途中で上記同様
な手続により、適当な周期(T)でゲート設定を
繰返す。この場合、|D|>δであれば現状の設
定ゲートを維持すれば良い。又、板厚変動は急激
でないことから、ノイズ対策として、何点かの実
測板厚の測定値の平均値を用いてゲートを追従設
定しても良い。
After the initial gate setting is performed as described above, the main flaw detection is started, and the gate setting is repeated at an appropriate period (T) by the same procedure as described above midway in the longitudinal direction of the plate material 1 to be inspected. In this case, if |D|>δ, the current set gate may be maintained. Further, since the plate thickness changes are not sudden, the gate may be set to follow using the average value of the actual plate thickness measurements at several points as a noise countermeasure.

第8図に上記したゲート設定法のフローチヤー
トを示す。
FIG. 8 shows a flowchart of the gate setting method described above.

以上のように、この発明によれば板厚変動に追
従してゲートの設定が行えるため凝似欠陥の発発
を抑止することが可能で、また板厚実測に際し、
欠陥がある場合には、この実測値を無視して他の
合理的な基準値によりゲート設定が行われるの
で、未探傷領域を最小とすることが可能である。
As described above, according to the present invention, since the gate can be set in accordance with the plate thickness fluctuation, it is possible to suppress the occurrence of cohesive defects, and when actually measuring the plate thickness,
If there is a defect, this actual measurement value is ignored and gate setting is performed using another reasonable reference value, so it is possible to minimize the undetected area.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は多チヤンネル探傷における探触子の配
列状態説明図、第2図は分割型探触子によるパル
ス反射法の説明図、第3図は各エコーの説明図、
第4図及び第5図は従来のゲート設定法の説明
図、第6図及び第7図A,Bは本発明によるゲー
ト設定法の一実施例の説明図、第8図はそのフロ
ーチヤートである。 図中、1は被検板材、2は探触子、3は送信用
振動子、4は受信用振動子、5は接触媒質、6は
欠陥である。
Fig. 1 is an explanatory diagram of the arrangement of probes in multi-channel flaw detection, Fig. 2 is an explanatory diagram of the pulse reflection method using a segmented probe, and Fig. 3 is an explanatory diagram of each echo.
FIGS. 4 and 5 are explanatory diagrams of the conventional gate setting method, FIGS. 6 and 7 A and B are explanatory diagrams of an embodiment of the gate setting method according to the present invention, and FIG. 8 is a flowchart thereof. be. In the figure, 1 is a plate material to be inspected, 2 is a probe, 3 is a transmitting vibrator, 4 is a receiving vibrator, 5 is a couplant, and 6 is a defect.

Claims (1)

【特許請求の範囲】 1 板材の多チヤンネル自動超音波探傷に際し、
該板材をチヤンネル毎に幅方向にn個のブロツク
に区分し、各ブロツク毎に次のステツプによりゲ
ート設定を行うことを特徴とする計算機による超
音波探傷装置の自動ゲート設定方法。 (ア) 被検板材の呼称板厚(TNOM)を記憶す
る。 (イ) 各ブロツク(n)毎に実測板厚(TACTo
を求める。 (ウ) 最初のブロツク(n=1)においては|
TACTo−TNOM|、他のブロツクにおいては
|TACTo−TACTo−1|の演算を行い、この
結果(D)と一定値(δ)とを比較する。 (エ) |D|δであれば、当該ブロツク(n)に
おけるチヤンネルのゲートを実測板厚
(TACTo)にて設定する。 (オ) |D|>δであれば、実測板厚(TACTo
の値を無視し、次の値ア、イから一つの値を選
択してこの値にて当該チヤンネルのゲートを設
定する。 ア 前のブロツク(n−1)における実測板厚
(TACTo-1) イ (TNOM−δ) 2 板材の多チヤンネル自動超音波探傷に際し、
該板材をチヤンネル毎に幅方向にn個のブロツク
に区分し、各ブロツク毎に次のステツプによりゲ
ート設定を行うことを特徴とする計算機による超
音波探傷装置の自動ゲート設定方法。 (ア) 被検板材の呼称板厚(TNOM)を記憶す
る。 (イ) 各ブロツク(n)毎に実測板厚TACTnを求
める。 (ウ) 最初のブロツク(n=1)においては|
TACTo−TNOM|、他のブロツクにおいては
|TACTo−TACTo-1|の演算を行い、この結
果(D)と一定値(δ)とを比較する。 (エ) |D|δであれば、当該ブロツク(n)に
おけるチヤンネルのゲートを実測板厚
(TACTo)にて設定する。 (オ) |D|>δであれば、実測板厚(TACTo
の値を無視し、現在のゲートを維持する。
[Claims] 1. In multi-channel automatic ultrasonic flaw detection of plate materials,
An automatic gate setting method for an ultrasonic flaw detection apparatus using a computer, characterized in that the plate material is divided into n blocks in the width direction for each channel, and gate setting is performed for each block by the following steps. (a) Memorize the nominal thickness (TNOM) of the plate to be inspected. (b) Actual plate thickness (TACT o ) for each block (n)
seek. (c) In the first block (n=1) |
TACT o -TNOM|, and in other blocks, |TACT o -TACT o -1| is calculated, and the result (D) is compared with a constant value (δ). (d) If |D|δ, set the channel gate in the block (n) using the measured plate thickness (TACT o ). (E) If |D|>δ, the actual plate thickness (TACT o )
The value of is ignored, one value is selected from the following values A and B, and the gate of the channel is set with this value. A. Actual plate thickness at previous block (n-1) (TACT o-1 ) B. (TNOM-δ) 2. During multi-channel automatic ultrasonic flaw detection of plate material,
An automatic gate setting method for an ultrasonic flaw detection apparatus using a computer, characterized in that the plate material is divided into n blocks in the width direction for each channel, and gate setting is performed for each block by the following steps. (a) Memorize the nominal thickness (TNOM) of the plate to be inspected. (b) Find the actual plate thickness TACTn for each block (n). (c) In the first block (n=1) |
TACT o -TNOM|, and in other blocks, |TACT o -TACT o-1 | is calculated, and the result (D) is compared with a constant value (δ). (d) If |D|δ, set the channel gate in the block (n) using the measured plate thickness (TACT o ). (E) If |D|>δ, the actual plate thickness (TACT o )
Ignore the value of and keep the current gate.
JP12678178A 1978-10-17 1978-10-17 Automatic gate setting method of ultrasoic inspector by computer Granted JPS5554435A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12678178A JPS5554435A (en) 1978-10-17 1978-10-17 Automatic gate setting method of ultrasoic inspector by computer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12678178A JPS5554435A (en) 1978-10-17 1978-10-17 Automatic gate setting method of ultrasoic inspector by computer

Publications (2)

Publication Number Publication Date
JPS5554435A JPS5554435A (en) 1980-04-21
JPS6229741B2 true JPS6229741B2 (en) 1987-06-27

Family

ID=14943766

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12678178A Granted JPS5554435A (en) 1978-10-17 1978-10-17 Automatic gate setting method of ultrasoic inspector by computer

Country Status (1)

Country Link
JP (1) JPS5554435A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58132866U (en) * 1982-02-27 1983-09-07 住友金属工業株式会社 Ultrasonic flaw detection equipment
JP5507751B1 (en) * 2013-10-25 2014-05-28 株式会社日立パワーソリューションズ Ultrasonic inspection equipment

Also Published As

Publication number Publication date
JPS5554435A (en) 1980-04-21

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