JPS62279645A - Method for solder connection - Google Patents

Method for solder connection

Info

Publication number
JPS62279645A
JPS62279645A JP12102886A JP12102886A JPS62279645A JP S62279645 A JPS62279645 A JP S62279645A JP 12102886 A JP12102886 A JP 12102886A JP 12102886 A JP12102886 A JP 12102886A JP S62279645 A JPS62279645 A JP S62279645A
Authority
JP
Japan
Prior art keywords
solder
melting point
positioning
connection
circuit board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12102886A
Other languages
Japanese (ja)
Inventor
Hiroyuki Tanaka
大之 田中
Ryohei Sato
了平 佐藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP12102886A priority Critical patent/JPS62279645A/en
Publication of JPS62279645A publication Critical patent/JPS62279645A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119Arrangement of the bump connectors prior to mounting
    • H01L2224/81193Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To connect a semiconductor chip with a printed circuit board by preventing the deterioration of the semiconductor chip due to heat by locally heating a low-melting-point solder of an irregular plane of positioning solder columns after engaging the irregular plane of the positioning solder columns respectively formed on a semiconductor chip with a printed circuit board. CONSTITUTION:Positioning solder columns 6 are connected to electrodes 5 of a semiconductor chip 3 and of printed circuit board 4 respectively with a low-melting-point solder 2'. The chip 3 and the circuit board 4 are facing to each other and an irregular end plane of the solder columns 6 are engaged with each other. Next, the low-melting-point solder 2 coating said end planes of the solder columns 6 is locally heated and fused to connect the planes. Accordingly, positioning of the chip 3 and the circuit board 4 is performed steadily and the connection in which deterioration due to heat of the chip 3 is prevented becomes possible.

Description

【発明の詳細な説明】 五 発明の詳細な説明 〔産業上の利用分野〕 本発明は、半導体パターンを有する部品と回路基板とを
はんだ接続する方法に関する。
Detailed Description of the Invention V. Detailed Description of the Invention [Field of Industrial Application] The present invention relates to a method of soldering a component having a semiconductor pattern to a circuit board.

〔従来の技術〕[Conventional technology]

半導体パターンを有する部品及び回路基板には、耐熱性
の異る素子が多数搭載されている。
Components and circuit boards having semiconductor patterns are equipped with many elements having different heat resistances.

この部品と回路基板とをハンダ接続する場合、耐熱性の
低い素子は、はんだの溶融熱により劣化するという問題
がある。
When this component is connected to a circuit board by soldering, there is a problem that elements with low heat resistance are deteriorated by the melting heat of the solder.

この問題を解決した従来のはんだ接続方法として、耐熱
性の低い素子側には、高融点のはんだを供給し、耐熱性
の高い回路基板側には、低融点のはんだを供給して、上
記素子が十分耐え得る低い温度で低融点はんだを溶融し
、はんだ接続を行うようにしていた(特開昭57−73
947号)。
The conventional solder connection method that solved this problem is to supply high melting point solder to the element side with low heat resistance, and low melting point solder to the circuit board side with high heat resistance. The low melting point solder was melted at a temperature sufficiently low to withstand the solder joints (Japanese Patent Laid-Open No. 57-73).
No. 947).

〔発明が解犬しようとする問題点〕[Problems that the invention attempts to solve]

上記従来のはんだ接続方法は、高融点のはんだをほとん
ど溶融させないで接続するので、溶融したはんだ同志の
表面張力を利用した素子と回路基板との間のセルフアラ
イメント効果がなく、その結果素子と回路基板の正確な
位置合せが必要となるという問題がある。
The conventional solder connection method described above connects the high melting point solder with almost no melting, so there is no self-alignment effect between the element and the circuit board using the surface tension of the molten solder, and as a result, the element and the circuit There is a problem in that accurate alignment of the substrate is required.

特に、高密度の実装においては、高信頓性をもって微細
はんだ接続が必要になシ、正確な位置合せがますまず必
要になってきている。
Particularly in high-density packaging, where reliable and fine solder connections are required, accurate alignment is becoming increasingly necessary.

本発明は、上記問題に鑑みてなされたものであシ、位置
合せが簡単で、かつ耐熱性の低い素子の劣化をも同時に
防止したはんだ接続方法を提供せんとするものである。
The present invention has been made in view of the above problems, and it is an object of the present invention to provide a solder connection method that allows easy alignment and prevents deterioration of elements with low heat resistance.

〔問題点を解決するための手段〕[Means for solving problems]

上記問題を解決するために本発明は、高融点はんだ柱の
接続端面に低融点はんだによる凹凸嵌合面を設けた位置
決めはんだ柱を用いて接続するようにしたものである。
In order to solve the above-mentioned problem, the present invention uses a positioning solder post in which a concave-convex fitting surface made of low melting point solder is provided on the connection end face of the high melting point solder post.

即ち、第1の発明は、導体パターンを有する部品及び回
路基板の接続部に上記位置決めはんだ柱を設計、次にそ
の部品と回路基板とを対向させて位置決めはんだ柱の凹
凸端面を嵌合して位置決めした後、位置決めはんだ柱の
凹凸嵌合部の低融点はんだを溶融して接続するものであ
る。
That is, the first invention designs the positioning solder pillar at the connection portion of a component having a conductor pattern and a circuit board, and then places the component and the circuit board facing each other and fits the uneven end surfaces of the positioning solder pillar. After positioning, the connection is made by melting the low melting point solder on the concavo-convex fitting portion of the positioning solder pillar.

第2の発明は、多数の接続部を有する半導体パターンを
備えた部品と回路基板とのはんだ接続であって、上記位
置決めはんだ柱と、高融点はんだ柱の接続端面に凹凸面
を成形加工しない低融点はんだを積層した接続はんだ柱
の二種類のはんだ柱を用いたものであり、上記部品及び
回路基板の接続部の一部に位置決めはんだ柱を設けると
共に残シの接続部分に接続はんだ柱を設計、この部品と
回路基板とを対向させて、位置決めはんだ柱の凹凸端面
を嵌合して位置決めした後、位置決めはんだ柱及び接続
はんだ柱の接続端面にある低融点はんだを溶融してはん
だ接続するようにしたものである。
The second invention is a solder connection between a circuit board and a component having a semiconductor pattern having a large number of connection parts, and a low-temperature method in which an uneven surface is not formed on the connection end surface of the positioning solder pillar and the high melting point solder pillar. Two types of solder pillars are used: a connecting solder pillar made by laminating melting point solder, and positioning solder pillars are provided in some of the connection parts of the above components and circuit boards, and connecting solder pillars are designed in the remaining connection parts. After this component and the circuit board are faced to each other, and the uneven end surfaces of the positioning solder pillars are fitted together for positioning, the low melting point solder on the connection end surfaces of the positioning solder pillars and the connection solder pillars is melted to make a solder connection. This is what I did.

〔作用〕[Effect]

このように構成することによって、位置決めはんだ柱の
凹凸端面の嵌合によって、半導体パターンを有する部品
と回路基板とは正確に位置決めされ、接続端面にある低
融点はんだの溶融により接続することによυ、耐熱性の
低い素子でも十分足耐え得る低温度にて接続される。
With this configuration, the component having a semiconductor pattern and the circuit board are accurately positioned by fitting the uneven end faces of the positioning solder pillars, and are connected by melting the low melting point solder on the connecting end faces. , the connection is made at a low temperature that can withstand even elements with low heat resistance.

〔実施例〕〔Example〕

以下本発明の一実施例について詳細に説明する。 An embodiment of the present invention will be described in detail below.

第1図において、加工熱処理を施した高融点のけんだ柱
1は、接続端面が凹又は凸に成形加工され、この凹凸面
に低融点のけんだ2が被覆されて位置決めはんだ柱6が
形成される。この位置決めはんだ柱6は、低融点はんだ
2′九より、半導体チップ(半導体パターンを有する部
品)3及び回路基板4の電極5に接続される。
In FIG. 1, a solder column 1 with a high melting point that has been subjected to processing heat treatment is molded to have a concave or convex connection end surface, and this uneven surface is coated with a solder 2 with a low melting point to form a positioning solder column 6. be done. This positioning solder post 6 is connected to the semiconductor chip (component having a semiconductor pattern) 3 and the electrode 5 of the circuit board 4 through a low melting point solder 2'9.

このように、位置決めはんだ柱6を接続した半導体チッ
プ3と回路基板4とを対向して、位置決めばんだ柱゛6
の凹凸端面を嵌合させる(第2図)。
In this way, the semiconductor chip 3 and the circuit board 4 connected with the positioning solder pillars 6 are placed facing each other, and the positioning solder pillars 6 are connected to each other.
Fit the uneven end surfaces of (Figure 2).

この嵌合により、半導体チップ3と回路基板4とは正確
に位置決めされる。次に位置決めはんだ柱6の凹凸端面
に被覆した低融点はんだ2を局部加熱して溶融し接続す
る。
Through this fitting, the semiconductor chip 3 and the circuit board 4 are accurately positioned. Next, the low melting point solder 2 coated on the uneven end surface of the positioning solder column 6 is locally heated to melt and connect.

この局所加熱温度は、耐熱性の低い素子でも十分に耐え
得る低い温度である。又、高融点はんだ柱1は、はとん
ど溶融されずに加工熱処理を施して得られる優れた延性
を保持して、半導体チップ3と回路基板4との間のはん
だ接続部に柔軟性を与え、種々のストレスを解消する。
This local heating temperature is low enough to withstand even an element with low heat resistance. In addition, the high melting point solder pillars 1 retain the excellent ductility obtained by processing heat treatment without being melted, and provide flexibility to the solder connection between the semiconductor chip 3 and the circuit board 4. and relieve various stress.

第3図に示す実施例は、他の位置決めはんだ柱6を示す
。図において、加工熱処理を施した高融点はんだ柱1に
、凹又は凸面を成形加工した低融点はんだ2を積層した
ものである。この位置決めはんだ柱6の場合も、第1図
に示した位置決めはんだ柱6と同様に、位置決めを正確
に行ない、耐熱性の低い素子でも十分に耐え得る低温度
で溶融接続することができ、かつ、高融点はんだ柱1の
優れた延性によシ、はんだ接続部の種々のストレスが解
消される。
The embodiment shown in FIG. 3 shows another positioning solder post 6. In the figure, a low melting point solder 2 formed into a concave or convex surface is laminated on a high melting point solder column 1 which has been subjected to processing heat treatment. In the case of this positioning solder post 6, as well as the positioning solder post 6 shown in FIG. Due to the excellent ductility of the high melting point solder pillar 1, various stresses in the solder joint are eliminated.

又、第1図に示した位置決めはんだ柱6に比べて、セル
フアライメント効果も期待される点で、信頼性が高い。
Moreover, compared to the positioning solder pillar 6 shown in FIG. 1, it is expected to have a self-alignment effect and is therefore highly reliable.

次に第4図について説明する。この実施例は、半導体チ
ップ3及び回路基板4に多数の接続部(la(極5)を
有する。
Next, FIG. 4 will be explained. This embodiment has a large number of connection parts (la (poles 5)) on the semiconductor chip 3 and the circuit board 4.

図において、位置決めばんだ柱6は、接続部の一部に接
続され、残シの接続部には、接続はんだ柱7が接続され
る。上記接続の仕方は、第1図に示した実施例と同じで
あり、5は電極、2は低融点はんだである。
In the figure, the positioning solder posts 6 are connected to some of the connection parts, and the remaining connection parts are connected to the connection solder posts 7. The above-mentioned connection method is the same as the embodiment shown in FIG. 1, and 5 is an electrode and 2 is a low melting point solder.

上記接続はんだ柱7ば、位置決めはんだ柱6とは異り、
加熱加工を施した高融点はんだ柱1の端面に、凹凸面を
形成しない低融点はんだ2を積層したものである。
Unlike the above connection solder pillar 7 and positioning solder pillar 6,
A low melting point solder 2 which does not form an uneven surface is laminated on the end face of a high melting point solder column 1 which has been subjected to heat processing.

一方、位置決めばんだ柱6は、第2図に示すものを使用
しているが、第1図に示す位置決めはんだ柱6を用いて
もよい。
On the other hand, although the positioning solder post 6 shown in FIG. 2 is used, the positioning solder post 6 shown in FIG. 1 may also be used.

本実施例において、位置決めはんだ柱6の凹凸面を嵌合
することにより、半導体チップ3、回路基板4及び接続
はんだ柱7が正確に位置決めされる。
In this embodiment, by fitting the uneven surfaces of the positioning solder posts 6, the semiconductor chip 3, the circuit board 4, and the connecting solder posts 7 are accurately positioned.

次に、位置決めはんだ柱6及び接続はんだ柱7の端面2
及び2の低融点はんだを局部加熱して接続する。
Next, the end faces 2 of the positioning solder posts 6 and the connecting solder posts 7 are
and 2, the low melting point solder is locally heated and connected.

この局部加熱する温度は、耐熱性の低い素子でも十分に
耐え得る低温度である。又、高融点はんだ柱1及び7の
延性によシ、はんだ接続部の種々のストレスは解消され
る。
The temperature at which this local heating is performed is low enough to withstand even an element with low heat resistance. Also, due to the ductility of the high melting point solder pillars 1 and 7, various stresses in the solder joints are eliminated.

以上の実施例の凹凸面は、溝形を示したが、円形、角形
又は球面形等であってもよく、これに限定されるもので
はない。
Although the uneven surface in the above embodiments has a groove shape, it may have a circular, square, or spherical shape, and is not limited thereto.

〔発明の効果〕〔Effect of the invention〕

以上詳述した通り、本発明によるはんだ接続方法によれ
ば、位置決めはんだ柱を半導体パターンを有する部品と
回路基板に設け、Ct決めはんだ柱の凹凸面の嵌合によ
り、上記部品と回路基板との正確な立置合せをした後、
位置決めはんだ柱の凹凸面の低融点はんだを局部加熱し
て接続するようにしたので、部品と回路基板の位置合せ
を確実に行ないながら、半導体素子の熱による劣化を防
止した接続が可能になった。
As detailed above, according to the solder connection method according to the present invention, positioning solder pillars are provided on a component having a semiconductor pattern and a circuit board, and by fitting the uneven surfaces of the Ct determining solder pillars, the component and the circuit board are connected. After accurate alignment,
Since the low melting point solder on the uneven surface of the positioning solder pillar is locally heated to make the connection, it is possible to securely align the components and the circuit board while preventing the semiconductor element from deteriorating due to heat. .

その結果、高密度の実装が可能にな)、産業上果す効果
は極めて顕著なものがある。
As a result, high-density packaging is possible), and the industrial effects are extremely significant.

又、接続部が多数あるものに対しては、位置決めはんだ
柱と接続はんだ柱の両方を併用することKより、正確な
位置決めと半導体の熱による劣化の防止が可能となり、
増々高密度化していく実装技術分野にとって対応し得る
優れた効果をする。
In addition, for devices with a large number of connections, by using both positioning solder posts and connection solder posts, accurate positioning and prevention of semiconductor deterioration due to heat are possible.
It has excellent effects that can be applied to the field of mounting technology, which is becoming increasingly dense.

【図面の簡単な説明】[Brief explanation of drawings]

第1図乃至第4図は、本発明の一実施例を示し、第1図
は、位置決めはんだ柱を設けた部品及び回路基板の縦断
面図、第2図は、位置決めはんだ柱により、部品と回路
基板とが位置決めされている状態を示す縦断面図、第3
図は、uteめはんだ柱の他の実施例を示す節断面図、
第4図は、多数の接続部を有する部品と回路基板とを接
続する場合の、位置決めはんだ柱と接続はんだ柱の併用
による接続を示す縦断面図である。 1・・・高融点はんだ柱 2・・・凹凸端面 2.2・・・低融点はんだ柱 3・・・半導体チップ(半導体パターンを有する部品)
4・・・回路基板 5・・・電極(接続部) 6・・・位置決めはんだ柱 7・・・接続はんだ柱。 、′7)。
1 to 4 show an embodiment of the present invention. FIG. 1 is a vertical cross-sectional view of a component and a circuit board provided with positioning solder posts, and FIG. A vertical sectional view showing a state in which the circuit board is positioned, the third
The figure is a node cross-sectional view showing another example of the ute solder pillar,
FIG. 4 is a longitudinal sectional view showing a connection using a combination of positioning solder posts and connection solder posts when connecting a circuit board to a component having a large number of connection parts. 1...High melting point solder pillar 2...Uneven end surface 2.2...Low melting point solder pillar 3...Semiconductor chip (component having a semiconductor pattern)
4... Circuit board 5... Electrode (connection part) 6... Positioning solder post 7... Connection solder post. ,'7).

Claims (1)

【特許請求の範囲】 1、導体パターンを有する部品と回路基板とをはんだに
より接続する電子回路装置のはんだ接続において、高融
点はんだ柱の接続端面を低融点はんだによって凹凸の嵌
合となるように成形加工した位置決めはんだ柱を上記部
品の接続部と回路基板の接続部に設計、次にこの位置決
めはんだ柱を有する部品及び回路基板を対向させて位置
決めはんだ柱の凹凸端面を嵌合して位置決めした後、位
置決めはんだ柱の凹凸嵌合部の低融点はんだを溶融して
はんだ接続するはんだ接続方法。 2、特許請求の範囲第1項記載の位置決めはんだ柱にお
いて、高融点はんだ柱の接続端面を凹凸の嵌合面に成形
し、該凹凸面を低融点はんだで被覆したことを特徴とす
るはんだ接続方法。 3、特許請求の範囲第1項記載の位置決めはんだ柱にお
いて、高融点はんだ柱の接続端面に、低融点はんだで成
形加工した凹凸嵌合面を積層したことを特徴とするはん
だ接続方法。 4、多数の接続部を有する導体パターンを備えた部品及
び回路基板をはんだにより接続する電子回路のはんだ接
続において、高融点はんだ柱の接続端面を低融点はんだ
によって凹凸の嵌合となるように成形加工した位置決め
はんだ柱を上記部品及び回路基板の接続部の一部に設け
ると共にその残りの接続部分には高融点はんだ柱の接続
端面に凹凸面を成形加工しない低融点はんだを積層した
接続はんだ柱を設け、次に上記部品と回路基板とを対向
させて位置決めはんだ柱の凹凸端面を嵌合して位置決め
した後、位置決めはんだ柱及び接続はんだ柱の接続端面
にある低融点はんだを溶融してはんだ接続するはんだ接
続方法。 5、特許請求の範囲第4項記載の位置決めはんだ柱にお
いて、高融点はんだ柱の接続端面を凹凸の嵌合面に成形
し、該凹凸面を低融点はんだで被覆したことを特徴とす
るはんだ接続方法。 6、特許請求の範囲第4項記載の位置決めはんだ柱にお
いて、高融点はんだ柱の接続端面に、低融点はんだで成
形加工した凹凸嵌合面を積層したことを特徴とするはん
だ接続方法。
[Claims] 1. In the solder connection of an electronic circuit device in which a component having a conductor pattern and a circuit board are connected by solder, the connection end surface of a high melting point solder column is made to have an uneven fit with a low melting point solder. A molded positioning solder post was designed for the connecting part of the above component and the circuit board, and then the component having this positioning solder post and the circuit board were placed facing each other, and the uneven end surfaces of the positioning solder post were fitted to position them. After that, a solder connection method in which low melting point solder is melted on the uneven fitting part of the positioning solder pillar to make the solder connection. 2. A solder connection in the positioning solder pillar according to claim 1, characterized in that the connection end surface of the high melting point solder pillar is formed into an uneven fitting surface, and the uneven surface is covered with a low melting point solder. Method. 3. In the positioning solder pillar according to claim 1, a solder connection method characterized in that a concave-convex fitting surface molded with low melting point solder is laminated on the connection end surface of the high melting point solder pillar. 4. In the solder connection of electronic circuits that connect parts and circuit boards with conductor patterns with many connection parts by soldering, the connection end surfaces of the high melting point solder pillars are formed with low melting point solder so as to form an uneven fit. A processed positioning solder pillar is provided on a part of the connecting part of the above component and the circuit board, and the remaining connecting part is a connecting solder pillar in which a low melting point solder is laminated without forming an uneven surface on the connecting end surface of the high melting point solder pillar. Next, the above component and circuit board are faced to each other, and the uneven end faces of the positioning solder pillars are fitted to position them, and then the low melting point solder on the connection end faces of the positioning solder pillars and the connecting solder pillars is melted and soldered. Solder connection method to connect. 5. In the positioning solder pillar according to claim 4, the connection end surface of the high melting point solder pillar is formed into an uneven fitting surface, and the uneven surface is coated with a low melting point solder. Method. 6. In the positioning solder pillar according to claim 4, a solder connection method characterized in that a concave-convex fitting surface molded with low melting point solder is laminated on the connection end surface of the high melting point solder pillar.
JP12102886A 1986-05-28 1986-05-28 Method for solder connection Pending JPS62279645A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12102886A JPS62279645A (en) 1986-05-28 1986-05-28 Method for solder connection

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12102886A JPS62279645A (en) 1986-05-28 1986-05-28 Method for solder connection

Publications (1)

Publication Number Publication Date
JPS62279645A true JPS62279645A (en) 1987-12-04

Family

ID=14801027

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12102886A Pending JPS62279645A (en) 1986-05-28 1986-05-28 Method for solder connection

Country Status (1)

Country Link
JP (1) JPS62279645A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04340240A (en) * 1991-05-16 1992-11-26 Nec Corp Structure for connecting ic chip
JPH0590329A (en) * 1991-09-27 1993-04-09 Nec Corp Semiconductor optical element
JPH08330360A (en) * 1995-05-31 1996-12-13 Nec Corp Semiconductor device and its manufacture
JP2007027576A (en) * 2005-07-20 2007-02-01 Rohm Co Ltd Semiconductor device
JP2008305931A (en) * 2007-06-07 2008-12-18 Fujitsu Microelectronics Ltd Semiconductor device and manufacturing method thereof
JP2016192466A (en) * 2015-03-31 2016-11-10 株式会社村田製作所 Lamination chip component and lamination chip component stacked body

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04340240A (en) * 1991-05-16 1992-11-26 Nec Corp Structure for connecting ic chip
JPH0590329A (en) * 1991-09-27 1993-04-09 Nec Corp Semiconductor optical element
JPH08330360A (en) * 1995-05-31 1996-12-13 Nec Corp Semiconductor device and its manufacture
JP2007027576A (en) * 2005-07-20 2007-02-01 Rohm Co Ltd Semiconductor device
JP2008305931A (en) * 2007-06-07 2008-12-18 Fujitsu Microelectronics Ltd Semiconductor device and manufacturing method thereof
JP2016192466A (en) * 2015-03-31 2016-11-10 株式会社村田製作所 Lamination chip component and lamination chip component stacked body

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