JPS622713B2 - - Google Patents

Info

Publication number
JPS622713B2
JPS622713B2 JP56137329A JP13732981A JPS622713B2 JP S622713 B2 JPS622713 B2 JP S622713B2 JP 56137329 A JP56137329 A JP 56137329A JP 13732981 A JP13732981 A JP 13732981A JP S622713 B2 JPS622713 B2 JP S622713B2
Authority
JP
Japan
Prior art keywords
semiconductor layer
amorphous semiconductor
metal substrate
external lead
amorphous
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56137329A
Other languages
Japanese (ja)
Other versions
JPS5839073A (en
Inventor
Yukio Higaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP56137329A priority Critical patent/JPS5839073A/en
Publication of JPS5839073A publication Critical patent/JPS5839073A/en
Publication of JPS622713B2 publication Critical patent/JPS622713B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/02002Arrangements for conducting electric current to or from the device in operations
    • H01L31/02005Arrangements for conducting electric current to or from the device in operations for device characterised by at least one potential jump barrier or surface barrier
    • H01L31/02008Arrangements for conducting electric current to or from the device in operations for device characterised by at least one potential jump barrier or surface barrier for solar cells or solar cell modules
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy

Description

【発明の詳細な説明】 この発明は金属板を基板とするアモルフアス太
陽電池の構造に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to the structure of an amorphous solar cell using a metal plate as a substrate.

安価な太陽電池として金属板を基板とするアモ
ルフアス太陽電池が有望視され、研究開発が進め
られている。第1図は従来のこの種太陽電池の構
成を示す断面図である。まず、ステンレス鋼など
の銹びにくい金属基板1の上にグロー放電法によ
りシラン(SiH4)ガスを分解してアモルフアス半
導体層2をデポジシヨンする。その時にホスフイ
ン(PH3)またはジボラン(B2H6)ガスを1%程度
混合することによつて、それぞれn形またはp形
のアモルフアス半導体層を得るようにして、その
伝導形を制御して、連続的にp形、i形およびn
形のアモルフアス半導体層を積層して図示、アモ
ルフアス半導体層2を形成する。次に、このアモ
ルフアス半導体層2の上にインジウム・スズ酸化
物(Indium・Tin・Oxide:ITO)を蒸着して光
学的に透明な導電膜3を形成する。この導電膜3
はアモルフアス半導体層2の表面側の電気抵抗を
低下させる目的をもつている。最後にアルミニウ
ムなどを蒸着して金属電極4および外部リード線
接続のためのボンデイングパツド(特に図示せ
ず)を形成し、この部分に外部リード線5を接続
する。他方の外部接続は金属基板1に対して行な
われる。
Amorphous solar cells, which use metal plates as substrates, are seen as promising as inexpensive solar cells, and research and development is underway. FIG. 1 is a sectional view showing the structure of a conventional solar cell of this type. First, an amorphous semiconductor layer 2 is deposited on a rust-resistant metal substrate 1 such as stainless steel by decomposing silane (SiH 4 ) gas using a glow discharge method. At this time, by mixing about 1% of phosphine (PH 3 ) or diborane (B 2 H 6 ) gas, an n-type or p-type amorphous semiconductor layer is obtained, respectively, and the conductivity type is controlled. , successively p-type, i-type and n
The amorphous semiconductor layer 2 shown in the figure is formed by stacking amorphous semiconductor layers of the shape. Next, on this amorphous semiconductor layer 2, indium-tin oxide (ITO) is deposited to form an optically transparent conductive film 3. This conductive film 3
has the purpose of reducing the electrical resistance on the surface side of the amorphous semiconductor layer 2. Finally, metal electrodes 4 and bonding pads (not particularly shown) for connecting external lead wires are formed by vapor depositing aluminum or the like, and external lead wires 5 are connected to these parts. The other external connection is made to the metal substrate 1.

ところで、金属基板1への外部接続は、金属基
板1が堅固であるので、安全容易であるが、アモ
ルフアス半導体層3の表面側の外部リード線5の
接続には困難を伴う。すなわち、この外部リード
線5の接続は、超音波接続、スポツト溶接、半田
付けなどによるが、それらの作業に伴う熱や、圧
力のために、第1図に示したように金属電極4か
らアモルフアス半導体層2に達するクラツク6が
発生することがある。このように、クラツク6が
発生すると、アモルフアス半導体層3の厚さが1
ミクロン以下で、極めて薄いので、電極4の金属
がクラツク6を通して容易に基板1に達し、この
太陽電池を短絡させることになる。つまり、電極
への外部リード線5の接続の工程で、太陽電池を
破損する危険が大きかつた。
Incidentally, the external connection to the metal substrate 1 is safe and easy because the metal substrate 1 is strong, but the connection of the external lead wire 5 on the surface side of the amorphous semiconductor layer 3 is difficult. That is, the external lead wire 5 is connected by ultrasonic connection, spot welding, soldering, etc., but due to the heat and pressure associated with these operations, the amorphous material is removed from the metal electrode 4 as shown in FIG. Cracks 6 that reach the semiconductor layer 2 may occur. In this way, when the crack 6 occurs, the thickness of the amorphous semiconductor layer 3 becomes 1
Since it is extremely thin, less than a micrometer in size, the metal of the electrode 4 easily reaches the substrate 1 through the crack 6, shorting out the solar cell. In other words, there was a great risk of damaging the solar cell during the process of connecting the external lead wire 5 to the electrode.

この発明は以上のような点に鑑みてなされたも
ので、表面側の外部リード線をボンデイングすべ
き部位の直下に金属基板とアモルフアス半導体層
との間に絶縁膜を設けることによつて、たとえ上
述のようなクラツクが発生しても短絡事故の発生
しないアモルフアス太陽電池を提供することを目
的としている。
This invention has been made in view of the above points, and by providing an insulating film between the metal substrate and the amorphous semiconductor layer directly under the area where the external lead wire on the front side is to be bonded, it is possible to It is an object of the present invention to provide an amorphous solar cell that does not cause short-circuit accidents even when cracks such as those described above occur.

第2図はこの発明の一実施例の構成を示す断面
図で、第1図の従来例と同等部分は同一符号で示
し、その説明の重複を避ける。すなわち、この実
施例では、金属基板1上にアモルフアス半導体層
2を成長させる前に、将来表面側外部リード線5
をボンデイングすべき部位の直下にシリコン酸化
膜7を形成しておくもので、以下そのシリコン酸
化膜7の上を含めて金属基板1の上にアモルフア
ス半導体層2を形成し、それ以後の工程は従来例
と全く同様である。シリコン酸化膜7は400℃前
後の温度での化学的気相成長(CVD)または近
年実用化されつつあるプラズマCVDによつてデ
ポジシヨンさせるのが適当である。このように、
金属基板1とアモルフアス半導体層2との間のク
ラツク発生の可能性のある部位に堅固なシリコン
酸化膜7を設けたので、たとえ、外部リード線5
のボンデイングによつてクラツク6が発生して
も、金属電極4と金属基板1との短絡は阻止さ
れ、素子の破壊は発生しない。このとき、もちろ
んアモルフアス半導体層2内のpn接合はクラツ
ク6によつて破壊されるが、アモルフアス半導体
層2の自体が非常に高抵抗であり、このクラツク
発生部位は電極金属4の影に入つており、もとも
と太陽電池としての機能に寄与していない部分で
あるので、全体として素子機能を損ずることはな
い。
FIG. 2 is a sectional view showing the configuration of an embodiment of the present invention, and parts equivalent to those of the conventional example of FIG. 1 are designated by the same reference numerals to avoid duplication of explanation. That is, in this embodiment, before growing the amorphous semiconductor layer 2 on the metal substrate 1, the future surface side external lead wires 5 are
A silicon oxide film 7 is formed directly under the area to be bonded, and an amorphous semiconductor layer 2 is formed on the metal substrate 1 including the silicon oxide film 7, and the subsequent steps are as follows. This is exactly the same as the conventional example. The silicon oxide film 7 is suitably deposited by chemical vapor deposition (CVD) at a temperature of about 400° C. or by plasma CVD, which has been put into practical use in recent years. in this way,
Since a strong silicon oxide film 7 is provided at a location where a crack may occur between the metal substrate 1 and the amorphous semiconductor layer 2, even if the external lead wire 5
Even if a crack 6 occurs due to bonding, the short circuit between the metal electrode 4 and the metal substrate 1 is prevented, and the device is not destroyed. At this time, of course, the pn junction in the amorphous semiconductor layer 2 is destroyed by the crack 6, but the amorphous semiconductor layer 2 itself has a very high resistance, and the crack generation site is in the shadow of the electrode metal 4. Since this is a part that does not originally contribute to the function of a solar cell, it does not impair the device function as a whole.

上記実施例では、シリコン酸化膜を絶縁膜とし
て用いたが、プラズマCVDによるシリコン窒化
膜、または蒸着した各種絶縁膜でもよく、また、
パターニングは全面に付着させた後に、写真製版
技術で不用部分をエツチングしてもよいし、パタ
ーン精度を問わないときにはマスク蒸着法で所要
部位に部分的に付着させてもよい。
In the above embodiment, a silicon oxide film was used as the insulating film, but a silicon nitride film formed by plasma CVD or various insulating films deposited by vapor deposition may also be used.
The patterning may be performed by applying the pattern to the entire surface and then etching unnecessary portions using photolithography, or if the pattern accuracy is not important, it may be applied partially to the required areas by mask vapor deposition.

以上説明したように、この発明になるアモルフ
アス太陽電池ではアモルフアス半導体層にクラツ
クの発生するおそれのある表面側外部リード線の
ボンデイング部位直下の部分に、そのアモルフア
ス半導体層と金属基板との間に絶縁膜を介在させ
たので、上記クラツクが発生しても表面電極と金
属基板との間の短絡による素子の機能破壊が防止
できる。
As explained above, in the amorphous solar cell according to the present invention, there is an insulating layer between the amorphous semiconductor layer and the metal substrate in the part directly below the bonding site of the front side external lead wire, where cracks may occur in the amorphous semiconductor layer. Since the film is interposed, even if the crack occurs, it is possible to prevent the element from being destroyed due to a short circuit between the surface electrode and the metal substrate.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のアモルフアス太陽電池の構成を
示す断面図、第2図はこの発明の一実施例の構成
を示す断面図である。 図において、1は金属基板、2はアモルフアス
半導体層、3は透明導電膜、4は金属電極、5は
外部リード線、7は絶縁膜である。なお、図中同
一符号は同一または相当部分を示す。
FIG. 1 is a sectional view showing the structure of a conventional amorphous solar cell, and FIG. 2 is a sectional view showing the structure of an embodiment of the present invention. In the figure, 1 is a metal substrate, 2 is an amorphous semiconductor layer, 3 is a transparent conductive film, 4 is a metal electrode, 5 is an external lead wire, and 7 is an insulating film. Note that the same reference numerals in the figures indicate the same or corresponding parts.

Claims (1)

【特許請求の範囲】[Claims] 1 金属基板上にアモルフアス半導体層と透明導
電膜とを順次形成しその上面の一部に金属電極を
介して外部リード線をボンデイングしてなるもの
において、上記外部リード線のボンデイング部位
の直下の部分の上記金属基板と上記アモルフアス
半導体層との間に絶縁膜を介在させたことを特徴
とするアモルフアス太陽電池。
1. In a product in which an amorphous semiconductor layer and a transparent conductive film are sequentially formed on a metal substrate, and an external lead wire is bonded to a part of the upper surface of the layer through a metal electrode, the part immediately below the bonding part of the external lead wire. An amorphous solar cell characterized in that an insulating film is interposed between the metal substrate and the amorphous semiconductor layer.
JP56137329A 1981-08-31 1981-08-31 Amorphous solar battery Granted JPS5839073A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56137329A JPS5839073A (en) 1981-08-31 1981-08-31 Amorphous solar battery

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56137329A JPS5839073A (en) 1981-08-31 1981-08-31 Amorphous solar battery

Publications (2)

Publication Number Publication Date
JPS5839073A JPS5839073A (en) 1983-03-07
JPS622713B2 true JPS622713B2 (en) 1987-01-21

Family

ID=15196117

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56137329A Granted JPS5839073A (en) 1981-08-31 1981-08-31 Amorphous solar battery

Country Status (1)

Country Link
JP (1) JPS5839073A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE112019006224T5 (en) 2019-02-28 2021-10-14 Hitachi High-Tech Corporation Electrophoresis device capable of performing electrophoresis on multiple samples independently

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4590327A (en) * 1984-09-24 1986-05-20 Energy Conversion Devices, Inc. Photovoltaic device and method
US4633034A (en) * 1985-02-08 1986-12-30 Energy Conversion Devices, Inc. Photovoltaic device and method
JPS62128571A (en) * 1985-11-29 1987-06-10 Fuji Electric Co Ltd Amorphous silicon solar battery
US5395457A (en) * 1992-12-16 1995-03-07 Sanyo Electric Co., Ltd. Photovoltaic device and method of manufacturing the same
JP5147672B2 (en) * 2008-01-31 2013-02-20 三洋電機株式会社 Solar cell module and method for manufacturing solar cell module
JP2011222822A (en) * 2010-04-12 2011-11-04 Fujifilm Corp Solar battery module and manufacturing method thereof
JP2011233798A (en) * 2010-04-30 2011-11-17 Fujifilm Corp Solar cell module

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE112019006224T5 (en) 2019-02-28 2021-10-14 Hitachi High-Tech Corporation Electrophoresis device capable of performing electrophoresis on multiple samples independently

Also Published As

Publication number Publication date
JPS5839073A (en) 1983-03-07

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