JPS62268161A - Thin-film transistor element - Google Patents
Thin-film transistor elementInfo
- Publication number
- JPS62268161A JPS62268161A JP11080786A JP11080786A JPS62268161A JP S62268161 A JPS62268161 A JP S62268161A JP 11080786 A JP11080786 A JP 11080786A JP 11080786 A JP11080786 A JP 11080786A JP S62268161 A JPS62268161 A JP S62268161A
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- plasma treatment
- hydrogen plasma
- channel
- effect
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000010409 thin film Substances 0.000 title claims abstract description 10
- 239000010408 film Substances 0.000 claims abstract description 17
- 239000004065 semiconductor Substances 0.000 claims abstract description 9
- 239000000758 substrate Substances 0.000 claims description 4
- 239000001257 hydrogen Substances 0.000 abstract description 42
- 229910052739 hydrogen Inorganic materials 0.000 abstract description 42
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 abstract description 39
- 238000009832 plasma treatment Methods 0.000 abstract description 26
- 230000000694 effects Effects 0.000 abstract description 19
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract description 7
- 239000000969 carrier Substances 0.000 abstract description 6
- 230000005669 field effect Effects 0.000 abstract description 6
- 229920005591 polysilicon Polymers 0.000 abstract description 2
- 238000007599 discharging Methods 0.000 abstract 1
- 238000011282 treatment Methods 0.000 description 9
- 238000010586 diagram Methods 0.000 description 5
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 4
- 238000000151 deposition Methods 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 238000000137 annealing Methods 0.000 description 3
- 230000008021 deposition Effects 0.000 description 3
- -1 hydrogen ions Chemical class 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 239000011159 matrix material Substances 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 238000002474 experimental method Methods 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 239000004973 liquid crystal related substance Substances 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 229910052757 nitrogen Inorganic materials 0.000 description 2
- 238000012546 transfer Methods 0.000 description 2
- 241001137307 Cyprinodon variegatus Species 0.000 description 1
- 241001203952 Feia Species 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 235000013399 edible fruits Nutrition 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 239000007943 implant Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 239000002689 soil Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明に薄膜トランジスタ素子（ＴＪ”Ｔ素子）Ｋ係り
、特に平面ディスプレイＮＡ動用に好適なＴＰＴ素子に
関する。DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a thin film transistor element (TJ"T element), and particularly to a TPT element suitable for NA operation of a flat display.
ガラス等の透明基板上にＴＰＴ素子を形成し、液晶等の
電気光学効果を有■る材料と積層した、いわゆるアクテ
ィブマトリクスディスプレイに使用される’ｒ Ｆ Ｔ
素子のうち、多結晶シリコンＩｐｏｌｙ−ｓｉ）を用い
たＴＦＴ素子（ｐｏｌｙ−ｓｉＴ Ｆ ’ｒ ｌに、高
い移動度を利用し表示部周辺に駆動回路を集積したディ
スプレイヤ、高精、細、多走査線のディスプレイが製作
できるため、アクティブマトリクスディスプレイに適し
た素子であるといえる。'rF T used in so-called active matrix displays, in which a TPT element is formed on a transparent substrate such as glass and laminated with a material that has an electro-optic effect such as liquid crystal.
Among the elements, display devices that utilize high mobility and integrate drive circuits around the display area in TFT elements (poly-siT F'r l) using polycrystalline silicon (Ipoly-si), high definition, fine, and Since a scanning line display can be manufactured, it can be said that this element is suitable for an active matrix display.
ｐｏｌｙ−ｓｉ Ｔ Ｆ Ｔの特性管改良するため、現
在各埋の方法が提案されている。その中で水素あるいに
水素プラズマによる処理？行い特許を改良した例として
ζ、ジャーナル オブ アプライドフィジックス ５５
巻 第６号 パート１（１９８４年１第１５９０頁から
第１５９５頁（Ｊｏｕｒｎａｌｏｆ Ａｐｐｌｉｅｄ
ｐｈｙｓｉｃｓ Ｖｏｌｕｍｅ ５５ Ｎｕｍｂｅｒ
６゜ｐａｒｔｌ （１９８４１１）Ｉ） １５９０−
１５９５） Ｖｃおいて論じられており、ＴＰＴ素子
のしさい１［５電圧ｙｔｈが低減すること、さらＶｃ電
界効果移＠度μｆｅ が高くなることが記されている
。ざらに、窒ｆヒノリコン膜をケミカルベーパディボジ
ノヨン（ＣＶＬ）１法により形成する際ビ発生Ｔる水素
プラズマｌ／ｃよｔ） ｐｏｌｙ−ｓｉ ＴＦ’Ｔ
ｌｎ特性ヲ改良し二側としてこ、アイ、イー、イー、イ
ー、トランザクンヨ／ オンエレクトａン デバイセズ
イーデイ−３２第２号 ２月１９８５年 第２５８頁か
ら第２８１頁（ＩｇＥＥ Ｔｒａ−ｎｓａｃｔｉｏｎｓ
ｏｎ Ｅｌｅｃｔｒｏｎ １）ｅｖｉｃｅｓ、Ｖ
ａｔ、）２Ｄ−３２、Ｎｏ、２．Ｆｅｂｒｕａｒｙ １
９８５ ＰＰ２５８−２８１）Ｋ記されている。これ
らの報告でに単にｐｏｌｙ −３ｉＴＦ’Ｔ を形成し
た後、水素プラズマ処理を行なえばＴＦ’Ｔのｔｔｉ気
的特件（リーク電流、 ｙｔｈ。Various methods have been proposed to improve the characteristics of poly-Si TFTs. Among them, treatment with hydrogen or hydrogen plasma? ζ, Journal of Applied Physics 55, as an example of improving a patent by
Volume No. 6 Part 1 (1984, No. 1, pp. 1590 to 1595) (Journal of Applied
physics Volume 55 Number
6゜partl (198411)I) 1590-
1595) It is discussed in Vc that the voltage yth of the TPT element decreases, and that the Vc field effect mobility @ degree μfe increases. In general, when forming a nitrogen film using the chemical vapor deposition (CVL) method, hydrogen plasma is generated (poly-si TF'T).
I, E, E, E, I, E, E, I, E, E, I, E, E, I, I, E, E, Transactor, on the other hand, by improving ln characteristics / OnElectron Devices Eday-32 No. 2, February 1985, pages 258 to 281 (IgEE Transactions
on Electron 1) evices, V
at,)2D-32, No, 2. February 1
985 PP258-281)K marked. In these reports, if a poly-3i TF'T is simply formed and then subjected to hydrogen plasma treatment, the tti gas characteristics (leakage current, yth) of the TF'T can be improved.
μｆｅｌが向上するという報告に留っており、例えばど
のようなデバイス構造の時、最も水素プラズマ処理効果
がある、などの点についての報告汀なされていな（ハ。There are only reports that μfel is improved, and there have been no reports on, for example, what kind of device structure has the most hydrogen plasma treatment effect (c).
薄膜トランジスタの％叶改菩テ目的とした水素処理ｒ＋
：ｎ（ｊ）水素雰囲気中アニール（２）水素プラズマ（
３）室ｆヒソリコン膜の堆噴及び堆積後のアニールなど
があるか、これらの報告でに単に電気的ｆＦ曲が向上し
たという報告のみで、どのようなトランジスタ形状の時
に上記の処理が最も効果があるか、などの点Ｆついてに
配慮がされてない。本発明の目的に水素処理をした時に
電も効果があるトランジスタ構造を持つ薄膜トランジス
タ素子を提供することにある。Hydrogen treatment for the purpose of improving thin film transistors
:n(j) Annealing in hydrogen atmosphere (2) Hydrogen plasma (
3) Is there a need for deposition of the chamber f-hysolicon film and annealing after the deposition?These reports simply indicate that the electrical fF curve has been improved, and for what transistor shape is the above treatment most effective? No consideration has been given to point F, such as whether there is a It is an object of the present invention to provide a thin film transistor element having a transistor structure that is effective when subjected to hydrogen treatment.
ｐｏｌｙ−ｓｉ ＴＦＴ Ｋおける水素プラズマ処理効
果のＴＦ’Ｔのチャネル１賜Ｗとチャネル長りの依存曲
について実験を行ない、検討した結果、上記目的に比較
的チャネルＩ福が狭い（比較的チャネル長か長い）半導
体膜（チャネル；−）ｆ−韮列に接続した構造を持つｐ
ｏｌｙ−ｓｉ ’Ｉ’ ｐ Ｔ により達成される。As a result of conducting experiments and examining the dependence of the hydrogen plasma treatment effect on the channel length of TF'T on the hydrogen plasma treatment effect in poly-si TFTs, we found that the channel I is relatively narrow (relatively channel length is required) for the above purpose. long) semiconductor film (channel; -) f- p with a structure connected to a diagonal
This is achieved by oly-si 'I' p T .
ｐｏｌｙ −ｓｉ Ｔ Ｆ Ｔ Ｋおける水素プラズマ
処理効果のＴＪ”Ｔのチャネル幅Ｗとチャネル長りの依
存１４ｖｔついて実験を行い以下の知見が得られた。An experiment was conducted regarding the dependence of the hydrogen plasma treatment effect on the channel width W and channel length of TJ''T in poly-si TFTK by 14vt, and the following findings were obtained.
ＴＰＴのゲート酸比膜厚Ｑ、ｌＡｔｍ、 チャネル幅Ｗ
ｈｏμｍ、一定にした状態でチャネル長りが１０μｍ、
３０μｍ、６０μｍ、１２０μｍ。TPT gate acid ratio film thickness Q, lAtm, channel width W
hoμm, the channel length is 10μm when kept constant,
30μm, 60μm, 120μm.
１８０μｍ の場合の水素プラズマ処理（９０分）前後
のしきい値に圧ｖｔｈ、 電界効果移動度μｆｅの測
定結果を第２図に示す。この結果に水素処理の＠後で％
ヰσ）ｆｆヒがなくプラズマ処理の効果がほとんどない
ことを示している。次１’ｊＴＦ’Ｔの酸化膜厚０．ｌ
ｐｍ、チャネル長し１５μｍ一定にした状態でチャネル
幅Ｗが１０μｍ、３０μｍ。Figure 2 shows the measurement results of the threshold voltage vth and field effect mobility μfe before and after hydrogen plasma treatment (90 minutes) in the case of 180 μm. This result shows % after hydrogen treatment.
There was no ヰσ)ff, indicating that the plasma treatment had almost no effect. Next 1'jTF'T oxide film thickness 0. l
pm, channel width W is 10 μm, 30 μm with channel length kept constant at 15 μm.
６０μｍ、１２０μｍ、１８０μｍの場合の水素プラズ
マ処理＋９０分）前後のしきい値電圧ｖｔｈ、電界効果
移動（μｆｅＩ７）測定結果を第３図に示す。FIG. 3 shows the measurement results of threshold voltage vth and field effect transfer (μfeI7) before and after hydrogen plasma treatment (+90 minutes) for 60 μm, 120 μm, and 180 μm.
この結果に第２図の実験結果と違Ａ、水素プラズマ処理
効果がチャネル幅Ｗが短い程顕著にあられ２１′Ｌると
いうことが分かる。ここで、水素プラズマ処理効果の典
型的な結果として、酸化膜厚０．１μｍ。This result is different from the experimental results shown in FIG. 2, and it can be seen that the hydrogen plasma treatment effect becomes more pronounced as the channel width W becomes shorter. Here, as a typical result of the hydrogen plasma treatment effect, the oxide film thickness is 0.1 μm.
゛ｊヤネル長Ｌ ５０ μｍ、チャネル１陽１０μｍ＋
７）ＴＪ”Ｔの水素処理（９０分）前後におけるＶａ
ＩＤ特注を第４図に示す。破線が水素プラズマ処理
前の＃ヰで実瞭が水素プラズマ処理グ）特注である。゛jYarnel length L 50 μm, channel 1 positive 10 μm+
7) Va before and after hydrogen treatment (90 minutes) of TJ”T
Figure 4 shows the ID custom order. The dashed line is before hydrogen plasma treatment, and the one clearly shown is hydrogen plasma treatment.
即ち、水素プラズマ処理＃にしきい直電圧Ｖｔｈ２２Ｖ
、醒界効果移動度μｆｅ ９ｔｙｎ”／ＶＳだったもの
が、水素プラズマ処理９０分ｍ１Ｖｔｈが】８Ｖ。That is, the threshold direct voltage Vth22V for hydrogen plasma treatment #
, the 90-minute hydrogen plasma treatment m1Vth was 8V, whereas the mobility μfe was 9tyn"/VS during the 90-minute hydrogen plasma treatment.
μｆ ｅ Ｉ’ｌ １０ｔｙｎ”／ｖｓπなり、それ
ぞれ特姓が改善されている。上記の実験結果より、ＴＦ
’Ｔにおける水素プラズマ処理効果なチマネル長りにぼ
関係なく、チャネル幅Ｗが狭す程、しきい値電圧ｖｔｈ
か下がり、電界効果移動度μｆｅが高くなることが分か
った。μf e I'l 10tyn"/vsπ, and the characteristics are improved. From the above experimental results, TF
Regardless of the length of the hydrogen plasma treatment effect at T, the narrower the channel width W, the higher the threshold voltage vth.
It was found that the field effect mobility μfe increased.
ソコで、水素プラズマ処理効果を充分発揮するためＶｃ
ｄチャネル幅Ｗ？充分狭くすればよいのだが現在のｐｏ
ｌｙ−ｓｉのμｆｅから充分高くない（単結晶ｓｉのμ
ｆｅが１０００〜１５００ｃｎ２／ｖｓＶｃ対し、ｐｏ
ｌｙ−ｓｉのμｆｅ Ｂ ］ Ｏ〜３０ｃｍ” ／ ｖ
ｓ ）ので、チャネル幅Ｗが充分狭い（例えば１μｍ）
と、オーネル長ＬＰ短かくする（例えば１μｍ）と、今
度に周知の短チヤネル効果によって、電流を流したくな
い時まで、電流が流れてし萱う。従って、笑用土のＴＰ
Ｔのチャネル長Ｌ１チャネル幅ＷＤむやみに短かく、狭
くはできない。In order to fully demonstrate the hydrogen plasma treatment effect, Vc
d channel width W? It would be fine if it was narrow enough, but the current po
It is not high enough from μfe of ly-si (μfe of single crystal Si
fe is 1000-1500cn2/vsVc, po
μfe B of ly-si] O~30cm”/v
s ), so the channel width W is sufficiently narrow (for example, 1 μm)
If the Ornel length LP is shortened (for example, 1 μm), then due to the well-known short channel effect, current will continue to flow until it is no longer desired to flow. Therefore, TP of lol soil
The channel length L1 of T and the channel width WD cannot be made unnecessarily short or narrow.
次に・本発明を実現する代表的な素子構造を第１図を用
いて説明する。Next, a typical element structure for realizing the present invention will be explained using FIG.
第１図（ａ）に本発明の第１の実施例のトランジスタの
デバイス構造を真上から見ｙ：Ｚ、又・（ｂ）ｉ同構造
を側面から見た断面図、又、（Ｃ）な（ａ）のＡ−・（
７間を切断して見た断面図である。即ち、チャネル幅Ｗ
が狭く、チャネル長りが長い半導体や並列π饗続するト
ランジスタ構造である。トランジスタ動作としてはキャ
リア（二Ｖクトロノ又はホール）をトランジスタ内に注
入するためのキャリアの源泉部器チ、ソース１！事４と
トランジスタ内のキャリアを排出する部分即ち、ドレイ
ン１極５闇に電位差Ｖを加えた状態で、ゲート電Ｉ返と
して使ｌグ６１Ｌ＋ｉ ＶＣ流れる電流を制剖するもの
である。第１１却の構造にチャネル幅Ｗが狭いので、水
素プラズマ処理効果が充分に現れ、又、チャネル部の実
効的な幅Ｗ？大きくしているため、トランジスタＯＮ状
態でのソース、ドレイン間に充分な＠流が流せる。FIG. 1(a) shows the device structure of the transistor according to the first embodiment of the present invention viewed from directly above, and (b) i shows a cross-sectional view of the same structure viewed from the side. (a) A-・(
FIG. That is, the channel width W
This is a semiconductor with a narrow channel and a long channel length, or a transistor structure with a parallel π-connection. As for transistor operation, the source of carriers (source 1!) is used to inject carriers (2V electrons or holes) into the transistor. Item 4: With a potential difference V added to the part that discharges carriers in the transistor, that is, the drain 1 pole 5, the current flowing through the gate voltage 61L+i VC is analyzed. Since the channel width W is narrow in the structure of the eleventh section, the effect of hydrogen plasma treatment is sufficiently exhibited, and the effective width W of the channel portion is? Since it is made large, a sufficient @ current can flow between the source and drain when the transistor is in the ON state.
第１図の薄膜トランジスタを用いた応用例としてに嘔５
１交のような液晶ＫＡ動用のアクティブマトリクス基板
等がある。As an application example using the thin film transistor shown in Figure 1,
There are active matrix substrates for liquid crystal KA operation such as 1X.
次に第６図によｒ）第１図の薄膜トランジスタの製作プ
ロセスｆ−説明する。Next, referring to FIG. 6, r) the manufacturing process of the thin film transistor shown in FIG. 1 will be explained.
（ａ）ガラス基板上げポリシリコン膜０．３μｍ堆積し
島状に分割する。（ｂ）酸化ンリコン＠０．１μｍ、ポ
リ７リコン膜０．５μｍを順次堆積しゲート部分以外の
酸化膜、ポリ７リコン膜を除去する。（Ｃ） Ｕノ（ｐ
）を加速′送圧８２ＫＶで５ ｘ ］ ０” ＣＩ／ｃ
ｒｎ” ］個打込む。（ｄ）再び酸化ンリコン膜０．３
μ＋ｎ ｆ堆積し、ソース、ドレイ７窓を開ける。（ｅ
） ｋｔ Ｆ ０．３μｍ蒸着し、ソース、ドレイン部
以外は除去する。(a) A polysilicon film of 0.3 μm is deposited on a glass substrate and divided into islands. (b) An oxidized silicon film @0.1 μm and a poly-7 silicon film of 0.5 μm are sequentially deposited, and the oxide film and poly-7 silicon film are removed from areas other than the gate portion. (C) U no (p
) at a pressure of 82KV 5 x ] 0” CI/c
(d) Re-implant silicon oxide film 0.3
μ+nf is deposited and the source and drain 7 windows are opened. (e
) ktF 0.3 μm is deposited and removed except for the source and drain portions.
（ｆ）上記の工程で製作された＃俣トランジスタをチギ
ンパ内（基円圧力０．１ｔｏｒｒ、水’Ａ 流黛８０５
ｃｃｒｎ 。(f) Place the #mata transistor manufactured in the above process in a chiginpa (base pressure 0.1 torr, water 'A' flow 805
ccrn.
カソード、アノード間の距４％ ８ ｃｍ Ｉに入れ、
プラズマ放′心（パワー密９０．３ ｗ７ｃｍ” Ｉを
発生させ、９０分間水素プラズマ処理を行う。Put the distance between cathode and anode 4% 8 cm I,
Generate plasma radiation (power density 90.3 w7 cm"I) and perform hydrogen plasma treatment for 90 minutes.
この製造プロセスに代表的な一例について述べたもので
あり、各パラメータを変えた場合、あるいに、素子構造
を変えた場合にも水素処理の効果がありＸ発明の構造に
肩効である。This is a typical example of this manufacturing process, and even when each parameter is changed or the element structure is changed, the hydrogen treatment has an effect and is more effective than the structure of invention X.
第７同ＶＣ第１１ＡＩ７’）変形例を示す。7th VC, 11th AI7') A modification example is shown.
Ｃａ１ｎ水素イオンが半導体中に浸透しや■いように半
導俸俣円に数カ所の穴を開けたトランジスタ構造である
。（ｂ）に（２） １７）−造のゲート部直下のチャネ
ル幅νＶを狭くした構造である。この構造でにトランジ
スクリＦＦ状態でのソース、ドレイン間の電流を抑える
ことができるという特長がある。（ｃ）ｒｘ牟１図の構
造にくし状のゲートを組合わせた構造である。この構造
では実効チャネル長しが短かくなることにエワトランジ
スタＯＮ状、帰でのソース。It has a transistor structure in which several holes are made in a semiconductive circle so that Ca1n hydrogen ions can easily penetrate into the semiconductor. (b) has a structure in which the channel width νV directly under the gate portion of (2) 17) is narrowed. This structure has the advantage of suppressing the current between the source and drain in the transistor FF state. (c) rx This is a structure in which the structure shown in Figure 1 is combined with a comb-shaped gate. In this structure, the effective channel length is shortened, and the source of the transistor in the ON state and the return state is shortened.
ドＶイン間に大富流が供はでき、又、ゲート′府甑の無
力部分から水素イオ／が浸入してくるため、水素プラズ
マの＠４−ｆ上げることか−・−期待できる。（ｄ）ｉ
ｑゲートＩ下のチャネル部となるべき半樽体模及びゲー
ト’ＴＩＦｄｉ（’ＭＩＹｉ：Ｊでαｎゝボリンリコン
膜８）に比較的多数の八を開けた構造で、これも水素イ
オンの浸入を容易にした構造である。Since the Otomi flow is generated between the gate and the V-in, and hydrogen ions enter from the inactive part of the gate, it can be expected that the hydrogen plasma will be raised by 4-f. (d)i
q It has a structure in which a relatively large number of holes are opened in the half-barrel body model and the gate 'TIFdi ('MIYi: αn Bolin Recon film 8 in J) which is to become the channel part under gate I, which also facilitates the intrusion of hydrogen ions. The structure is as follows.
ここに述べた構造以外にも水素プラズマ処理σ〕幼果を
上げろため、ゲート電）下の半導体喚の一部を冷去１−
た構造が考えられるが、こｎらに本発明に含ブれること
汀菖うまでもない。In addition to the structure described here, hydrogen plasma treatment σ] to raise the young fruit, a part of the semiconductor layer under the gate electrode) is cooled 1-
Although other structures are conceivable, it goes without saying that these are included in the present invention.
又、本実施例に水素プラズマ処理について、述べている
が薄膜トランジスタ素子において、他の水素処４（水素
雰囲気中７二−ル、窒ｆヒソリコン膜の堆積及び堆積後
のアニール）でも本発明の構造に有効である。Although hydrogen plasma treatment is described in this example, the structure of the present invention can also be applied to other hydrogen treatments (7 nitrogen in a hydrogen atmosphere, deposition of a nitride-f hysolicon film, and post-deposition annealing) in a thin film transistor element. It is effective for
〔発明の効果］
ぶ発明に工れば、千ヤ不ル幅Ｗが比較的狭い半導体？並
列に接続し、それらをチャネル層としたトランジスタを
製作することにより、水素プラズマ処理の絶大な効果が
期待できるので、しきい値阿王ｖｔｈの低減、電界効果
移１勧度μｆｅの増大等の効果がある。[Effects of the invention] If the invention is made, will it be possible to create a semiconductor with a relatively narrow width W? By connecting them in parallel and fabricating a transistor using them as a channel layer, we can expect great effects from hydrogen plasma treatment, such as reducing the threshold voltage vth and increasing the field effect transfer coefficient μfe. effective.
第１図は本発明の一実施例のトランジスタの断面横１青
図で（ａ）１１上ｉｎ、（ｂ）ｉ−ｘイ則：ｆＥＩＡ
、 （Ｃ）ｎ（ａ）グ）ＡＡ／ 闇の断面図、嘱２図
はプラズマ水素処理前後のｖｔｈ、μｆｅ Ｖｃ対する
チャネル長り依存曲を示す将ヰ線同、第３向にプラズマ
水素処理前説グ〕Ｖｔｈ 、μｆｅＶｃ対するチャネル
幅Ｗ依存注を示す特曲線図、第４図に水素プラズマ処理
前後のＶａ−Ｉｏｎ特注を示す特ヰ線図、第５図に本発
明の１専膜トランジスタの応用例の説明図、第６図に本
発明の一実施例の薄膜トランジスタ製作プロでス説明図
、第７図に第１図の変形例の断面向である。FIG. 1 is a cross-sectional horizontal one blue diagram of a transistor according to an embodiment of the present invention, (a) 11 in, (b) i-x i law: fEIA
, (C)n(a)g)AA/ Dark cross-sectional view, Figure 2 shows the channel length dependence curve for vth and μfe Vc before and after plasma hydrogen treatment. 4 is a characteristic curve diagram showing the dependence of channel width W on Vth and μfeVc, FIG. 4 is a characteristic curve diagram showing Va-Ion customization before and after hydrogen plasma treatment, and FIG. 5 is a characteristic curve diagram showing the dependence of channel width W on Vth and μfeVc. FIG. 6 is an explanatory diagram of a thin film transistor manufacturing process according to an embodiment of the present invention, and FIG. 7 is a cross-sectional view of a modification of FIG. 1.
Claims (1)
いて、チャネル部内全域、或は一部分にトランジスタ素
子が並列接続となるように、少なくとも１箇所以上半導
体膜の除去部分を設けた事を特徴とした薄膜トランジス
タ素子。1. A thin film transistor element formed on an insulating substrate, characterized in that at least one portion of the semiconductor film is removed so that the transistor elements are connected in parallel throughout or in a part of the channel part. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11080786A JPS62268161A (en) | 1986-05-16 | 1986-05-16 | Thin-film transistor element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11080786A JPS62268161A (en) | 1986-05-16 | 1986-05-16 | Thin-film transistor element |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62268161A true JPS62268161A (en) | 1987-11-20 |
Family
ID=14545155
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11080786A Pending JPS62268161A (en) | 1986-05-16 | 1986-05-16 | Thin-film transistor element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62268161A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007005395A (en) * | 2005-06-21 | 2007-01-11 | Mitsubishi Electric Corp | Thin-film transistor |
| JP2007279648A (en) * | 2006-04-06 | 2007-10-25 | Chunghwa Picture Tubes Ltd | Pixel structure and repair method thereof |
| JP2009025822A (en) * | 1998-03-27 | 2009-02-05 | Semiconductor Energy Lab Co Ltd | Semiconductor device |
| JP2013012748A (en) * | 2005-06-10 | 2013-01-17 | Semiconductor Energy Lab Co Ltd | Semiconductor device and light-emitting device |
| JP2018064112A (en) * | 2002-01-28 | 2018-04-19 | 株式会社半導体エネルギー研究所 | Semiconductor device |
-
1986
- 1986-05-16 JP JP11080786A patent/JPS62268161A/en active Pending
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009025822A (en) * | 1998-03-27 | 2009-02-05 | Semiconductor Energy Lab Co Ltd | Semiconductor device |
| US8054270B2 (en) | 1998-03-27 | 2011-11-08 | Semiconductor Energy Laboratory Co., Ltd. | Driving circuit of a semiconductor display device and the semiconductor display device |
| US9262978B2 (en) | 1998-03-27 | 2016-02-16 | Semiconductor Energy Laboratory Co., Ltd. | Driving circuit of a semiconductor display device and the semiconductor display device |
| JP2018064112A (en) * | 2002-01-28 | 2018-04-19 | 株式会社半導体エネルギー研究所 | Semiconductor device |
| JP2013012748A (en) * | 2005-06-10 | 2013-01-17 | Semiconductor Energy Lab Co Ltd | Semiconductor device and light-emitting device |
| JP2007005395A (en) * | 2005-06-21 | 2007-01-11 | Mitsubishi Electric Corp | Thin-film transistor |
| JP2007279648A (en) * | 2006-04-06 | 2007-10-25 | Chunghwa Picture Tubes Ltd | Pixel structure and repair method thereof |
| JP4642700B2 (en) * | 2006-04-06 | 2011-03-02 | 中華映管股▲ふん▼有限公司 | Pixel structure and repair method thereof |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP3277892B2 (en) | Display substrate manufacturing method | |
| KR101334181B1 (en) | Thin Film Transistor having selectively crystallized channel layer and method of manufacturing the same | |
| JPH0777264B2 (en) | Method of manufacturing thin film transistor | |
| JP2001028448A (en) | Manufacture if thin-film transistor | |
| JPH0614548B2 (en) | Method for manufacturing semiconductor device | |
| JPH0566747B2 (en) | ||
| JPS62268161A (en) | Thin-film transistor element | |
| JP3741741B2 (en) | Method for manufacturing complementary integrated circuit | |
| US5898188A (en) | Semiconductor device and method for its fabrication | |
| JPS61252667A (en) | Thin film transistor and manufacture thereof | |
| JPS63204769A (en) | Thin film transistor | |
| JPS6489464A (en) | Semiconductor device and manufacture thereof | |
| JPH01309378A (en) | Thin-film semiconductor element | |
| JP2767413B2 (en) | Thin film transistor and method of manufacturing the same | |
| JP3057770B2 (en) | Method for manufacturing thin film transistor | |
| JPH05275701A (en) | Thin-film transistor | |
| JP3181901B2 (en) | Thin film transistor | |
| JPH0534837B2 (en) | ||
| JPH03165066A (en) | Polycrystalline silicon thin film transistor and manufacture thereof | |
| JPH11111985A (en) | Manufacture of thin-film transistor and liquid crystal display device | |
| JP4321828B2 (en) | Method for manufacturing semiconductor device | |
| JP3946690B2 (en) | Inverter circuit fabrication method | |
| JPS63284865A (en) | Thin film semiconductor element | |
| JP2837473B2 (en) | Silicon thin film transistor | |
| JPS60224278A (en) | N type transistor |