JPS62244167A - Optical, electronic semiconductor integrated circuit - Google Patents
Optical, electronic semiconductor integrated circuitInfo
- Publication number
- JPS62244167A JPS62244167A JP8895386A JP8895386A JPS62244167A JP S62244167 A JPS62244167 A JP S62244167A JP 8895386 A JP8895386 A JP 8895386A JP 8895386 A JP8895386 A JP 8895386A JP S62244167 A JPS62244167 A JP S62244167A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- electronic semiconductor
- active layer
- laser
- electronic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 50
- 230000003287 optical effect Effects 0.000 title claims description 3
- 238000002347 injection Methods 0.000 claims abstract description 10
- 239000007924 injection Substances 0.000 claims abstract description 10
- 238000005253 cladding Methods 0.000 claims description 10
- 238000000034 method Methods 0.000 abstract description 12
- 239000012535 impurity Substances 0.000 description 25
- 238000009792 diffusion process Methods 0.000 description 16
- 239000000758 substrate Substances 0.000 description 12
- 238000010586 diagram Methods 0.000 description 9
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 7
- 230000000694 effects Effects 0.000 description 6
- 230000010354 integration Effects 0.000 description 6
- 150000002500 ions Chemical class 0.000 description 5
- 238000009826 distribution Methods 0.000 description 3
- 238000005468 ion implantation Methods 0.000 description 3
- 239000011701 zinc Substances 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- NINIDFKCEFEMDL-UHFFFAOYSA-N Sulfur Chemical compound [S] NINIDFKCEFEMDL-UHFFFAOYSA-N 0.000 description 1
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 229910052717 sulfur Inorganic materials 0.000 description 1
- 239000011593 sulfur Substances 0.000 description 1
- 239000012808 vapor phase Substances 0.000 description 1
- 229910052725 zinc Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/02—Structural details or components not essential to laser action
- H01S5/026—Monolithically integrated components, e.g. waveguides, monitoring photo-detectors, drivers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/02—Structural details or components not essential to laser action
- H01S5/026—Monolithically integrated components, e.g. waveguides, monitoring photo-detectors, drivers
- H01S5/0261—Non-optical elements, e.g. laser driver components, heaters
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/04—Processes or apparatus for excitation, e.g. pumping, e.g. by electron beams
- H01S5/042—Electrical excitation ; Circuits therefor
- H01S5/0421—Electrical excitation ; Circuits therefor characterised by the semiconducting contacting layers
- H01S5/0422—Electrical excitation ; Circuits therefor characterised by the semiconducting contacting layers with n- and p-contacts on the same side of the active layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/20—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
- H01S5/2054—Methods of obtaining the confinement
- H01S5/2059—Methods of obtaining the confinement by means of particular conductivity zones, e.g. obtained by particle bombardment or diffusion
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Electromagnetism (AREA)
- Optics & Photonics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Junction Field-Effect Transistors (AREA)
- Semiconductor Lasers (AREA)
Abstract
Description
【発明の詳細な説明】
〔概要〕
半導体レーザと電子半導体素子の集積化構造であって、
横方向注入レーザの高抵抗クラッド層の上に電子半導体
素子を形成することにより、プロセスを容易にする。[Detailed Description of the Invention] [Summary] An integrated structure of a semiconductor laser and an electronic semiconductor element, comprising:
Forming the electronic semiconductor elements on top of the high resistance cladding layer of the lateral injection laser facilitates the process.
本発明は光半導体素子と電子半導体素子との集積化構造
に係り、特に、横方向注入レーザとＦＥＴの集積回路装
置に関する。The present invention relates to an integrated structure of an optical semiconductor device and an electronic semiconductor device, and more particularly to an integrated circuit device of a lateral injection laser and a FET.
最近、レーザと電子素子との集積化は、より使用し易い
形態をチップレベルで実現するため、及び特性の向上を
図るために活溌な研究が行なわれている。Recently, active research has been carried out on the integration of lasers and electronic elements in order to realize a form that is easier to use at the chip level and to improve the characteristics.
このような集積化には、半絶縁性基板が多く使用されて
いる。また、結晶成長には均一性がより強く要求される
ので、ＭＯＣＶＤ （有機金属気相成長法）、ＭＢＥ
（分子線エピタキシャル成長法）またはＶＰＥ （気相
エピタキシャル成長法）が使用されている。Semi-insulating substrates are often used for such integration. In addition, since uniformity is more strongly required for crystal growth, MOCVD (metal-organic chemical vapor deposition), MBE
(molecular beam epitaxial growth method) or VPE (vapor phase epitaxial growth method) are used.
第５図に従来のレーザと電子素子との集積回路の概要図
を示す。第５図において、半絶縁性の基板ＳＵＢに溝Ｔ
を形成し、この溝の上にレーザの半導体層を積層し、半
導体レーザＬＤを設け、二方溝Ｔの外部に半導体薄層Ｓ
を設けその中に電子装置９例えばＦＥＴを形成している
。このとき、第５図の点線のように、半導体レーザＬＤ
とＦＥＴの表面を合わせプレーナ面を形成することが望
ましい。FIG. 5 shows a schematic diagram of a conventional integrated circuit of a laser and an electronic element. In Fig. 5, a groove T is formed in a semi-insulating substrate SUB.
is formed, a semiconductor layer of the laser is laminated on this groove, a semiconductor laser LD is provided, and a semiconductor thin layer S is formed outside the two-way groove T.
An electronic device 9, for example, an FET, is formed therein. At this time, as shown by the dotted line in FIG.
It is desirable to align the surfaces of the FET and the FET to form a planar surface.
しかし、上記の半導体レーザＬＤと電子素子のＦＥＴ等
の集積化では、電子素子厚が１μｍ程度であるのに対し
て、ＬＤ素子の厚さは６〜７μｍ程度となり、これらを
モノリシック集積化しようとするとき、第５図のように
基板に予め段差をつけ、プレーナ化を図る基板加工等の
工程が必要となり、プロセス技術が複雑になるという欠
点があった。また、従来のＬＤ素子では、電流をエピタ
キシャル層に垂直に流すため、ＬＤ素子の上下に電極を
形成する必要があり、プレーナ面にある電子素子の電極
との配線構造が複雑になり、さら４Ｆ溝の形成による段
差で配線切れのおそれが生じる等で歩留りが低下せざる
を得なかった。However, in the integration of the semiconductor laser LD and electronic devices such as FETs, the thickness of the electronic device is about 1 μm, whereas the thickness of the LD element is about 6 to 7 μm, and it is difficult to monolithically integrate them. In this case, as shown in FIG. 5, steps such as processing the substrate to make it planar by forming a step in advance on the substrate are required, which has the drawback of complicating the process technology. In addition, in conventional LD elements, since current flows perpendicularly to the epitaxial layer, it is necessary to form electrodes above and below the LD element, which complicates the wiring structure with the electrodes of the electronic elements on the planar surface. Yields had to be lowered due to the risk of wire breakage due to the difference in level caused by the formation of the grooves.
そこで、本発明はレーザ構造を集積化し易い構造とし、
プロセスをより容易にし、歩留りを向上することができ
る集積化構造を提供しようとするものである。Therefore, the present invention makes the laser structure easy to integrate,
The aim is to provide an integrated structure that can make the process easier and improve the yield.
本発明では、基板上に、高抵抗なりラッド層間に多重量
子井戸の活性層を有するエピタキシャル層構造を形成し
、ｐ型不純物及びｎ型不純物を表面から拡散してプレー
ナ構造の横方向注入レーザを形成し、基板表面側の高抵
抗なりラッド層表面に電子半導体素子を形成してなる半
導体レーザと電子半導体素子との集積回路を提供する。In the present invention, an epitaxial layer structure having a multi-quantum well active layer between high-resistance or rad layers is formed on a substrate, and p-type impurities and n-type impurities are diffused from the surface to produce a planar structure lateral injection laser. An integrated circuit of a semiconductor laser and an electronic semiconductor element is provided, in which the electronic semiconductor element is formed on the surface of a high-resistance or rad layer on the surface side of the substrate.
本発明の構造において、レーザとして上記横方向注入レ
ーザを採用することにより、レーザの電極を表面側のみ
に形成しプレーナ化することが可能になり、また、クラ
ッド層として高抵抗な半導体層を採用することにより、
プレーナ面を形成する該クラッド層上に電子素子を形成
する活性層を含む半導体層を設けることが可能になる。In the structure of the present invention, by employing the above-mentioned lateral injection laser as the laser, it is possible to form the laser electrode only on the surface side and make it planar, and also employ a high-resistance semiconductor layer as the cladding layer. By doing so,
It becomes possible to provide a semiconductor layer containing an active layer forming an electronic element on the cladding layer forming the planar surface.
第１図（Ａ）〜（Ｃ）本発明の実施例のレーザと電子半
導体素子との集積化構造の工程図を示す。FIGS. 1A to 1C show process diagrams of an integrated structure of a laser and an electronic semiconductor device according to an embodiment of the present invention.
第１図（Ａ）参照
ｌは電子半導体素子を形成する半導体層であり、該半導
体層は半絶縁性基°板上に形成されたレーザを形成する
エピタキシャル構造上に成長されている。該エピタキシ
ャル構造は以下の構造とする。Referring to FIG. 1A, 1 is a semiconductor layer forming an electronic semiconductor element, which semiconductor layer is grown on an epitaxial structure forming a laser formed on a semi-insulating substrate. The epitaxial structure has the following structure.
１−・電子半導体素子形成用のＧａＡｓ層ＧａＡｓ層１
は全体厚２．５μｍ程度に形成され、そのうち、２μｍ
程度は低濃度のバッファ層であり、その上に電子素子Ｐ
Ｉ！？形成のためのｎ −ＧａＡｓ活性層が形成される
。1-.GaAs layer for forming electronic semiconductor device GaAs layer 1
is formed with a total thickness of about 2.5 μm, of which 2 μm
It is a buffer layer with a low concentration, and an electronic element P is placed on top of it.
I! ? An n-GaAs active layer for formation is formed.
ＧａＡｓ活性層のキャリア濃度Ｎ” ＃Ｉ Ｘ １０”
ｃｔｍ−３厚味ｄ ｓＯ，４〜０．５ ａｍ程度であ
る。Carrier concentration of GaAs active layer N"#I x 10"
The thickness of ctm-3 is about 4 to 0.5 am.
２．２’−−・高抵抗半導体層のＨＲ−Ａｍ！ Ｘ Ｇ
ａトｘ＾Ｓ（ｘ −０，４５）
厚味ｄ ＃ｌ ｐｍ 〜１．５ μｎ程度３・−多重量
子井戸（ＭＱＷ）活性層
ＧａＡｓ （３０人）／ Ａｌ１ｘＧａト、ａｓ（１２
０人）の繰返し層構造（Ｘニク、す
４−・半絶縁性ＧａＡｓ基板
これらの１〜３の各層は基板４上に一連（１回）のエピ
タキシャル成長工程、例えばＭＢＥまたはＭＯＣＶＤに
より形成することができる。2.2'--HR-Am of high-resistance semiconductor layer! X G
ato x^S (x -0,45) Thickness d #l pm ~1.5 μn approximately 3 - Multiple quantum well (MQW) active layer GaAs (30 people) / Al1xGato, as (12
Each of these layers 1 to 3 can be formed on the substrate 4 by a series (one time) of epitaxial growth steps, such as MBE or MOCVD. can.
第１図（Ｂ）
選択的にｐ型不純物（電極）領域５、およびｎ型不純物
（電極）領域６を形成する。例えば、各不純物領域は以
下のように形成する。FIG. 1(B) A p-type impurity (electrode) region 5 and an n-type impurity (electrode) region 6 are selectively formed. For example, each impurity region is formed as follows.
５・−Ｚｎ（亜鉛）拡散、またはＺｎイオン注入で形成
キャリア濃度ｐＪ ｐ ＃ ’ｌ Ｘ ＩＱＩ８ａｍ″
″３以上６−３（硫黄）拡散、またはＳｉイオン注入で
形成
キャリア濃度Ｎ ｎ ′＝−２Ｘ ＩＱ” ｃｓ−３以
上拡散の順序は拡散係数の関係でｎ型不純物の拡散を先
に行なう。パシベーション膜（図示せず）にはＳ ｉ
Ｏ２膜とＳｉＮ各２０００人の二層マスクを用いる。５
．６のｐ、ｎ不純物層で挾まれる未拡散の活性層のレー
ザ・ストライプ幅ｌは１〜２μｍ程度とする。5.-Carrier concentration pJ p # 'l X IQI8am'' formed by Zn (zinc) diffusion or Zn ion implantation
``3 or more 6-3 (sulfur) diffusion or Si ion implantation forms carrier concentration N n '=-2X IQ'' cs-3 or more The order of diffusion is that n-type impurity is diffused first due to the diffusion coefficient. The passivation film (not shown) has Si
A two-layer mask of 2,000 each of O2 film and SiN is used. 5
．． The laser stripe width l of the undiffused active layer sandwiched between the p and n impurity layers of No. 6 is about 1 to 2 μm.
なお、５，６のｐ、ｎ型不純物領域はイオン注入法で形
成することもできる。その場合、例えばｎ型不純物イオ
ンとしてＳｉイオンを用い、ｐ型不純物イオンとしてＺ
ｎイオンを用いる。Note that the p-type and n-type impurity regions 5 and 6 can also be formed by ion implantation. In that case, for example, Si ions are used as n-type impurity ions, and Z ions are used as p-type impurity ions.
n ions are used.
次に、ｌのＧａＡｓ層をパターニングして所要の電子素
子形成用の領域を残す。Next, the 1 GaAs layer is patterned to leave a region for forming a required electronic device.
第１図（Ｃ）参照
上記でｐｒ ｎ型不純物が導入された部分の多重量子
井戸ＭＱＷは破壊され、屈折率が低下する。Refer to FIG. 1(C) The multiple quantum well MQW in the portion where the pr n-type impurity is introduced above is destroyed, and the refractive index is lowered.
その結果、活性層３の走る方向に３ａの屈折率分布が発
生する。また、活性層の厚味方向には３ｂの屈折率分布
がある。従って、光は活性層３内に閉じ込められること
になる。一方、活性層３の厚味は非常に狭くでき、０．
１μｍ程度乃至それ以下にでき、且つ上下に高抵抗半導
体層からなるクラッド層を配した構造であるため、電流
のもれがなく電流は非常に高い密度で閉じ込められ、レ
ーザのしきい値１ ｔｈが低い高効率のレーザを得るこ
とができる。なお、レーザ光は紙面に垂直方向に放射さ
、れる。As a result, a refractive index distribution 3a occurs in the direction in which the active layer 3 runs. Further, there is a refractive index distribution of 3b in the thickness direction of the active layer. Therefore, light will be confined within the active layer 3. On the other hand, the thickness of the active layer 3 can be made very narrow, and can be as small as 0.
Since it can be made to be approximately 1 μm or less, and has a structure with cladding layers made of high-resistance semiconductor layers on the top and bottom, there is no current leakage and the current is confined at a very high density, and the threshold value of the laser 1 th It is possible to obtain a high-efficiency laser with low efficiencies. Note that the laser beam is emitted in a direction perpendicular to the plane of the paper.
第１図（Ｃ）の構造で以下の電極７〜９を形成している
。The following electrodes 7 to 9 are formed with the structure shown in FIG. 1(C).
７−配線メタル
Ｔｉ／Ａｕ
８．９−ＦＥＴオーミフク電極
１０−ゲート電極（ショットキー電極）、ＡＸなお、特
に図示していないが、当然ｐ型不純物領域５にはｐ型用
電極が形成される。7-Wiring metal Ti/Au 8.9-FET Ohmifuku electrode 10-Gate electrode (Schottky electrode), AXAlthough not particularly shown, naturally a p-type electrode is formed in the p-type impurity region 5. .
以上に第１図の集積化構造を示したが、さらに細部の構
成を第２図の部分図に示している。The integrated structure shown in FIG. 1 has been shown above, and a more detailed structure is shown in the partial diagram of FIG.
第２図（Ａ）の中央に示しているのは、クラッドｌ１ｉ
２．２°と多重量子井戸の活性層３の拡大断面図である
。上部クラッド層２′のＡｌｌ ＸＧａｌ−ＸＡｓ層の
Ａｌ０Ｘ値は左図のようにｘ２分布で０．４５〜０に変
化している。その際、活性層３に隣接する側のｘ ＝
０．４５の層の厚さを０．５μｍ、 ｘ−０，４５〜Ｏ
の層の厚さを１μｍ程度とする。また、ＭＱＷ層は右図
のように、ＧａＡｓ （厚味３０人）、ＡＩ、＜Ｇａ）
−）／ｉｓ（厚味１２０人）を交互に成長し、例えば５
層構造に形成される。このＭＱＷは、レーザのストライ
プ幅（電極５．６の間隔）が狭い場合１例えば１μｍ程
度ではノンドープにしても良いが、ストライプ幅が広い
場合にはｎ型にドープする必要がある。その場合、ｎ型
不純物のＳ等でドープし、キャリア濃度Ｎｎ＃ｌＸ１０
目７ａｍ−３程度〜１×１０１１０１６ａにすれば良い
。What is shown in the center of Fig. 2 (A) is the clad l1i
2.2° is an enlarged cross-sectional view of the active layer 3 of the multiple quantum well. The Al0X value of the All At that time, x on the side adjacent to the active layer 3 =
0.45 layer thickness 0.5 μm, x-0,45~O
The thickness of the layer is approximately 1 μm. In addition, the MQW layer is GaAs (thick 30 people), AI, <Ga) as shown in the figure on the right.
-)/is (thickness 120 people) grow alternately, for example 5
Formed into a layered structure. This MQW may be undoped if the stripe width of the laser (interval between the electrodes 5.6) is narrow, for example, about 1 μm, but if the stripe width is wide, it is necessary to dope it to n-type. In that case, it is doped with an n-type impurity such as S, and the carrier concentration is Nn#lX10
It may be set to about 7am-3 to 1×1011016a.
第２図（Ｂ）は拡散法でｐ型不純物及びｎ型不純物領域
５，６を適当なマスクを用いて形成した場合の拡散フロ
ントを示すものである。通常、基板表面から拡散する場
合、拡散は等友釣に生じるから、深さが深くなるにつれ
て、５．６の不純物拡散領域のフロントが垂直から平坦
になる方向に曲り、その結果５，６のｐ、ｎ不純物領域
の間隔が深さとともに拡がってくる。従って、５．６の
ｐ、ｎ不純物領域で挾まれた活性層３のストライプ幅を
狭・めることに困難性が生じる。FIG. 2(B) shows a diffusion front when p-type impurity and n-type impurity regions 5 and 6 are formed by a diffusion method using an appropriate mask. Normally, when diffusion occurs from the substrate surface, the diffusion occurs isometrically, so as the depth increases, the front of the 5.6 impurity diffusion region curves from vertical to flat, resulting in the 5.6 impurity diffusion region becoming flat. , the spacing between the n impurity regions increases with depth. Therefore, it is difficult to narrow the stripe width of the active layer 3 sandwiched between the 5.6 p and n impurity regions.
ところが、上記第２図（Ａ）のようにクラッド層２ｖの
ＡｌｌのＸ値をｘ２分布にしておくと、不純物の拡散係
数は、Ｘ値が大きくなるにつれて大きくなるため、深さ
が深い程拡散速度が速くなり、その結果拡散フロントを
第２図（Ｂ）のように立てることができ、ストライプ幅
を狭くすることが容易になる。However, if the X value of All in the cladding layer 2v is set to x2 distribution as shown in Figure 2 (A) above, the diffusion coefficient of impurities increases as the X value increases, so the deeper the depth, the more difficult the diffusion The speed becomes faster, and as a result, a diffusion front can be established as shown in FIG. 2(B), making it easier to narrow the stripe width.
この、拡散フロントを立てて、ストライプ幅が拡がるこ
とを抑える他の方法として、第３図（Ａ）に示すように
、ｐ、ｎ不純物領域を形成する箇所に活性層３より深い
凹部５Ａ、６Ａを形成し、凹部５Ａ、６Ａの表面からｐ
、ｎ不純物を拡散せしめる方法がある。第３図（Ａ）は
凹部５Ａ、６Ａからｐ型不純物拡散領域５１、ｎ型不純
物拡散領域６″を形成した状態を示し、第３図（Ｂ）は
各凹部５Ａ、６Ａを低抵抗材料で埋め込んで□、平坦化
を−うた状態を示す。なお、図示しない電子半導体素子
形成部分は第１図（Ｃ）と同様に構成することができる
。As another method for suppressing the expansion of the stripe width by raising the diffusion front, as shown in FIG. from the surface of the recesses 5A and 6A.
There is a method of diffusing n impurities. FIG. 3(A) shows a state in which a p-type impurity diffusion region 51 and an n-type impurity diffusion region 6'' are formed from the recesses 5A and 6A, and FIG. 3(B) shows that the recesses 5A and 6A are made of a low-resistance material. Embedded □ indicates a state in which planarization is being performed. Note that an electronic semiconductor element forming portion (not shown) can be constructed in the same manner as in FIG. 1(C).
以上のように本実施例の集積化構造では、従来例の第５
図のようにプレーナ化を図るために予め基板に溝を掘る
必要がなり、゛また、レーザの電極を一面から取出すこ
とができるためプロセスが簡単である。また、上部クラ
ッド層のＨＲ−ＡｊＸＧａｌ−ＸＡｓｆｉ！ ２ ”の
上にＦＥＴ回路を形成するので、素子間分離も容易であ
る。As described above, in the integrated structure of this embodiment, the fifth
As shown in the figure, it is necessary to dig a groove in the substrate in advance to make it planar, and the process is simple because the laser electrode can be taken out from one side. Moreover, HR-AjXGal-XAsfi! of the upper cladding layer! Since the FET circuit is formed on the 2'', it is easy to separate the elements.
また、１のＦＥＴ活性層は、Ｉ（Ｒ−ＡｊＸＧａｐ。Further, the FET active layer of No. 1 is I(R-AjXGap.
Ａａｉｉ２’の上にあるので、活性層のキャリア閉じ込
め効果が大きくなり、ＦＥＴのｇｍ（相互コンダクタン
ス）が向上する効果が得られる。Since it is located above Aaii2', the carrier confinement effect of the active layer becomes large, resulting in the effect of improving the gm (mutual conductance) of the FET.
ところで、本実施例では、レーザの活性層３が１のＦｇ
Ｔの活性層の下に這っており、その影曾を考えなければ
ならない。第４図（Ａ＞に本実施例を回路図で示す。こ
こで、レーザＬＤは大電流低インピーダンス素子であり
、また電源Ｅは信号に対してショートと考えることがで
きるので等価回路は第４図（Ｂ）のＣＲ回路で表すこと
ができる。レーザＬＤが低インピーダンスであることが
らＲは十分小さく、ＣＲの時定数が小さくなり、ＦＥＴ
の応答に与える影響は少なくて十分数ＯＨ２オーダーの
高速動作が可能である。By the way, in this embodiment, the active layer 3 of the laser is 1 Fg.
It crawls under the active layer of T, and its imprint must be considered. Figure 4 (A>) shows this embodiment in a circuit diagram.Here, the laser LD is a large current low impedance element, and the power supply E can be considered to be short-circuited to the signal, so the equivalent circuit is It can be expressed by the CR circuit in Figure (B).Since the laser LD has low impedance, R is sufficiently small, the time constant of CR becomes small, and the FET
The effect on the response is small, and high-speed operation on the order of several tenths of OH2 is possible.
以上、実施例として比較的短波長のレーザを構成するＧ
ａ＾３／八ｊ ｘＧａｌ、ＸＡｓ系レーザと電子半導体
素子の集積化について示したが、本発明はこれに限るこ
となく他の半導体系９例えばＩｎＰ系の半導体レーザと
電子半導体素子の集積構造に同様に適用できるものて゛
ある。The above is an example of G constituting a relatively short wavelength laser.
a^3/8j Although the integration of xGal and XAs-based lasers and electronic semiconductor devices has been described, the present invention is not limited thereto, and can be applied to other semiconductor-based structures, such as InP-based semiconductor lasers and integrated structures of electronic semiconductor devices. There are others that can be similarly applied.
（発明の効果〕
以上の説明から明らかなように、本発明によれば、従来
のようにプレーナ化を図るために予め基板に溝を掘る必
要がなく、しかも、所要の成長層を１回の成長で形成で
き、また、レータの電極を一面から取出すことができる
ため集積化のプロセスが簡単である。また、集積化によ
り、電子半導体素子の動作に影響を与えることがない上
、ＨＲ二ＡＩ ＸＧａ１−ＸＡｓ層２１の上にＦＥＴ活
性層があるので、１の活性層のキャリア閉じ込め効果が
大となり、ＦＥＴのｇｍ（相互コンダクタンス）が向上
する効果が得られるという利点もある。(Effects of the Invention) As is clear from the above description, according to the present invention, there is no need to dig a groove in the substrate in advance in order to planarize it as in the conventional method, and moreover, the required growth layer can be grown in one time. The integration process is simple because it can be formed by growth, and the electrodes of the electrode can be taken out from one side.In addition, integration does not affect the operation of electronic semiconductor devices, and HR2AI Since the FET active layer is located on the XGa1-XAs layer 21, the carrier confinement effect of the active layer 1 becomes large, which also has the advantage of improving the gm (mutual conductance) of the FET.
第１図（Ａ）〜（Ｃ）は本発明の実施例の工程図、
第２図（Ａ）、（Ｂ）は本発明の実施例の細部第４図（
Ａ）、 （Ｂ）はそれぞれ本発明の実施例の回路図お
よび等価回路図、
第５図は従来の集積化構造を示す図である。
ｌ・・・電子半導体素子形成用のＧａＡａ層２．２’−
・−高抵抗半導体層のＨＲ−Ａ＃ ｇ Ｇａ１−ｘＡｓ
３・・・多重量子井戸（ＭＱＷ）活性層４・−・半絶縁
性Ｇａ＾３基板
ｓ−ｐ全不純物（電極）領域
６−・ｎ型不純物（電極）領域
７−・配線メタル □
Ｔｉ／＾Ｕ
８・−ＦＥＴオーミック電極
９・−・ゲート電極（ショットキー電極）ＩｌFIGS. 1(A) to (C) are process diagrams of an embodiment of the present invention, and FIGS. 2(A) and (B) are detailed diagrams of an embodiment of the present invention.
A) and (B) are a circuit diagram and an equivalent circuit diagram of an embodiment of the present invention, respectively, and FIG. 5 is a diagram showing a conventional integrated structure. l...GaAa layer 2.2'- for forming an electronic semiconductor element
・-HR-A# g Ga1-xAs of high resistance semiconductor layer
3...Multiple quantum well (MQW) active layer 4--Semi-insulating Ga^3 substrate sp total impurity (electrode) region 6--n-type impurity (electrode) region 7--wiring metal □ Ti/ ＾U 8・-FET ohmic electrode 9・-・gate electrode (Schottky electrode) Il
Claims (1)
層間に多重量子井戸構造のレーザの活性層が備えられ、
さらに、上部クラッド層の上に電子半導体素子用活性層
を含む半導体層が部分的に備えられてなるエピタキシャ
ル半導体層構造を有し、 該エピタキシャル半導体層構造の電子半導体素子用活性
層を含む半導体層が形成されていない部分に、上部クラ
ッド層側から互いに所定の間隔をおいて前記活性層に接
触するｐ型およびｎ型電極層が設けられ、横方向注入レ
ーザが形成されてなり、 一方、前記電子半導体素子用活性層には電子半導体素子
とその電極が形成されてなり、 該横方向注入レーザと電子半導体素子の電極を接続する
配線層を有することを特徴とする光、電子半導体集積回
路。[Claims] A multi-quantum well structure laser active layer is provided between an upper cladding layer made of a high-resistance semiconductor layer and a lower cladding layer,
Furthermore, it has an epitaxial semiconductor layer structure in which a semiconductor layer including an active layer for an electronic semiconductor device is partially provided on the upper cladding layer, and a semiconductor layer including the active layer for an electronic semiconductor device of the epitaxial semiconductor layer structure. P-type and n-type electrode layers contacting the active layer at a predetermined distance from each other from the upper cladding layer side are provided in the portion where the lateral injection laser is not formed, and a lateral injection laser is formed; An optical/electronic semiconductor integrated circuit comprising: an electronic semiconductor element and its electrode formed in the electronic semiconductor element active layer; and a wiring layer connecting the lateral injection laser and the electrode of the electronic semiconductor element.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8895386A JPS62244167A (en) | 1986-04-17 | 1986-04-17 | Optical, electronic semiconductor integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8895386A JPS62244167A (en) | 1986-04-17 | 1986-04-17 | Optical, electronic semiconductor integrated circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62244167A true JPS62244167A (en) | 1987-10-24 |
Family
ID=13957222
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8895386A Pending JPS62244167A (en) | 1986-04-17 | 1986-04-17 | Optical, electronic semiconductor integrated circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62244167A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5027363A (en) * | 1988-12-09 | 1991-06-25 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor laser |
| EP0487192A2 (en) * | 1990-11-19 | 1992-05-27 | Mitsubishi Denki Kabushiki Kaisha | Opto-electronic integrated circuit having a transmitter of long wavelength |
-
1986
- 1986-04-17 JP JP8895386A patent/JPS62244167A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5027363A (en) * | 1988-12-09 | 1991-06-25 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor laser |
| US5108949A (en) * | 1988-12-09 | 1992-04-28 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor laser and laser fabrication method |
| EP0487192A2 (en) * | 1990-11-19 | 1992-05-27 | Mitsubishi Denki Kabushiki Kaisha | Opto-electronic integrated circuit having a transmitter of long wavelength |
| US5311046A (en) * | 1990-11-19 | 1994-05-10 | Mitsubishi Denki Kabushiki Kaisha | Long wavelength transmitter opto-electronic integrated circuit |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4932033A (en) | Semiconductor laser having a lateral p-n junction utilizing inclined surface and method of manufacturing same | |
| JPS643078B2 (en) | ||
| JPH0156548B2 (en) | ||
| JPS6384186A (en) | Transverse junction stripe laser | |
| JPH0221683A (en) | Semiconductor laser device | |
| US5886370A (en) | Edge-emitting semiconductor lasers | |
| JPS63175489A (en) | Semiconductor device | |
| JPH0243351B2 (en) | ||
| JPH0834330B2 (en) | Semiconductor laser device | |
| KR900003844B1 (en) | Semiconductor laser device and manufacturing method thereof | |
| US4888781A (en) | Semiconductor laser | |
| JPH04184973A (en) | Long-wavelength light transmitting oeic | |
| JPS62244167A (en) | Optical, electronic semiconductor integrated circuit | |
| JPH077232A (en) | Optical semiconductor device | |
| JPH05160506A (en) | Semiconductor laser and its manufacture | |
| JP2592265B2 (en) | Optoelectronic integrated circuit device | |
| JPH03129892A (en) | Semiconductor light emitting element | |
| JPS59181084A (en) | Semiconductor laser device | |
| JPS641072B2 (en) | ||
| JPH065969A (en) | Semiconductor laser | |
| JPS61264776A (en) | Optical semiconductor device | |
| JPH0677605A (en) | Semiconductor element and fabrication thereof | |
| JPS60207390A (en) | Semiconductor device and manufacture thereof | |
| JP2550711B2 (en) | Semiconductor laser | |
| JPH0828553B2 (en) | Semiconductor laser |