JPS62224952A - Heat conductive substrate - Google Patents

Heat conductive substrate

Info

Publication number
JPS62224952A
JPS62224952A JP6709386A JP6709386A JPS62224952A JP S62224952 A JPS62224952 A JP S62224952A JP 6709386 A JP6709386 A JP 6709386A JP 6709386 A JP6709386 A JP 6709386A JP S62224952 A JPS62224952 A JP S62224952A
Authority
JP
Japan
Prior art keywords
substrate
aln substrate
thickness
calcined
rmax
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6709386A
Other languages
Japanese (ja)
Other versions
JPH0770644B2 (en
Inventor
Nobuo Iwase
岩瀬　暢男
Kazuo Anzai
安斎　和雄
Takashi Takahashi
孝 高橋
Yasuyuki Sugiura
杉浦　康之
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP61067093A priority Critical patent/JPH0770644B2/en
Publication of JPS62224952A publication Critical patent/JPS62224952A/en
Publication of JPH0770644B2 publication Critical patent/JPH0770644B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3731—Ceramic materials or glass
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/15—Ceramic or glass substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Materials Engineering (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

PURPOSE:To obtain a substrate having large junction strength between AlN substrate and metallize layer with less fluctuation and good yield by forming the surface of calcined AlN substrate with particular roughness and then forming thereon the metallize layer. CONSTITUTION:The surface of calcined AlN substrate 1 is formed with roughness (Rmax) of about 2-20mum and a metallize layer 2 is formed thereon. For instance, a green sheet, obtained by adding yttrium oxide of 3wt% to the aluminum nitride powder, milling and mixing them and thereafter adding a binder for the sheet formation by the doctor blade method, is calcined by heating it for 2hr AlN substrate 1 is sent to the horning process for obtaining the surface roughness (Rmax) of 5-15mum. Thereafter, the conductor paste mainly composed of Mo is printed and dried up. It is then sent to a vacuum furnace for calcination in order to obtain a metallized layer 2 in the thickness of 10mum. it is then cut with a diamond saw into specified small size. Thereafter, it is subjected to the N plating in the thickness of 2mum and Au plating in he thickness of 1.5mum.

Description

【発明の詳細な説明】 ［発明の目的］ （産業上の利用分野） 本発明は個別半導体用ヒートシンクとして有用な高熱伝
導性基板に関づる。DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to a highly thermally conductive substrate useful as a heat sink for discrete semiconductors.

（従来の技術） 半導体で発生し熱を敢熱りるため個別半導体用ヒートシ
ンク等に高熱伝力性基板が使用されている。従来、高熱
伝＞＄　１４１　ｐ板としてはＢｃＯ基板が一般的であ
ったが、高価であることや毒性のためＡλＮ基板が検問
されている。(Prior Art) High thermal conductivity substrates are used in heat sinks for individual semiconductors and the like to dissipate the heat generated in semiconductors. Conventionally, BcO substrates have been commonly used as high thermal conductivity > $ 141 p boards, but AλN substrates are being tested because of their high cost and toxicity.

このＡＡＮ基板には半導体チップを半田付すし、ワイヤ
をボンディングするため、メタライズ層を形成する必要
がある。このメタライズ層の形成は通常、研磨したＡＩ
Ｎ基板にＭＯまたは、Ｗを主体とするメタライズペース
ｌ〜を塗布し、焼成して行っていた。In order to solder a semiconductor chip and bond wires to this AAN substrate, it is necessary to form a metallized layer. The formation of this metallized layer is typically made of polished AI.
A metallization paste l~ mainly composed of MO or W was applied to an N substrate and fired.

（発明が解決しＪ、うとＪる問題点） ところでこのメタライズ層を形成したＡｆ！、Ｎ基板で
はＡＡＮ基板とメタライズ層間の接合強度が弱く、また
歩留が低いという問題点があった。(Problems that will be solved by the invention) By the way, Af! which formed this metallized layer! The problem with the N substrate is that the bonding strength between the AAN substrate and the metallized layer is weak and the yield is low.

本発明はこのような問題を解消するためなされたもので
、へβＮ基板とメタライズ層との接合強度が大きく、そ
のばらつきが小さく、また歩留も良好な高熱伝導性基板
を提供することを目的とする。The present invention was made to solve these problems, and an object of the present invention is to provide a highly thermally conductive substrate that has a high bonding strength between a βN substrate and a metallized layer, has small variations in bonding strength, and has a good yield. shall be.

［発明の構成］ （問題点を解決するための手段） 本発明の高熱伝導性基板は、焼成されたＡＡＮ基板の表
面を２〜２０μｍ１好ましくは５〜１５μｍの表面粗さ
（Ｒｍａｘ）にホーニング加工し、その上にメタライズ
層を形成してなることを特徴としている。[Structure of the Invention] (Means for Solving the Problems) The highly thermally conductive substrate of the present invention is obtained by honing the surface of a fired AAN substrate to a surface roughness (Rmax) of 2 to 20 μm, preferably 5 to 15 μm. It is characterized by having a metallized layer formed thereon.

この高熱伝導性基板は、表面粗さ（Ｒｍａｘ）を２〜２
０μｍとするホーニング加工によりＡｌＮ基板にメタラ
イズ層を形成する際アンカー効果による大ぎい接合強度
が得られる。ＡぶＮ基板の表面粗さ（Ｒｍａｘ）が２μ
ｍより小さいとアンカー効果がうすれて接合強度が低下
し、また２０μｍを越えると導体回路の断線やショート
の原因となる。なおＡｌＮ基板の成形法としてシート成
形法を用いた場合には生産性が向上し製造コストを低減
させることができる。This highly thermally conductive substrate has a surface roughness (Rmax) of 2 to 2
When a metallized layer is formed on an AlN substrate by honing to a thickness of 0 μm, a large bonding strength can be obtained due to the anchor effect. The surface roughness (Rmax) of the AbuN substrate is 2μ
If it is smaller than m, the anchor effect will be weakened and the bonding strength will be reduced, and if it exceeds 20 μm, it will cause disconnection or short circuit in the conductor circuit. Note that when a sheet molding method is used as a method for molding the AlN substrate, productivity can be improved and manufacturing costs can be reduced.

（実施例） 次に本発明の実施例について説明する。(Example) Next, examples of the present invention will be described.

窒化アルミニウム粉末に３重量％の酸化イツトリウムを
加え、粉砕混合し、バインダを添加してドクターブレー
ド法によりシート成形した。（ｑられたグリーンシート
を５０ａＸ５０ｍｍなど適当な大きさに切断し、窒素雰
囲気中で１８００℃、２時間加熱して焼成した。得られ
たＡｌＮ基板の表面粗さ（Ｒｍａｘ）は、２〜５μｍで
あった。3% by weight of yttrium oxide was added to the aluminum nitride powder, pulverized and mixed, a binder was added, and a sheet was formed by a doctor blade method. (The prepared green sheet was cut into an appropriate size such as 50a x 50mm and fired at 1800℃ for 2 hours in a nitrogen atmosphere.The surface roughness (Rmax) of the obtained AlN substrate was 2 to 5μm. there were.

このようにして得られたＡｐＮ基板１を図に示すように
ホーニング加工して表面粗さ（Ｒｍａｘ）を５〜１５μ
ｍにして、その後ＭＯを主体とする導体ペーストを印刷
、乾燥し、真空炉で焼成して厚さ１０μｍのメタライズ
層２を形成した。次にダイヤモンドソーにより２ＢｇＸ
　２＋ｎｍに切断して小形にし、厚さ２μｍのＮｉめつ
き３と厚さ１．５μｍのＡＵめつき４を施した。The ApN substrate 1 obtained in this way is honed as shown in the figure to give a surface roughness (Rmax) of 5 to 15μ.
After that, a conductive paste mainly composed of MO was printed, dried, and fired in a vacuum furnace to form a metallized layer 2 with a thickness of 10 μm. Next, 2BgX with a diamond saw
It was cut into a small size of 2+ nm, and Ni plating 3 with a thickness of 2 μm and AU plating 4 with a thickness of 1.5 μm were applied.

このようにして得られた高熱伝導性基板のＡｌＮ基板と
メタライズ層との接合強度は４　ｋｔ　／　ｍｉ以上で
あり、ホーニング加工をしないで胡麻したΔｆ！、Ｎ基
板にメタライズ層を形成したものに比べて平均値でも５
０％以上アップした。またこの実施例ではシー１〜成形
法により成形したので生産性が向上し、１時間あたり２
ｍｍＸ　２ｍｍのものを約１０００個生産することがで
きた。The bonding strength between the AlN substrate and the metallized layer of the highly thermally conductive substrate thus obtained was 4 kt/mi or more, and the Δf! , the average value is 5 compared to the one with a metallized layer formed on the N substrate.
It increased by more than 0%. In addition, in this example, molding was performed using the sea 1 to molding method, so productivity was improved and 2
We were able to produce approximately 1000 pieces measuring 2 mm x 2 mm.

一方従来のプレス成形による方法では、１時間あたりた
かだか１００個しか生産できなかった。On the other hand, with the conventional press molding method, only 100 pieces could be produced per hour.

［発明の効果］ 以上説明したように、本発明の高熱伝導性基板において
は、ＡＩＮ基板表面をホーニング加工して表面粗さ（Ｒ
ｍａｘ）を２〜２０μｍとしているので、アンカー効果
によりメタライズ層との接合強度が向上する。従って本
発明の高熱伝導性基板は個別半導体用ヒートシンク等と
して有用である。[Effects of the Invention] As explained above, in the highly thermally conductive substrate of the present invention, the surface roughness (R
max) is set to 2 to 20 μm, the bonding strength with the metallized layer is improved due to the anchor effect. Therefore, the highly thermally conductive substrate of the present invention is useful as a heat sink for individual semiconductors.

【図面の簡単な説明】[Brief explanation of drawings]

図面は本発明の高熱伝導性基板を模式的に示す断面図で
ある。The drawing is a cross-sectional view schematically showing a highly thermally conductive substrate of the present invention.

Claims (4)

【特許請求の範囲】[Claims] （１）焼成されたＡｌＮ基板の表面を２〜２０μｍの表
面粗さ（Ｒｍａｘ）に加工し、その上にメタライズ層を
形成してなることを特徴とする熱伝導性基板。(1) A thermally conductive substrate characterized by processing the surface of a fired AlN substrate to a surface roughness (Rmax) of 2 to 20 μm and forming a metallized layer thereon. （２）加工はホーニング加工である特許請求の範囲第１
項記載の熱伝導性基板。(2) Processing is honing process Claim 1
The thermally conductive substrate described in . （３）メタライズ層上にはＮｉめつきおよびＡｕめっき
が施こされている特許請求の範囲第１項記載の熱伝導性
基板。(3) The thermally conductive substrate according to claim 1, wherein Ni plating and Au plating are applied on the metallized layer. （４）ＡｌＮ基板はシート成形法により成形されたもの
である特許請求の範囲第１項記載の熱伝導性基板。(4) The thermally conductive substrate according to claim 1, wherein the AlN substrate is molded by a sheet molding method.
JP61067093A 1986-03-27 1986-03-27 Thermal conductive substrate Expired - Lifetime JPH0770644B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61067093A JPH0770644B2 (en) 1986-03-27 1986-03-27 Thermal conductive substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61067093A JPH0770644B2 (en) 1986-03-27 1986-03-27 Thermal conductive substrate

Publications (2)

Publication Number Publication Date
JPS62224952A true JPS62224952A (en) 1987-10-02
JPH0770644B2 JPH0770644B2 (en) 1995-07-31

Family

ID=13334923

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61067093A Expired - Lifetime JPH0770644B2 (en) 1986-03-27 1986-03-27 Thermal conductive substrate

Country Status (1)

Country Link
JP (1) JPH0770644B2 (en)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01218089A (en) * 1988-02-26 1989-08-31 Toshiba Corp Manufacture of surface conductive ceramic substrate
JPH01273381A (en) * 1988-04-25 1989-11-01 Tokin Corp Manufacture of aluminum nitride substrate
JPH02122318U (en) * 1989-03-17 1990-10-05
JP2003037224A (en) * 2001-07-23 2003-02-07 Ibiden Co Ltd Substrate for module
JP2003037231A (en) * 2001-07-23 2003-02-07 Ibiden Co Ltd Substrate for module
JP2003060137A (en) * 2001-08-08 2003-02-28 Ibiden Co Ltd Substrate for module
JP2003060136A (en) * 2001-08-08 2003-02-28 Ibiden Co Ltd Substrate for module
US6884972B2 (en) 1999-12-09 2005-04-26 Ibiden Co., Ltd. Ceramic plate for a semiconductor producing/inspecting apparatus
JP2011222551A (en) * 2010-04-02 2011-11-04 Kyocera Corp Insulating heat-radiating substrate

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6010696A (en) * 1983-06-30 1985-01-19 日本碍子株式会社 Method of producing thin film ceramic circuit board
JPS617647A (en) * 1984-06-21 1986-01-14 Toshiba Corp Circuit substrate

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6010696A (en) * 1983-06-30 1985-01-19 日本碍子株式会社 Method of producing thin film ceramic circuit board
JPS617647A (en) * 1984-06-21 1986-01-14 Toshiba Corp Circuit substrate

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01218089A (en) * 1988-02-26 1989-08-31 Toshiba Corp Manufacture of surface conductive ceramic substrate
JPH01273381A (en) * 1988-04-25 1989-11-01 Tokin Corp Manufacture of aluminum nitride substrate
JPH02122318U (en) * 1989-03-17 1990-10-05
US6884972B2 (en) 1999-12-09 2005-04-26 Ibiden Co., Ltd. Ceramic plate for a semiconductor producing/inspecting apparatus
JP2003037224A (en) * 2001-07-23 2003-02-07 Ibiden Co Ltd Substrate for module
JP2003037231A (en) * 2001-07-23 2003-02-07 Ibiden Co Ltd Substrate for module
JP2003060137A (en) * 2001-08-08 2003-02-28 Ibiden Co Ltd Substrate for module
JP2003060136A (en) * 2001-08-08 2003-02-28 Ibiden Co Ltd Substrate for module
JP4737885B2 (en) * 2001-08-08 2011-08-03 イビデン株式会社 Module board
JP2011222551A (en) * 2010-04-02 2011-11-04 Kyocera Corp Insulating heat-radiating substrate

Also Published As

Publication number Publication date
JPH0770644B2 (en) 1995-07-31

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