JPS62169330A - Semiconductor exposure apparatus - Google Patents
Semiconductor exposure apparatusInfo
- Publication number
- JPS62169330A JPS62169330A JP61303025A JP30302586A JPS62169330A JP S62169330 A JPS62169330 A JP S62169330A JP 61303025 A JP61303025 A JP 61303025A JP 30302586 A JP30302586 A JP 30302586A JP S62169330 A JPS62169330 A JP S62169330A
- Authority
- JP
- Japan
- Prior art keywords
- wafer
- chuck
- temperature
- mask
- cooling
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 11
- 238000001816 cooling Methods 0.000 claims abstract description 32
- 238000010438 heat treatment Methods 0.000 claims abstract description 25
- 238000001514 detection method Methods 0.000 claims abstract description 4
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 abstract description 6
- 101100269850 Caenorhabditis elegans mask-1 gene Proteins 0.000 abstract description 3
- 229910052697 platinum Inorganic materials 0.000 abstract description 3
- 238000001179 sorption measurement Methods 0.000 abstract 1
- 238000000034 method Methods 0.000 description 14
- 239000007789 gas Substances 0.000 description 6
- 239000007788 liquid Substances 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 4
- 230000003287 optical effect Effects 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 230000005679 Peltier effect Effects 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 230000008602 contraction Effects 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 239000000112 cooling gas Substances 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000000428 dust Substances 0.000 description 1
- 239000004071 soot Substances 0.000 description 1
- 238000005507 spraying Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/70—Microphotolithographic exposure; Apparatus therefor
- G03F7/70691—Handling of masks or workpieces
- G03F7/707—Chucks, e.g. chucking or un-chucking operations or structural details
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/70—Microphotolithographic exposure; Apparatus therefor
- G03F7/708—Construction of apparatus, e.g. environment aspects, hygiene aspects or materials
- G03F7/70858—Environment aspects, e.g. pressure of beam-path gas, temperature
- G03F7/70866—Environment aspects, e.g. pressure of beam-path gas, temperature of mask or workpiece
- G03F7/70875—Temperature, e.g. temperature control of masks or workpieces via control of stage temperature
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Health & Medical Sciences (AREA)
- Life Sciences & Earth Sciences (AREA)
- Atmospheric Sciences (AREA)
- Toxicology (AREA)
- Engineering & Computer Science (AREA)
- Environmental & Geological Engineering (AREA)
- Epidemiology (AREA)
- Public Health (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は集積回路製造過程における半導体露光装置、特
にフォトマスクのパターンをシリコンウェハ上に転写す
る際の前工程パターンに対する倍率誤差を除去するもの
に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor exposure apparatus used in the process of manufacturing an integrated circuit, and more particularly to an apparatus for eliminating magnification errors with respect to a pre-process pattern when transferring a photomask pattern onto a silicon wafer.
集積回路製造過程では、マスクパターンをシリコンウェ
ハ上に転写する工程が複数回存在する。この時、前工程
でウェハ上に転写されたマスクパターンに対し次工程の
マスクパターンが、ウェハ全面にわたって高精度で位置
整合されることが必要となる。しかし、マスク自体が、
その製造過程で誤差を含んでいたり、ウェハもまた、そ
の製造工程で高熱処理を受は変形を起こす可能性が考え
られ、マスクとウェハ間に投影光学系を有する露光装置
においては、マスクパターンをウェハ上に投影転写する
上での倍率誤差が考えられる。また前工程と次工程で、
マスク又はウェハの温度が個々に変動した場合はもちろ
んのこと、両者の温度が同様に変動した場合でも、両者
の熱膨張率の差異により伸縮量に差が生ずる。以上の点
から、ウェハ全面にわたる高精度の位置整合は困難であ
った。In the integrated circuit manufacturing process, there are multiple steps of transferring a mask pattern onto a silicon wafer. At this time, it is necessary that the mask pattern in the next step be aligned with the mask pattern transferred onto the wafer in the previous step with high precision over the entire surface of the wafer. However, the mask itself
There may be errors in the manufacturing process, and the wafer may also be deformed due to high heat treatment during the manufacturing process, so exposure equipment that has a projection optical system between the mask and the wafer may A magnification error may occur during projection transfer onto the wafer. In addition, in the previous process and the next process,
Not only when the temperature of the mask or the wafer changes individually, but even when the temperatures of both change in the same way, a difference in the amount of expansion and contraction occurs due to the difference in the coefficient of thermal expansion between the two. From the above points, it has been difficult to achieve highly accurate positional alignment over the entire wafer.
従来、上記の欠点を克服する為、種々の方式でマスクあ
るいはウェハの少なくとも一方の温度を制御しウェハ又
はマスクの温度の恒温化を図ったり、マスク又はウェハ
の強制的な加熱・冷却により意識的な位置整合補償を行
うことが考えられている。Conventionally, in order to overcome the above-mentioned drawbacks, various methods have been used to control the temperature of at least one of the mask or wafer to maintain a constant temperature of the wafer or mask, or to intentionally heat or cool the mask or wafer. Consideration has been given to performing position matching compensation.
その方法の一つとして、実公昭５６−１７９５１．特開
昭５５−９３２２４号公報に知られるように、所望の温
度に管理されたエア（空気）を直接マスク又はウェハに
吹き付け、これによりマスク又はウェハの温度を制御し
ようとするものがある。しかし、この方法はエア温度を
制御する為の制御装置が大規模かつ高価であり、さらに
大きな問題として、マスクあるいはウェハへのゴミの付
着が発生するなどの欠点がある。One of the methods is Utility Model Publication No. 56-17951. As known from Japanese Unexamined Patent Publication No. 55-93224, there is a method in which air controlled at a desired temperature is directly blown onto a mask or wafer, thereby controlling the temperature of the mask or wafer. However, this method requires a large-scale and expensive control device for controlling the air temperature, and a further problem is that dust may adhere to the mask or wafer.
また他の方法として、マスク又はウェハを支持する為の
支持具の温度を温度制御手段により制御し、マスク又は
ウェハの少なくとも一方の温度を間接的に制御しようと
するものが特開昭５６−１１２７３２゜特開昭５４−１
４９５８６号公報に知られる。Another method is disclosed in Japanese Patent Laid-Open No. 56-112732, in which the temperature of a support for supporting a mask or a wafer is controlled by a temperature control means, and the temperature of at least one of the mask or the wafer is indirectly controlled.゜Unexamined Japanese Patent Publication No. 54-1
It is known from Publication No. 49586.
その温度制御手段として、ペルチェ効果を利用する加熱
、冷却可能な素子や、温度制御された液体あるいは気体
が利用されている。しかし前者のペルチェ効果を持つ素
子を使用するには、この素子が吸熱、放熱できるような
熱交換器が必要であり、またこの素子自体高価でもある
。また後者の方法は、先に述べたと同様、大規模な温度
制御装置が必要となる。As the temperature control means, a heating/cooling element utilizing the Peltier effect, or a temperature-controlled liquid or gas is used. However, in order to use the former element having the Peltier effect, a heat exchanger is required so that the element can absorb and release heat, and the element itself is expensive. Further, the latter method requires a large-scale temperature control device, as described above.
また、上述の各種の方式の中で、単に発熱抵抗体だけを
用いる簡便な方法も考えられているが、発熱抵抗体だけ
では温度下降手段を持たず、一旦温度が所望の温度を越
えてしまうと再び所望の温度に達するには、その制御対
象物の自然放冷に頼るしかなく、大幅な時間のロスにつ
ながるという欠点を持っている。Furthermore, among the various methods mentioned above, a simple method using only a heating resistor has been considered, but the heating resistor alone does not have a means for lowering the temperature, and the temperature once exceeds the desired temperature. In order to reach the desired temperature again, it is necessary to rely on the natural cooling of the object to be controlled, which has the disadvantage of leading to a significant loss of time.
本発明は、上記従来の欠点を克服し、低価格で手軽にマ
スク又はウェハの少なくとも一方の温度をコントロール
し、これによりマスクパターンをウェハ上に転写する際
の倍率誤差を除去し、ウェハ全面にわたる高精度な位置
整合を達成する半導体露光装置を提供することを目的と
する。The present invention overcomes the above conventional drawbacks, easily controls the temperature of at least one of a mask or a wafer at a low cost, and thereby eliminates magnification errors when transferring a mask pattern onto a wafer, thereby covering the entire surface of the wafer. An object of the present invention is to provide a semiconductor exposure apparatus that achieves highly accurate position alignment.
以下、添附する図面を用いて本発明の詳細な説明する。Hereinafter, the present invention will be described in detail using the accompanying drawings.
図においては、ウェハチャックのみを温度制御した半導
体露光装置を示す。The figure shows a semiconductor exposure apparatus in which only the wafer chuck is temperature-controlled.
図中１はマスク、２はウェハ、３はマスクチャック、４
はウェハチャックである。ウェハチャック４はウェハ２
を真空吸着により固定支持し、その内部には温度検出の
為の白金側温抵抗体６及び温度上昇手段である発熱抵抗
体７が設けられ、また常に常温の冷却用エアが循環して
いる。発熱抵抗体７はウェハチャック４に設けられ、ス
スかられかるように冷却用エアの循環部にあるので、冷
却用エアがウェハチャック４とともに発熱抵抗体７も効
果的に冷却可能である。In the figure, 1 is a mask, 2 is a wafer, 3 is a mask chuck, and 4
is a wafer chuck. Wafer chuck 4 holds wafer 2
is fixedly supported by vacuum suction, and a platinum-side temperature resistor 6 for temperature detection and a heating resistor 7 serving as a temperature raising means are provided inside, and cooling air at room temperature is constantly circulated. The heat generating resistor 7 is provided on the wafer chuck 4 and is located in a cooling air circulation section to avoid soot, so that the cooling air can effectively cool the heat generating resistor 7 as well as the wafer chuck 4.
このような系において露光用光束１３が、マスク１を透
過し、投影光学系５を介して、ウェハ２に投影され、マ
スクパターンと前工程で転写されたウェハパターンとが
位置合せされる。ここで留意しておかねばならないこと
は、マスクパターンをウェハ上に投影転写する第一の工
程から、ウェハチャック温度を室温より数度高（してお
くということである。これは常温のエアをウェハに対し
て冷却用エアとして用いるためである。この状態でマス
クパターンとウェハパターンが位置合せされ、この時同
時に両パターンの倍率誤差を読み取り、この値とウェハ
の線膨張係数から変化させるべき温度幅を算出し、現在
のチャック温度にこの値を付加した温度を温度制御装置
９により設定する。以後、温度制御装置が作動し、白金
側温抵抗体６により検出された温度と設定温度との偏差
がゼロとなるようウェハチャック温度が制御される。こ
の結果、室温以上の温度範囲で強制加熱手段たる発熱抵
抗体のみによりウェハは伸縮し、倍率誤差が補正され、
マスクパターンとウェハパターンが全面にわたって高精
度に位置整合されることが可能となる。In such a system, the exposure light beam 13 passes through the mask 1 and is projected onto the wafer 2 via the projection optical system 5, so that the mask pattern and the wafer pattern transferred in the previous process are aligned. What must be kept in mind here is that from the first step of projecting and transferring the mask pattern onto the wafer, the wafer chuck temperature is kept several degrees higher than room temperature. This is to be used as cooling air for the wafer.In this state, the mask pattern and the wafer pattern are aligned, and at this time, the magnification error of both patterns is read simultaneously, and the temperature to be changed is determined from this value and the linear expansion coefficient of the wafer. The width is calculated, and a temperature obtained by adding this value to the current chuck temperature is set by the temperature control device 9. After that, the temperature control device is activated and the temperature detected by the platinum side temperature resistance element 6 and the set temperature are set. The wafer chuck temperature is controlled so that the deviation is zero.As a result, the wafer expands and contracts only by the heating resistor, which is the forced heating means, in the temperature range above room temperature, and the magnification error is corrected.
The mask pattern and the wafer pattern can be aligned with high precision over the entire surface.
従来、例えば特開昭５１−１４９５８６号公報に記載さ
れているように、電気ヒータのみによりマスク又はウェ
ハの温度制御を図った場合、その冷却手段は自然放冷に
頼るしかな（、大きな時間のロスとなることが予測され
た。しかし、本実施例ではウェハチャック内部に常に冷
却用エアを循環させ、しかも放熱板８を装備させること
により温度下降速度の増加に大きな効果が得られ、上記
欠点の除去を可能としたものである。Conventionally, as described in Japanese Patent Application Laid-Open No. 51-149586, when temperature control of a mask or wafer was attempted using only an electric heater, the cooling method had to rely on natural cooling (which took a long time). However, in this embodiment, by constantly circulating cooling air inside the wafer chuck and equipping the wafer chuck with the heat sink 8, a great effect was obtained in increasing the rate of temperature decline, and the above-mentioned drawbacks were avoided. This makes it possible to remove
又特開昭５４−１４９５８６号公報に前述のものとは別
に記載され、特開昭５４−７３５７８号公報にも記載さ
れているように、チャック等の中に液体又は気体の流路
を設け、この流路に温度制御された液体又は気体を流す
ことでマスク又はウェハの温度制御を図った場合、マス
ク等の温度変更を行うのに、まず液体又は気体の温度変
更を行った後、この液体又は気体がチャック等の温度変
更を行うので温度上昇、下降共に時間がかかった。本発
明は加熱手段と冷却手段の２つを設ける事で加熱手段の
冷却、冷却手段の加熱を待たずに独立してチャックの冷
却、加熱動作を行える為、この点でも温度変更の時間短
縮の効果がある。In addition, as described in JP-A-54-149586 separately from the above-mentioned one, and as also described in JP-A-54-73578, a liquid or gas flow path is provided in a chuck or the like, If the temperature of the mask or wafer is controlled by flowing a temperature-controlled liquid or gas through this channel, the temperature of the mask, etc. must be changed by first changing the temperature of the liquid or gas, and then changing the temperature of the liquid or gas. Or, because the gas changes the temperature of the chuck, etc., it takes time to both raise and lower the temperature. By providing two heating means and a cooling means, the present invention allows cooling and heating of the chuck to be performed independently without waiting for the heating means to cool down and the cooling means to heat up. This also reduces the time required to change the temperature. effective.
更に特開昭５５−１２３１３１号公報に記載されている
ように、支持台にヒータを設け、マスク又はウェハに冷
却気体を噴射するようにしてマスク又はウェハの温度制
御を図った場合、冷却時にヒータは自然放冷によって放
熱されるのでマスク等に比べてヒータの温度下降速度が
小さく、ヒータの余熱によってマスク等が部分的に加熱
され、マスク等の温度分布にムラが出来て伸縮歪が発生
するという問題があった。本発明は、冷却手段が加熱手
段−とチャックの両方を冷却可能に構成されているので
、冷却時には加熱手段も充分温度下降速度を大きくさせ
る事ができ、上述欠点の除去が可能である。Furthermore, as described in JP-A No. 55-123131, when a heater is provided on the support base and the temperature of the mask or wafer is controlled by spraying cooling gas onto the mask or wafer, the heater Since the heat is dissipated by natural cooling, the temperature drop rate of the heater is slower than that of masks, etc., and the residual heat of the heater partially heats the mask, etc., resulting in uneven temperature distribution of the mask, etc., and expansion/contraction distortion. There was a problem. In the present invention, since the cooling means is configured to be able to cool both the heating means and the chuck, the temperature drop rate of the heating means can be sufficiently increased during cooling, and the above-mentioned drawbacks can be eliminated.
この方式はウェハチャックのみでなくマスクを固定支持
するマスクチャックについても適用可能であり、またマ
スクチャックとウェハチャックに同時に適用すれば、よ
り大きな効果が期待される。This method can be applied not only to wafer chucks but also to mask chucks that fixedly support masks, and greater effects are expected if applied to mask chucks and wafer chucks at the same time.
本方式はマスクチャックまたはウェハチャック、あるい
はこの両者に発熱抵抗体を取り付は内部に常温のエアを
循環させるだけである為構造は非常に簡便であり手軽に
実用化が可能である。This system has a very simple structure and can be easily put into practical use, since the heating resistor is attached to the mask chuck, the wafer chuck, or both, and air at room temperature is circulated inside.
上記実施例中、冷却用エアとして常温のエアの代わりに
、冷却装置を用いて冷却したエアを用いることも可能で
ある。この場合、チャック冷却速度がさらに増加すると
ともに室温以下での温度制御が可能となる為、より広い
範囲での効率的な倍率誤差補正が可能である。またここ
でいう冷却装置とは必ずしも温度制御機能を持つ必要は
なく、例えば空気の断熱膨張を利用する簡易な冷却装置
であっても、その効果は充分あると考えられる。In the above embodiments, it is also possible to use air cooled by a cooling device instead of room temperature air as the cooling air. In this case, since the chuck cooling rate is further increased and the temperature can be controlled below room temperature, efficient magnification error correction can be performed over a wider range. Furthermore, the cooling device referred to herein does not necessarily have to have a temperature control function; for example, even a simple cooling device that utilizes adiabatic expansion of air is considered to be sufficiently effective.
また上記実施例は、投影光学系を有しない密着方式（コ
ンタクト）または半密着方式（プロキシミテイ）の半導
体露光装置においても適用は可能であり充分な効果が期
待される。Furthermore, the above embodiment can be applied to a contact type or semi-contact type semiconductor exposure apparatus that does not have a projection optical system, and sufficient effects are expected.
なお以上の説明で冷却手段としてのエア冷却手段は、温
度制御されるマスクチャック又はウェハチャックの内部
にあるとしたが、これに限らずマスクチャック又はウエ
ノ＼チャックが両方の手段を具備し、かつ加熱手段とチ
ャックとを冷却可能に構成されてさえすれば外部にあっ
ても良いことは勿論である。In the above explanation, the air cooling means as a cooling means is located inside the temperature-controlled mask chuck or wafer chuck, but the invention is not limited to this, and the mask chuck or wafer chuck may have both means and Of course, the heating means and the chuck may be provided externally as long as they are configured to be coolable.
なお発熱抵抗体として、発熱抵抗素子に限らず、これに
値するものを含むものであることは言う迄もない。It goes without saying that the heat-generating resistor is not limited to heat-generating resistive elements, but includes other devices worthy of this.
第１図は本発明の実施例の図、
図中１はマスク、２はウェハ、３はマスクチャック、４
はウェハチャック、５は投影光学系、６は白金側温抵抗
体、７は発熱抵抗体、８は放熱板、９は温度制御装置、
１０は電源、１１は冷却用エア入口、１２は冷却用エア
出口、１３は露光用光束である。FIG. 1 is a diagram of an embodiment of the present invention. In the figure, 1 is a mask, 2 is a wafer, 3 is a mask chuck, and 4 is a mask.
is a wafer chuck, 5 is a projection optical system, 6 is a platinum side temperature resistor, 7 is a heating resistor, 8 is a heat sink, 9 is a temperature control device,
10 is a power source, 11 is a cooling air inlet, 12 is a cooling air outlet, and 13 is a light beam for exposure.
Claims (5)
光装置において、マスク又はウェハを固定支持するチャ
ックに設けられ、該チャックを加熱する加熱手段と、該
加熱手段と前記チャックとを冷却可能に構成された冷却
手段と前記チャックに設けられた温度検出手段とを有す
ることを特徴とする半導体露光装置。(1) In a semiconductor exposure apparatus that transfers a pattern of a mask onto a wafer, a heating means is provided on a chuck that fixedly supports the mask or the wafer and heats the chuck, and the heating means and the chuck are configured to be coolable. What is claimed is: 1. A semiconductor exposure apparatus comprising: a cooling means provided on the chuck; and a temperature detection means provided on the chuck.
冷却し、前記チャックは常温より高く設定される事を特
徴とする特許請求の範囲第１項記載の半導体露光装置。(2) The semiconductor exposure apparatus according to claim 1, wherein the cooling means cools the heating means with air at room temperature, and the chuck is set at a higher temperature than room temperature.
ックと加熱手段とを冷却する事を特徴とする特許請求の
範囲第１項記載の半導体露光装置。(3) The semiconductor exposure apparatus according to claim 1, wherein the cooling means cools the chuck and the heating means with air at a temperature lower than room temperature.
に基いて、前記チャックを所定温度になるよう温度変化
させる事を特徴とする特許請求の範囲第１項記載の半導
体露光装置。(4) The semiconductor exposure apparatus according to claim 1, wherein the heating means changes the temperature of the chuck to a predetermined temperature based on the temperature detected by the temperature detection means.
の放熱板を含む事を特徴とする特許請求の範囲第１項記
載の半導体露光装置。(5) The semiconductor exposure apparatus according to claim 1, wherein the cooling means includes a cooling heat sink provided on the chuck.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61303025A JPS62169330A (en) | 1986-12-19 | 1986-12-19 | Semiconductor exposure apparatus |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61303025A JPS62169330A (en) | 1986-12-19 | 1986-12-19 | Semiconductor exposure apparatus |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62169330A true JPS62169330A (en) | 1987-07-25 |
Family
ID=17916024
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61303025A Pending JPS62169330A (en) | 1986-12-19 | 1986-12-19 | Semiconductor exposure apparatus |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62169330A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02156622A (en) * | 1988-12-09 | 1990-06-15 | Nec Corp | Semiconductor manufacturing apparatus |
| JP2001189250A (en) * | 1999-12-28 | 2001-07-10 | Tokyo Electron Ltd | Heat treatment apparatus and method thereof |
| JP2001203156A (en) * | 1999-02-10 | 2001-07-27 | Ibiden Co Ltd | Hot plate unit |
| US6639191B2 (en) | 1999-01-25 | 2003-10-28 | Ibiden Co., Ltd. | Hot plate unit |
| US6686570B2 (en) | 2000-02-10 | 2004-02-03 | Tokyo Electron Limited | Hot plate unit |
| JP2004072095A (en) * | 1999-02-10 | 2004-03-04 | Ibiden Co Ltd | Hot plate unit |
-
1986
- 1986-12-19 JP JP61303025A patent/JPS62169330A/en active Pending
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02156622A (en) * | 1988-12-09 | 1990-06-15 | Nec Corp | Semiconductor manufacturing apparatus |
| US6639191B2 (en) | 1999-01-25 | 2003-10-28 | Ibiden Co., Ltd. | Hot plate unit |
| JP2001203156A (en) * | 1999-02-10 | 2001-07-27 | Ibiden Co Ltd | Hot plate unit |
| JP2004072095A (en) * | 1999-02-10 | 2004-03-04 | Ibiden Co Ltd | Hot plate unit |
| JP2001189250A (en) * | 1999-12-28 | 2001-07-10 | Tokyo Electron Ltd | Heat treatment apparatus and method thereof |
| US6686570B2 (en) | 2000-02-10 | 2004-02-03 | Tokyo Electron Limited | Hot plate unit |
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